Set up core checkstop escalation using HWP

This commit creates the hostboot functionality around the
p9_core_checkstop_handler HWP. At various points in the IPL when
we want to turn off unit checkstops for system checkstops, and then
later restore them, we call this HWP.

Change-Id: I6f69a9c3a88707f29e4b86e9f4e3b3bd3dfd76b7
RTC: 147565
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56430
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>

4 files changed, 270 insertions, 24 deletions

diff --git a/src/usr/isteps/pm/makefile b/src/usr/isteps/pm/makefile
index 77f7c69cb..a94c026aa 100644
--- a/src/usr/isteps/pm/makefile
+++ b/src/usr/isteps/pm/makefile
@@ -5,7 +5,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2016
+# Contributors Listed Below - COPYRIGHT 2016,2018
 # [+] International Business Machines Corp.
 #
 #
@@ -29,7 +29,7 @@ MODULE = pm
 SUBDIRS+=runtime.d
 
 ## Objects unique to HB IPL
-
+OBJS += ../istepHelperFuncs.o
 ## Objects common to HB IPL and HBRT
 include pm.mk
 
diff --git a/src/usr/isteps/pm/pm.mk b/src/usr/isteps/pm/pm.mk
index 55e15b1fb..e8e725a35 100644
--- a/src/usr/isteps/pm/pm.mk
+++ b/src/usr/isteps/pm/pm.mk
@@ -42,6 +42,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/xip
 HWP_LIB_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/lib/
 HWP_PM_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/pm
 EXTRAINCDIR += ${HWP_PM_PATH}
+EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/perv
 HWP_STOPUTIL_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/utils/stopreg/
 EXTRAINCDIR += ${HWP_STOPUTIL_PATH}
 NEST_UTIL_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/nest
@@ -70,6 +71,7 @@ OBJS += p9_avsbus_lib.o
 VPATH += ${HWP_PM_PATH} ${HWP_CUST_PATH} ${HWP_ACC_PATH}
 VPATH += ${HWP_LIB_PATH} ${HWP_STOPUTIL_PATH}
 VPATH += ${NEST_UTIL_PATH}
+VPATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/perv/
 
 # TODO RTC: 164237
 # Take another look at PM lib
@@ -114,3 +116,4 @@ include ${HWP_PM_PATH}/p9_pm_recovery_ffdc_qppm.mk
 include ${HWP_PM_PATH}/p9_pm_recovery_ffdc_occ.mk
 include ${HWP_PM_PATH}/p9_cme_sram_access.mk
 include ${HWP_PM_PATH}/p9_pm_callout.mk
+include ${ROOTPATH}/src/import/chips/p9/procedures/hwp/perv/p9_core_checkstop_handler.mk
diff --git a/src/usr/isteps/pm/pm_common.C b/src/usr/isteps/pm/pm_common.C
index 0810b7f54..2a42338a2 100644
--- a/src/usr/isteps/pm/pm_common.C
+++ b/src/usr/isteps/pm/pm_common.C
@@ -30,6 +30,7 @@
 #include    <initservice/taskargs.H>
 #include    <errl/errlentry.H>
 #include    <errl/errlreasoncodes.H>
+#include    <errl/errludtarget.H>
 
 // attn/prd call
 #include    <runtime/attnsvc.H>
@@ -75,6 +76,12 @@
 
 #include <isteps/pm/occCheckstop.H>
 
+#include    <p9_core_checkstop_handler.H>
+#include    <p9_stop_api.H>
+#include    <scom/scomif.H>
+#include    <p9_quad_scom_addresses.H>
+
+
 #ifdef CONFIG_ENABLE_CHECKSTOP_ANALYSIS
   #include <diag/prdf/prdfWriteHomerFirData.H>
 #endif
@@ -967,39 +974,92 @@ namespace HBPM
         uint64_t l_homerPhysAddr = 0x0;
         uint64_t l_commonPhysAddr = 0x0;
 
-        for (const auto & l_procChip: l_procChips)
+        do
         {
-            // This attr was set during istep15 HCODE build
-            l_homerPhysAddr = l_procChip->
-                    getAttr<TARGETING::ATTR_HOMER_PHYS_ADDR>();
-            l_commonPhysAddr = l_sys->
-                    getAttr<TARGETING::ATTR_OCC_COMMON_AREA_PHYS_ADDR>();
-
-            l_errl = loadPMComplex(l_procChip,
-                                   l_homerPhysAddr,
-                                   l_commonPhysAddr,
-                                   i_mode);
-            if( l_errl )
+            // Switching core checkstops from unit to system
+            TARGETING::TargetHandleList l_coreTargetList;
+            getAllChips(l_coreTargetList, TYPE_CORE);
+
+            if(is_sapphire_load())
+            {
+                for( auto l_core_target : l_coreTargetList )
+                {
+                    l_errl = core_checkstop_helper_hwp(l_core_target, true);
+
+                    if( l_errl )
+                    {
+                        TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                               "loadPM complex, switching core checkstops "
+                               "from unit to system ERROR: reason=0x%x",
+                               l_errl->reasonCode() );
+
+                        // Capture the target data in the elog
+                        ERRORLOG::ErrlUserDetailsTarget(l_core_target).
+                                addToLog(l_errl);
+                        break;
+
+                    }
+                }
+            }
+            if(l_errl)
             {
-                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
-                           ERR_MRK"loadAndStartPMAll: "
-                           "load PM complex failed!" );
-                o_failTarget = l_procChip;
                 break;
             }
 
-            l_errl = startPMComplex(l_procChip);
+            for (const auto & l_procChip: l_procChips)
+            {
+                // This attr was set during istep15 HCODE build
+                l_homerPhysAddr = l_procChip->
+                        getAttr<TARGETING::ATTR_HOMER_PHYS_ADDR>();
+                l_commonPhysAddr = l_sys->
+                        getAttr<TARGETING::ATTR_OCC_COMMON_AREA_PHYS_ADDR>();
+
+                l_errl = loadPMComplex(l_procChip,
+                                       l_homerPhysAddr,
+                                       l_commonPhysAddr,
+                                       i_mode);
+                if( l_errl )
+                {
+                    TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                               ERR_MRK"loadAndStartPMAll: "
+                               "load PM complex failed!" );
+                    o_failTarget = l_procChip;
+                    break;
+                }
+
+                l_errl = startPMComplex(l_procChip);
+                if( l_errl )
+                {
+                    TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                               ERR_MRK"loadAndStartPMAll: "
+                               "start PM complex failed!" );
+                    o_failTarget = l_procChip;
+                    break;
+                }
+            }
+
             if( l_errl )
             {
-                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
-                           ERR_MRK"loadAndStartPMAll: "
-                           "start PM complex failed!" );
-                o_failTarget = l_procChip;
                 break;
             }
-        }
+
+            if(is_sapphire_load())
+            {
+                l_errl = core_checkstop_helper_homer();
+
+                if( l_errl )
+                {
+                    TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                           "loadPM complex switching homer xstops from unit "
+                           "to system error. ERROR: reaso=0x%x",
+                           l_errl->reasonCode() );
+                }
+            }
+
+        }while(0);
 
         return l_errl;
+
     } // loadAndStartPMAll
 
 
@@ -1208,5 +1268,167 @@ namespace HBPM
         return l_err;
     } // end getRingOvd
 
+//
+//  Helper function to enable or disable core checkstops with the HWP
+//
+errlHndl_t core_checkstop_helper_hwp( const TARGETING::Target* i_core_target,
+                            bool i_override_restore)
+{
+    TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,ENTER_MRK
+               "core_checkstop_helper_hwp");
+
+    errlHndl_t l_errl = NULL;
+    TARGETING::Target* l_sys = NULL;
+    TARGETING::targetService().getTopLevelTarget(l_sys);
+    assert( l_sys != NULL );
+
+    do
+    {
+        assert( i_core_target != NULL );
+
+        const fapi2::Target<fapi2::TARGET_TYPE_CORE> l_fapi2_coreTarget(
+                const_cast<TARGETING::Target*> ( i_core_target ));
+
+        FAPI_INVOKE_HWP( l_errl, p9_core_checkstop_handler,
+                         l_fapi2_coreTarget, i_override_restore);
+
+        if( l_errl )
+        {
+            TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                       "p9_core_checkstop_handler ERROR: returning "
+                       "errorlog, reason=0x%x", l_errl->reasonCode() );
+
+            // Capture the target data in the elog
+            ERRORLOG::ErrlUserDetailsTarget(i_core_target).
+                   addToLog( l_errl );
+            break;
+        }
+    }while(0);
+
+    if( l_errl )
+    {
+        // Commit Error
+        errlCommit( l_errl, HWPF_COMP_ID );
+    }
+
+    TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,EXIT_MRK
+               "core_checkstop_helper_hwp");
+
+    return l_errl;
+}
+
+//
+//  Helper function to disable core checkstops with the HOMER
+//
+errlHndl_t core_checkstop_helper_homer()
+{
+    TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,ENTER_MRK
+               "core_checkstop_helper_homer");
+
+    errlHndl_t l_errl = NULL;
+    TARGETING::Target* l_sys = NULL;
+    TARGETING::targetService().getTopLevelTarget(l_sys);
+    assert( l_sys != NULL );
+
+    do{
+
+        uint64_t l_action0 = l_sys->getAttr<
+                    TARGETING::ATTR_ORIG_FIR_SETTINGS_ACTION0>();
+        uint64_t l_action1 = l_sys->getAttr<
+                    TARGETING::ATTR_ORIG_FIR_SETTINGS_ACTION1>();
+
+        uint64_t l_local_xstop = l_action0 & l_action1;
+        l_action0 &= ~l_local_xstop;
+        l_action1 &= ~l_local_xstop;
+
+        TARGETING::TargetHandleList l_coreIds;
+        getAllChiplets( l_coreIds, TYPE_CORE, true );
+
+        for(TARGETING::Target* l_core : l_coreIds)
+        {
+            const TARGETING::Target* l_procChip =
+                        TARGETING::getParentChip(l_core);
+
+            const uint64_t l_homerAddr = l_procChip->getAttr<
+                        TARGETING::ATTR_HOMER_PHYS_ADDR>();
+
+            void* l_homerVAddr = HBPM::convertHomerPhysToVirt(
+                                (TARGETING::Target*) l_procChip,
+                                l_homerAddr);
+
+            // Translate the scom address
+            uint64_t l_scomAddr = C_CORE_ACTION0;
+            bool l_needsWakeup = false; // Ignored - SW already enabled
+
+            l_errl = SCOM::scomTranslate( l_core, l_scomAddr,
+                                          l_needsWakeup );
+            if( l_errl )
+            {
+                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, ERR_MRK
+                           "core_checkstop_helper: scomTranslate ERROR");
+                break;
+            }
+
+            stopImageSection::StopReturnCode_t l_srErrl =
+                                p9_stop_save_scom( l_homerVAddr,
+                                l_scomAddr, l_action0,
+                                stopImageSection::P9_STOP_SCOM_REPLACE,
+                                stopImageSection::P9_STOP_SECTION_CORE_SCOM );
+
+            if( l_srErrl != stopImageSection::StopReturnCode_t::
+                                STOP_SAVE_SUCCESS )
+            {
+                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                           "core_checkstop_helper: Returning errorlog, "
+                           "reason=0x%x",l_srErrl );
+
+                break;
+            }
+
+            // Translate the scom address
+            l_scomAddr = C_CORE_ACTION1;
+
+            l_errl = SCOM::scomTranslate(l_core, l_scomAddr,
+                                l_needsWakeup);
+
+            if( l_errl )
+            {
+                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, ERR_MRK
+                           "core_checkstop_helper: scomTranslate ERROR");
+                break;
+            }
+
+            l_srErrl = p9_stop_save_scom( l_homerVAddr,
+                                l_scomAddr, l_action1,
+                                stopImageSection::P9_STOP_SCOM_REPLACE,
+                                stopImageSection::P9_STOP_SECTION_CORE_SCOM );
+
+            if( l_srErrl != stopImageSection::StopReturnCode_t::
+                                STOP_SAVE_SUCCESS )
+            {
+                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                           "core_checkstop_helper: Returning errorlog, "
+                           "reason=0x%x",l_srErrl );
+
+                break;
+            }
+
+        }
+    } while(0);
+
+    if( l_errl )
+    {
+        // Commit Error
+        errlCommit( l_errl, HWPF_COMP_ID );
+    }
+
+    TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,EXIT_MRK
+               "core_checkstop_helper_homer");
+
+    return l_errl;
+
+}
+
+
 }  // end HBPM namespace
 
diff --git a/src/usr/isteps/pm/pm_common.H b/src/usr/isteps/pm/pm_common.H
index 416e0fa3f..6d167dbda 100644
--- a/src/usr/isteps/pm/pm_common.H
+++ b/src/usr/isteps/pm/pm_common.H
@@ -30,6 +30,7 @@
 #include <util/utillidmgr.H>
 #include <diag/prdf/prdfWriteHomerFirData.H>
 #include <isteps/pm/pm_common_ext.H>
+#include <istepHelperFuncs.H>
 
 namespace HBPM
 {
@@ -154,6 +155,26 @@ namespace HBPM
      */
     errlHndl_t resetPMComplex(TARGETING::Target * i_target);
 
+    //
+    // @brief - Handles the core_checkstop_handler HWP
+    //
+    // @param[in] i_core_target      - Core Target ID
+    // @param[in] i_override_restore - settings for the HWP. Are we overriding
+    //                                 the xstop settings (true) or restoring
+    //                                 the original settings (false)
+    //
+    // @return errlHndl_t
+
+    errlHndl_t core_checkstop_helper_hwp(
+                                const TARGETING::Target* i_core_target,
+                                bool i_override_restore);
+    //
+    // @brief - Turns off unit xstops in the homer image
+    //
+    // @return errlHndl_t
+
+    errlHndl_t core_checkstop_helper_homer();
+
 } //namespace HBPM ends
 
 #endif