Fix i2cSetupMasters bug for Centaurs

With the code change for FSI I2C support scom registers are now
calculated.  There was a case in i2cSetupMasters() where the engine
parameter was not set and it created an errant scom register access.
This case has been fixed.

Change-Id: I1fd2e25720d86161142fccae8acd0a7924d22be5
RTC: 109926
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14305
Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

1 files changed, 2 insertions, 7 deletions

diff --git a/src/usr/i2c/i2c.C b/src/usr/i2c/i2c.C
index 5fe216c33..c641c40fe 100755
--- a/src/usr/i2c/i2c.C
+++ b/src/usr/i2c/i2c.C
@@ -1623,15 +1623,9 @@ errlHndl_t i2cForceResetAndUnlock( TARGETING::Target * i_target,
     TRACDCOMP( g_trac_i2c,
                ENTER_MRK"i2cForceResetAndUnlock()" );
 
-
     do
     {
 
-        TRACUCOMP(g_trac_i2c,"i2cForceResetAndUnlock()"
-                  "reset[0x%lx]",
-                  masterAddrs[i_args.engine].reset );
-
-
         // enable diagnostic mode
         // set bit in mode register
         mode_reg_t diagnostic;
@@ -1652,7 +1646,6 @@ errlHndl_t i2cForceResetAndUnlock( TARGETING::Target * i_target,
         }
 
 
-
         //toggle clock line
         err = i2cToggleClockLine( i_target,
                                   i_args );
@@ -1953,6 +1946,8 @@ errlHndl_t i2cSetupMasters ( void )
                  engine < CENTAUR_MASTER_ENGINES;
                  engine++ )
             {
+                args.engine = engine;
+
                 // Write Mode Register:
                 mode.value = 0x0ull;