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authorMatt Derksen <v2cibmd@us.ibm.com>2016-03-18 14:26:25 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2016-03-29 10:28:26 -0400
commite5b5e5d989a56c0ccee7ac7228c9bb220912eba6 (patch)
treea176d883b8e87b5d0613ae0eff2e0c80482ee9a0 /src/usr/hwpf
parent357a4d7080db5551bd025afd4f1977cb9822dc20 (diff)
downloadblackbird-hostboot-e5b5e5d989a56c0ccee7ac7228c9bb220912eba6.tar.gz
blackbird-hostboot-e5b5e5d989a56c0ccee7ac7228c9bb220912eba6.zip
Mirror some more attribute types so istep8 HWP work.
Change-Id: I79499a612855168ca3f0c4b9bf941f0e7e5c18ce RTC:146576 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22351 Tested-by: Jenkins Server Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf')
-rw-r--r--src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_memory_attributes.xml424
-rw-r--r--src/usr/hwpf/makefile3
2 files changed, 1 insertions, 426 deletions
diff --git a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_memory_attributes.xml b/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_memory_attributes.xml
deleted file mode 100644
index 163f8c3f5..000000000
--- a/src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_memory_attributes.xml
+++ /dev/null
@@ -1,424 +0,0 @@
-<!-- IBM_PROLOG_BEGIN_TAG -->
-<!-- This is an automatically generated prolog. -->
-<!-- -->
-<!-- $Source: src/usr/hwpf/hwp/dram_initialization/proc_setup_bars/proc_setup_bars_memory_attributes.xml $ -->
-<!-- -->
-<!-- OpenPOWER HostBoot Project -->
-<!-- -->
-<!-- Contributors Listed Below - COPYRIGHT 2012,2015 -->
-<!-- [+] International Business Machines Corp. -->
-<!-- -->
-<!-- -->
-<!-- Licensed under the Apache License, Version 2.0 (the "License"); -->
-<!-- you may not use this file except in compliance with the License. -->
-<!-- You may obtain a copy of the License at -->
-<!-- -->
-<!-- http://www.apache.org/licenses/LICENSE-2.0 -->
-<!-- -->
-<!-- Unless required by applicable law or agreed to in writing, software -->
-<!-- distributed under the License is distributed on an "AS IS" BASIS, -->
-<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or -->
-<!-- implied. See the License for the specific language governing -->
-<!-- permissions and limitations under the License. -->
-<!-- -->
-<!-- IBM_PROLOG_END_TAG -->
-<!-- $Id: proc_setup_bars_memory_attributes.xml,v 1.15 2015/01/22 17:16:36 jmcgill Exp $ -->
-<!-- proc_setup_bars_memory_attributes.xml -->
-<attributes>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_MEM_MIRROR_PLACEMENT_POLICY</id>
- <targetType>TARGET_TYPE_SYSTEM</targetType>
- <description>Define placement policy/scheme for non-mirrored/mirrored memory
- layout
- creator: platform
- consumer: opt_memmap
- firmware notes:
- NORMAL = non-mirrored start: 0, mirrored start: 512TB
- FLIPPED = mirrored start: 0, non-mirrored start: 512TB
- SELECTIVE = non-mirrored/mirrored start (interleaved): 0
- DRAWER = non-mirrored start: 32TB*drawer, mirrored start: 512TB+(32TB*drawer)
- FLIPPED_DRAWER = mirrored start: 32TB * drawer, non-mirrored start: 512TB+(32TB*drawer)
- </description>
- <valueType>uint8</valueType>
- <enum>
- NORMAL = 0x0,
- FLIPPED = 0x1,
- SELECTIVE = 0x2,
- DRAWER = 0x3,
- FLIPPED_DRAWER = 0x4
- </enum>
- <platInit/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_OPT_MEMMAP_GROUP_POLICY</id>
- <targetType>TARGET_TYPE_SYSTEM</targetType>
- <description>
- Controls scope of group consideration in memory map calculations
- creator: platform
- consumer: opt_memmap
- </description>
- <valueType>uint8</valueType>
- <enum>
- CHIP_AS_GROUP = 0x0,
- GROUP_AS_GROUP = 0x1
- </enum>
- <platInit/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_MIRROR_BASE_ADDRESS</id>
- <targetType>TARGET_TYPE_SYSTEM</targetType>
- <description>
- System-level base address for the start of mirrored memory.
- Defined by platform as part of the global memory map.
- </description>
- <valueType>uint64</valueType>
- <platInit/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_MEM_BASE</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>Base address for non-mirrored memory regions
- creator: platform (proc_config_base_addr)
- consumer: mss_setup_bars
- firmware notes:
- 64-bit RA
- </description>
- <valueType>uint64</valueType>
- <writeable/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_MEM_BASES</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>Non-mirrored memory base addresses
- creator: mss_setup_bars
- consumer: proc_setup_bars, platform
- firmware notes:
- 64-bit RA
- eight independent non-mirrored segments are supported
- (max number based on Venice design)
- </description>
- <valueType>uint64</valueType>
- <array>8</array>
- <writeable/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_MEM_BASES_ACK</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>Non-mirrored memory base addresses
- creator: mss_setup_bars
- consumer: opt_mem_map
- Mem opt map uses this for the bases of the non-mirror ranges.
- (max number based on Venice design)
- </description>
- <valueType>uint64</valueType>
- <array>8</array>
- <writeable/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_MEM_SIZES</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>Size of non-mirrored memory regions
- creator: mss_setup_bars
- consumer: proc_setup_bars, platform
- firmware notes:
- for given index value, address space assumed to be contiguous
- from ATTR_PROC_MEM_BASES value at matching index
- eight independent non-mirrored segments are supported
- (max number based on Venice design)
- </description>
- <valueType>uint64</valueType>
- <array>8</array>
- <writeable/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_MEM_SIZES_ACK</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>Size of non-mirrored memory regions up to a power of 2
- creator: mss_setup_bars
- consumer: opt_mem_map
- Mem opt map uses this to stack mirror ranges. The real amount of memory behind the mirror group maybe less than the number reported here if there are memory holes
- </description>
- <valueType>uint64</valueType>
- <array>8</array>
- <writeable/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_MIRROR_BASE</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>Base address for mirrored memory regions
- creator: platform (proc_config_base_addr)
- consumer: mss_setup_bars
- firmware notes:
- 64-bit RA
- </description>
- <valueType>uint64</valueType>
- <writeable/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_MIRROR_BASES</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>Mirrored memory base addresses
- creator: mss_setup_bars
- consumer: proc_setup_bars, platform
- firmware notes:
- 64-bit RA
- four independent mirrored segments are supported
- (max number based on Venice design)
- </description>
- <valueType>uint64</valueType>
- <array>4</array>
- <writeable/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_MIRROR_BASES_ACK</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>Mirrored memory base addresses
- creator: mss_setup_bars
- consumer: consumer: opt_mem_map
- Mem opt map uses this for the bases of the mirror ranges.
- (max number based on Venice design)
- </description>
- <valueType>uint64</valueType>
- <array>4</array>
- <writeable/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_MIRROR_SIZES</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>Size of mirrored memory region
- creator: mss_setup_bars
- consumer: proc_setup_bars, platform
- firmware notes:
- for given index value, address space assumed to be contiguous
- from ATTR_PROC_MIRROR_BASES value at matching index
- four independent mirrored segments are supported
- (max number based on Venice design)
- </description>
- <valueType>uint64</valueType>
- <array>4</array>
- <writeable/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_MIRROR_SIZES_ACK</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>Size of mirrored memory region up to a power of 2
- creator: mss_setup_bars
- consumer: opt_mem_map
- Mem opt map uses this to stack mirror ranges. The real amount of memory behind the mirror group maybe less than the number reported here if there are memory holes
- </description>
- <valueType>uint64</valueType>
- <array>4</array>
- <writeable/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_FOREIGN_NEAR_BASE</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>Foreign (near) address region base address
- creator: platform
- consumer: proc_setup_bars
- firmware notes:
- 64-bit RA
- two independent regions are supported
- (one per foreign link)
- </description>
- <valueType>uint64</valueType>
- <array>2</array>
- <platInit/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_FOREIGN_NEAR_SIZE</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>Size of foreign (near) region
- creator: platform
- consumer: proc_setup_bars
- firmware notes:
- address space assumed to be contiguous from associated
- ATTR_PROC_FOREIGN_NEAR_BASE for given index value
- two independent regions are supported
- (one per foreign link)
- </description>
- <valueType>uint64</valueType>
- <array>2</array>
- <platInit/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_FOREIGN_FAR_BASE</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>Foreign (far) address region base address
- creator: platform
- consumer: proc_setup_bars
- firmware notes:
- 64-bit RA
- two independent regions are supported
- (one per foreign link)
- </description>
- <valueType>uint64</valueType>
- <array>2</array>
- <platInit/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_FOREIGN_FAR_SIZE</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>Size of foreign (far) region
- creator: platform
- consumer: proc_setup_bars
- firmware notes:
- address space assumed to be contiguous from associated
- ATTR_PROC_FOREIGN_FAR_BASE for given index value
- two independent regions are supported
- (one per foreign link)
- </description>
- <valueType>uint64</valueType>
- <array>2</array>
- <platInit/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_HA_BASE</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>HA logging base address
- firmware notes:
- 64-bit RA
- eight independent segments are supported
- (max number based on Venice design)
- </description>
- <valueType>uint64</valueType>
- <array>8</array>
- <platInit/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_HA_SIZE</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>Size of HA memory region
- firmware notes:
- address space assumed to be contiguous from associated
- ATTR_PROC_HA_BASE for given index value
- eight independent segments are supported
- (max number based on Venice design)
- </description>
- <valueType>uint64</valueType>
- <array>8</array>
- <platInit/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_HTM_BAR_SIZE</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>Desired HTM trace memory size value
- creator: platform
- firmware notes:
- set by platform to request size of per-chip area reserved
- for HTM trace memory
- </description>
- <valueType>uint64</valueType>
- <enum>
- 256_GB = 0x0000004000000000,
- 128_GB = 0x0000002000000000,
- 64_GB = 0x0000001000000000,
- 32_GB = 0x0000000800000000,
- 16_GB = 0x0000000400000000,
- 8_GB = 0x0000000200000000,
- 4_GB = 0x0000000100000000,
- 2_GB = 0x0000000080000000,
- 1_GB = 0x0000000040000000,
- 512_MB = 0x0000000020000000,
- 256_MB = 0x0000000010000000,
- 128_MB = 0x0000000008000000,
- 64_MB = 0x0000000004000000,
- 32_MB = 0x0000000002000000,
- 16_MB = 0x0000000001000000,
- ZERO = 0x0000000000000000
- </enum>
- <platInit/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_HTM_BAR_BASE_ADDR</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>HTM trace memory base address allocated
- </description>
- <valueType>uint64</valueType>
- <writeable/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_OCC_SANDBOX_SIZE</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>Desired size of OCC sandbox memory region
- creator: platform
- firmware notes:
- set by platform to request size of per-chip area reserved
- for OCC sandbox function
- </description>
- <valueType>uint64</valueType>
- <enum>
- 256_GB = 0x0000004000000000,
- 128_GB = 0x0000002000000000,
- 64_GB = 0x0000001000000000,
- 32_GB = 0x0000000800000000,
- 16_GB = 0x0000000400000000,
- 8_GB = 0x0000000200000000,
- 4_GB = 0x0000000100000000,
- 2_GB = 0x0000000080000000,
- 1_GB = 0x0000000040000000,
- 512_MB = 0x0000000020000000,
- 256_MB = 0x0000000010000000,
- 128_MB = 0x0000000008000000,
- 64_MB = 0x0000000004000000,
- 32_MB = 0x0000000002000000,
- 16_MB = 0x0000000001000000,
- ZERO = 0x0000000000000000
- </enum>
- <platInit/>
- <persistRuntime/>
- </attribute>
- <!-- ********************************************************************* -->
- <attribute>
- <id>ATTR_PROC_OCC_SANDBOX_BASE_ADDR</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>OCC sandbox base address allocated
- </description>
- <valueType>uint64</valueType>
- <writeable/>
- <persistRuntime/>
- </attribute>
-</attributes>
diff --git a/src/usr/hwpf/makefile b/src/usr/hwpf/makefile
index 0b891bb7a..cf3e35a15 100644
--- a/src/usr/hwpf/makefile
+++ b/src/usr/hwpf/makefile
@@ -5,7 +5,7 @@
#
# OpenPOWER HostBoot Project
#
-# Contributors Listed Below - COPYRIGHT 2011,2015
+# Contributors Listed Below - COPYRIGHT 2011,2016
# [+] International Business Machines Corp.
#
#
@@ -183,7 +183,6 @@ HWP_ATTR_XML_FILES += hwp/chip_ec_attributes.xml
HWP_ATTR_XML_FILES += hwp/centaur_ec_attributes.xml
HWP_ATTR_XML_FILES += hwp/common_attributes.xml
HWP_ATTR_XML_FILES += hwp/sync_attributes.xml
-HWP_ATTR_XML_FILES += hwp/dram_initialization/proc_setup_bars/proc_setup_bars_memory_attributes.xml
HWP_ATTR_XML_FILES += hwp/dram_initialization/proc_setup_bars/proc_setup_bars_l3_attributes.xml
HWP_ATTR_XML_FILES += hwp/dram_initialization/proc_setup_bars/proc_setup_bars_mmio_attributes.xml
HWP_ATTR_XML_FILES += hwp/activate_powerbus/proc_build_smp/proc_fab_smp_fabric_attributes.xml
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