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| author | Marty Gloff <mgloff@us.ibm.com> | 2015-12-21 09:28:22 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-04-27 18:03:29 -0400 |
| commit | 74c10a07e91911c40c5189abbca1836f927ff035 (patch) | |
| tree | 4e331cd1488f7312c9f7b19963bd0d03da3ee26c /src/usr/hwpf | |
| parent | 566ab6c4c49dd27220f26f76f19a72bf95ac00cc (diff) | |
| download | blackbird-hostboot-74c10a07e91911c40c5189abbca1836f927ff035.tar.gz blackbird-hostboot-74c10a07e91911c40c5189abbca1836f927ff035.zip | |
Integrate L1 HWPs for instruction start
Move thread activate function to istep06.
Change thread activate to invoke new P9 versions of HWP code.
Change-Id: I556526b60c01bb137b0a6b8a086b87eff4498af8
RTC:134076
CMVC-Prereq: 989911
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/758
Tested-by: Jenkins Server
Tested-by: FSP CI Jenkins
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf')
| -rw-r--r-- | src/usr/hwpf/hwp/makefile | 3 | ||||
| -rw-r--r-- | src/usr/hwpf/hwp/thread_activate/makefile | 58 | ||||
| -rw-r--r-- | src/usr/hwpf/hwp/thread_activate/thread_activate.C | 465 |
3 files changed, 1 insertions, 525 deletions
diff --git a/src/usr/hwpf/hwp/makefile b/src/usr/hwpf/hwp/makefile index 15d759cd0..81bb38267 100644 --- a/src/usr/hwpf/hwp/makefile +++ b/src/usr/hwpf/hwp/makefile @@ -5,7 +5,7 @@ # # OpenPOWER HostBoot Project # -# Contributors Listed Below - COPYRIGHT 2011,2015 +# Contributors Listed Below - COPYRIGHT 2011,2016 # [+] International Business Machines Corp. # # @@ -53,7 +53,6 @@ SUBDIRS += occ.d SUBDIRS += tod_init.d SUBDIRS += nest_chiplets.d SUBDIRS += start_payload.d -SUBDIRS += thread_activate.d SUBDIRS += slave_sbe.d SUBDIRS += pstates.d SUBDIRS += proc_hwreconfig.d diff --git a/src/usr/hwpf/hwp/thread_activate/makefile b/src/usr/hwpf/hwp/thread_activate/makefile deleted file mode 100644 index 421878666..000000000 --- a/src/usr/hwpf/hwp/thread_activate/makefile +++ /dev/null @@ -1,58 +0,0 @@ -# IBM_PROLOG_BEGIN_TAG -# This is an automatically generated prolog. -# -# $Source: src/usr/hwpf/hwp/thread_activate/makefile $ -# -# OpenPOWER HostBoot Project -# -# COPYRIGHT International Business Machines Corp. 2012,2014 -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or -# implied. See the License for the specific language governing -# permissions and limitations under the License. -# -# IBM_PROLOG_END_TAG -ROOTPATH = ../../../../.. - -MODULE = thread_activate - -## support for Targeting and fapi -EXTRAINCDIR += ${ROOTPATH}/src/include/usr/ecmddatabuffer -EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/fapi -EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/plat -EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/hwp - -## pointer to common HWP files -EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/include - -## NOTE: add the base istep dir here. -EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/thread_activate - -## Include sub dirs -## NOTE: add a new EXTRAINCDIR when you add a new HWP -## EXAMPLE: -## EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/thread_activate/<HWP_dir> -EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/thread_activate/proc_thread_control -EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/hwp/utility_procedures - -## NOTE: add new object files when you add a new HWP -OBJS += thread_activate.o -OBJS += proc_thread_control.o - - -## NOTE: add a new directory onto the vpaths when you add a new HWP -## EXAMPLE: -# VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/thread_activate/<HWP_dir> -VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/thread_activate/proc_thread_control - - -include ${ROOTPATH}/config.mk - diff --git a/src/usr/hwpf/hwp/thread_activate/thread_activate.C b/src/usr/hwpf/hwp/thread_activate/thread_activate.C deleted file mode 100644 index efb3ab186..000000000 --- a/src/usr/hwpf/hwp/thread_activate/thread_activate.C +++ /dev/null @@ -1,465 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/usr/hwpf/hwp/thread_activate/thread_activate.C $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2012,2015 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ -/** - * @file thread_activate.C - * - * Support file to start non-primary threads - * - * HWP_IGNORE_VERSION_CHECK - * - */ - -/******************************************************************************/ -// Includes -/******************************************************************************/ -#include <stdint.h> - -#include <initservice/taskargs.H> -#include <errl/errlentry.H> - -#include <devicefw/userif.H> -#include <sys/misc.h> -#include <sys/mm.h> -#include <proc_thread_control.H> - -// targeting support -#include <targeting/common/commontargeting.H> -#include <targeting/common/utilFilter.H> - -// fapi support -#include <fapi.H> -#include <fapiPlatHwpInvoker.H> -#include <hwpf/plat/fapiPlatTrace.H> -#include <isteps/hwpf_reasoncodes.H> -#include "p8_cpu_special_wakeup.H" - -#include <pnor/pnorif.H> -#include <vpd/mvpdenums.H> - -namespace THREAD_ACTIVATE -{ - -/** - * @brief This function will query MVPD and figure out if the master - * core has a fully configured cache or not.. - * - * @param[in] i_masterCoreId - Core number of the core we're running on. - * - * - * @return bool - Indicates if half of cache is deconfigured or not. - * true - half cache deconfigured, only 4MB available - * false -> No Cache deconfigured, 8MB available. -*/ -bool getCacheDeconfig(uint64_t i_masterCoreId) -{ - TRACFCOMP( g_fapiImpTd, - "Entering getCacheDeconfig, i_masterCoreId=0x%.8X", - i_masterCoreId); - - //CH Keyword in LPRx Record of MVPD contains the Cache Deconfig State - //the x in LPRx is the core number. - - errlHndl_t l_errl = NULL; - bool cacheDeconfig = true; - uint64_t theRecord = 0x0; - uint64_t theKeyword = MVPD::CH; - uint8_t * theData = NULL; - size_t theSize = 0; - TARGETING::Target* l_procTarget = NULL; - - do { - // Target: Find the Master processor - TARGETING::targetService().masterProcChipTargetHandle(l_procTarget); - assert(l_procTarget != NULL); - - //Convert core number to LPRx Record ID. - //TODO: use a common utility function for conversion. RTC: 60552 - switch (i_masterCoreId) - { - case 0x0: - theRecord = MVPD::LRP0; - break; - case 0x1: - theRecord = MVPD::LRP1; - break; - case 0x2: - theRecord = MVPD::LRP2; - break; - case 0x3: - theRecord = MVPD::LRP3; - break; - case 0x4: - theRecord = MVPD::LRP4; - break; - case 0x5: - theRecord = MVPD::LRP5; - break; - case 0x6: - theRecord = MVPD::LRP6; - break; - case 0x7: - theRecord = MVPD::LRP7; - break; - case 0x8: - theRecord = MVPD::LRP8; - break; - case 0x9: - theRecord = MVPD::LRP9; - break; - case 0xA: - theRecord = MVPD::LRPA; - break; - case 0xB: - theRecord = MVPD::LRPB; - break; - case 0xC: - theRecord = MVPD::LRPC; - break; - case 0xD: - theRecord = MVPD::LRPD; - break; - case 0xE: - theRecord = MVPD::LRPE; - break; - default: - TRACFCOMP( g_fapiImpTd, - "getCacheDeconfig: No MVPD Record for core 0x%.8X", - i_masterCoreId); - /*@ - * @errortype - * @moduleid fapi::MOD_GET_CACHE_DECONFIG - * @reasoncode fapi::RC_INVALID_RECORD - * @userdata1 Master Core Number - * @userdata2 Master processor chip huid - * @devdesc getCacheDeconfig> Master core is not mapped - * to a LRPx Module VPD Record. - * @custdesc A problem occurred during the IPL - * of the system. - */ - l_errl = new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE, - fapi::MOD_GET_CACHE_DECONFIG, - fapi::RC_INVALID_RECORD, - i_masterCoreId, - TARGETING::get_huid(l_procTarget)); - break; - } - - //First call is just to get the Record size. - l_errl = deviceRead(l_procTarget, - NULL, - theSize, - DEVICE_MVPD_ADDRESS( theRecord, - theKeyword ) ); - if( l_errl ) { break; } - - if(theSize != 1) - { - /*@ - * @errortype - * @moduleid fapi::MOD_GET_CACHE_DECONFIG - * @reasoncode fapi::RC_INCORRECT_KEWORD_SIZE - * @userdata1 Master Core Number - * @userdata2 CH Keyword Size - * @devdesc getCacheDeconfig> LRPx Record, CH keyword - * is incorrect size - * @custdesc A problem occurred during the IPL - * of the system. - */ - l_errl = new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE, - fapi::MOD_GET_CACHE_DECONFIG, - fapi::RC_INCORRECT_KEWORD_SIZE, - i_masterCoreId, - theSize); - break; - } - - theData = static_cast<uint8_t*>(malloc( theSize )); - - //2nd call is to get the actual data. - l_errl = deviceRead(l_procTarget, - theData, - theSize, - DEVICE_MVPD_ADDRESS( theRecord, - theKeyword ) ); - if( l_errl ) { break; } - - - if(0 == theData[0]) - { - cacheDeconfig = false; - } - - } while(0); - - if(NULL != theData) - { - free(theData); - } - - if(NULL != l_errl) - { - //TODO: We may not be able to run with only 4MB - // in the long run so need to revist this after - // we no longer have to deal with parital good - // bringup chips. RTC: 60620 - - //Not worth taking the system down, just assume - //we only have half the cache available. - errlCommit(l_errl,HWPF_COMP_ID); - cacheDeconfig = true; - } - - return cacheDeconfig; -} - - -void activate_threads( errlHndl_t& io_rtaskRetErrl ) -{ - errlHndl_t l_errl = NULL; - - TRACFCOMP( g_fapiTd, - "activate_threads entry" ); - - // get the master processor target - TARGETING::Target* l_masterProc = NULL; - TARGETING::targetService().masterProcChipTargetHandle( l_masterProc ); - if( l_masterProc == NULL ) - { - TRACFCOMP( g_fapiImpTd, - "Could not find master proc!!!" ); - assert(false); - } - - // get the list of core targets for this proc chip - TARGETING::TargetHandleList l_coreTargetList; - TARGETING::getChildChiplets( l_coreTargetList, - l_masterProc, - TARGETING::TYPE_EX, - false); - - // find the core/thread we're running on - task_affinity_pin(); - task_affinity_migrate_to_master(); //just in case... - uint64_t cpuid = task_getcpuid(); - task_affinity_unpin(); - - //NNNCCCPPPPTTT - uint64_t l_masterCoreID = (cpuid & 0x0078)>>3; - uint64_t l_masterThreadID = (cpuid & 0x0007); - - const TARGETING::Target* l_masterCore = NULL; - for( TARGETING::TargetHandleList::const_iterator - core_it = l_coreTargetList.begin(); - core_it != l_coreTargetList.end(); - ++core_it ) - { - TARGETING::ATTR_CHIP_UNIT_type l_coreId = - (*core_it)->getAttr<TARGETING::ATTR_CHIP_UNIT>(); - if( l_coreId == l_masterCoreID ) - { - l_masterCore = (*core_it); - break; - } - } - - do - { - if( l_masterCore == NULL ) - { - TRACFCOMP( g_fapiImpTd, - "Could not find a target for core %d", - l_masterCoreID ); - /*@ - * @errortype - * @moduleid fapi::MOD_THREAD_ACTIVATE - * @reasoncode fapi::RC_NO_MASTER_CORE_TARGET - * @userdata1 Master cpu id (NNNCCCPPPPTTT) - * @userdata2 Master processor chip huid - * @devdesc activate_threads> Could not find a target - * for the master core - * @custdesc A problem occurred during the IPL - * of the system. - */ - l_errl = new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE, - fapi::MOD_THREAD_ACTIVATE, - fapi::RC_NO_MASTER_CORE_TARGET, - cpuid, - TARGETING::get_huid(l_masterProc)); - l_errl->collectTrace("TARG",256); - l_errl->collectTrace(FAPI_TRACE_NAME,256); - l_errl->collectTrace(FAPI_IMP_TRACE_NAME,256); - - break; - } - - TRACFCOMP( g_fapiTd, - "Master CPU : c%d t%d (HUID=%.8X)", - l_masterCoreID, l_masterThreadID, - TARGETING::get_huid(l_masterCore) ); - - // cast OUR type of target to a FAPI type of target. - const fapi::Target l_fapiCore - ( fapi::TARGET_TYPE_EX_CHIPLET, - (const_cast<TARGETING::Target*>(l_masterCore))); - - // AVPs might enable a subset of the available threads - uint64_t max_threads = cpu_thread_count(); - TARGETING::Target* sys = NULL; - TARGETING::targetService().getTopLevelTarget(sys); - assert( sys != NULL ); - uint64_t en_threads = sys->getAttr<TARGETING::ATTR_ENABLED_THREADS>(); - - - // -------------------------------------------------------------------- - //Enbale the special wake-up on master core(EX) - FAPI_INF("\tEnable special wake-up on master core"); - - FAPI_INVOKE_HWP(l_errl, p8_cpu_special_wakeup, - l_fapiCore, - SPCWKUP_ENABLE, - HOST); - - if(l_errl) - { - TRACFCOMP( g_fapiImpTd, - "ERROR: 0x%.8X : p8_cpu_special_wakeup set HWP(cpu %d)", - l_errl->reasonCode(), - l_masterCoreID); - - l_errl->collectTrace(FAPI_TRACE_NAME,256); - l_errl->collectTrace(FAPI_IMP_TRACE_NAME,256); - break; - } - - for( uint64_t thread = 0; thread < max_threads; thread++ ) - { - // Skip the thread that we're running on - if( thread == l_masterThreadID ) - { - continue; - } - - // Skip threads that we shouldn't be starting - if( !(en_threads & (0x8000000000000000>>thread)) ) - { - continue; - } - - // send a magic instruction for PHYP Simics to work... - MAGIC_INSTRUCTION(MAGIC_SIMICS_CORESTATESAVE); - - // parameters: i_target => core target - // i_thread => thread (0..7) - // i_command => - // PTC_CMD_SRESET => initiate sreset thread command - // PTC_CMD_START => initiate start thread command - // PTC_CMD_STOP => initiate stop thread command - // PTC_CMD_STEP => initiate step thread command - // PTC_CMD_QUERY => query and return thread state - // return data in o_ras_status - // i_warncheck => convert pre/post checks errors to - // warnings - // o_ras_status => output: complete RAS status - // register - // o_state => output: thread state info - // see proc_thread_control.H - // for bit enumerations: - // THREAD_STATE_* - ecmdDataBufferBase l_ras_status; - uint64_t l_thread_state; - FAPI_INVOKE_HWP( l_errl, proc_thread_control, - l_fapiCore, //i_target - thread, //i_thread - PTC_CMD_SRESET, //i_command - false, //i_warncheck - l_ras_status, //o_ras_status - l_thread_state); //o_state - - if ( l_errl != NULL ) - { - TRACFCOMP( g_fapiImpTd, - "ERROR: 0x%.8X : proc_thread_control HWP" - "( cpu %d, thread %d, " - "ras status 0x%.16X, thread state 0x%.16X )", - l_errl->reasonCode(), - l_masterCoreID, - thread, - l_ras_status.getDoubleWord(0), - l_thread_state ); - - l_errl->collectTrace(FAPI_TRACE_NAME,256); - l_errl->collectTrace(FAPI_IMP_TRACE_NAME,256); - - // if 1 thread fails it is unlikely that other threads will work - // so we'll just jump out now - break; - } - else - { - TRACFCOMP - (g_fapiTd, - "SUCCESS: proc_thread_control HWP( cpu %d, thread %d, " - "ras status 0x%.16X,thread state 0x%.16X )", - l_masterCoreID, - thread, - l_ras_status.getDoubleWord(0), - l_thread_state ); - } - - TRACFCOMP( g_fapiTd, - "SUCCESS: Thread c%d t%d started", - l_masterCoreID, - thread ); - } - if(l_errl) - { - break; - } - - // Reclaim remainder of L3 cache if available. - if ((!PNOR::usingL3Cache()) && - (!getCacheDeconfig(l_masterCoreID))) - { - TRACFCOMP( g_fapiTd, - "activate_threads: Extending cache to 8MB" ); - mm_extend(MM_EXTEND_FULL_CACHE); - } - - } while(0); - - TRACFCOMP( g_fapiTd, - "activate_threads exit" ); - - io_rtaskRetErrl = l_errl; - return; -} - -}; // end namespace - -/** - * @brief set up _start() task entry procedure for PNOR daemon - */ -TASK_ENTRY_MACRO( THREAD_ACTIVATE::activate_threads ); - |

