diff options
author | Thi Tran <thi@us.ibm.com> | 2014-03-26 21:23:11 -0500 |
---|---|---|
committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2014-03-27 08:20:33 -0500 |
commit | e2669f40b53e00d9eee4a2f3b6bbc745df423535 (patch) | |
tree | a7f601ccd3fc04a2b4feee6770280021e2d0d5f6 /src/usr/hwpf/hwp/initfiles | |
parent | b9896f73b25f5bb2cd29d8b78e904ba9c267763d (diff) | |
download | blackbird-hostboot-e2669f40b53e00d9eee4a2f3b6bbc745df423535.tar.gz blackbird-hostboot-e2669f40b53e00d9eee4a2f3b6bbc745df423535.zip |
INITPROC: Hostboot SW252901 MBSFIR[3]
Change-Id: Ie9e323098cf7475d8748c8b878345348977a9580
CQ:SW252901
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9935
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/initfiles')
-rw-r--r-- | src/usr/hwpf/hwp/initfiles/p8.tpbridge.scom.initfile | 86 |
1 files changed, 85 insertions, 1 deletions
diff --git a/src/usr/hwpf/hwp/initfiles/p8.tpbridge.scom.initfile b/src/usr/hwpf/hwp/initfiles/p8.tpbridge.scom.initfile index df80d0613..94559c4c4 100644 --- a/src/usr/hwpf/hwp/initfiles/p8.tpbridge.scom.initfile +++ b/src/usr/hwpf/hwp/initfiles/p8.tpbridge.scom.initfile @@ -1,4 +1,4 @@ -#-- $Id: p8.tpbridge.scom.initfile,v 1.6 2013/12/16 14:20:14 jmcgill Exp $ +#-- $Id: p8.tpbridge.scom.initfile,v 1.7 2014/03/20 11:18:57 bgeukes Exp $ #------------------------------------------------------------------------------- #-- #-- (C) Copyright International Business Machines Corp. 2011 @@ -112,3 +112,87 @@ scom 0x02010943 { 0:63, 0x1FC0000000000000; } +#### Perform PERV SCOM overwrites to support PLL lock handling by FW through PCB structure +#### Code goes into this initfile, as a dedicated one for PERV content only was not +#### possible at 2014/03/17 anymore. + + +#-------------------------------------------------------------------------------- +#-- Clearing Lock Bit Errors from early IPL phase +#-------------------------------------------------------------------------------- +# PERV Slave Lock Register +# clearing PLL Lock Error Indication +scom 0x010F001F { + bits, scom_data; + 0:63, 0x0000007800000000; +} + +# Nest Slave Lock Register +# clearing PLL Lock Error Indication +scom 0x020F001F { + bits, scom_data; + 0:63, 0x0000007800000000; +} + +# We keep XBUS pll masked as this will not be used in production mode +## XBUS Slave Lock Register +## clearing PLL Lock Error Indication +#scom 0x040F001F { +# bits, scom_data; +# 0:63, 0x0000007800000000; +#} + +# ABUS Slave Lock Register +# clearing PLL Lock Error Indication +scom 0x080F001F { + bits, scom_data; + 0:63, 0x0000007800000000; +} + +# PCI Slave Lock Register +# clearing PLL Lock Error Indication +scom 0x090F001F { + bits, scom_data; + 0:63, 0x0000007800000000; +} + + +#-------------------------------------------------------------------------------- +#-- SCOM initializations of Mask Bits +#-------------------------------------------------------------------------------- + +# PERV Slave Config Register +# un Masking PLL Lock Error Indication +scom 0x010F001E { + bits, scom_data; + 0:63, 0x0070000000000000; +} + +# Nest Slave Config Register +# un Masking PLL Lock Error Indication +scom 0x020F001E { + bits, scom_data; + 0:63, 0x0070000000000000; +} + +# We keep XBUS pll masked as this will not be used in production mode +## XBUS Slave Config Register +## un Masking PLL Lock Error Indication +#scom 0x040F001E { +# bits, scom_data; +# 0:63, 0x0070000000000000; +#} + +# Abus Slave Config Register +# un Masking PLL Lock Error Indication +scom 0x080F001E { + bits, scom_data; + 0:63, 0x0070000000000000; +} + +# PCI Slave Config Register +# un Masking PLL Lock Error Indication +scom 0x090F001E { + bits, scom_data; + 0:63, 0x0070000000000000; +} |