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authorBrian Horton <brianh@linux.ibm.com>2013-03-07 15:04:01 -0600
committerA. Patrick Williams III <iawillia@us.ibm.com>2013-03-14 13:42:28 -0500
commit4565dc9605b9cb7c450e5f2bd4b9b500daf922d3 (patch)
treed9e4d5ad4adb17bc76cd8bc5f445d58b6bf495f5 /src/usr/hwas/common/hwas.C
parentd20d21e2d156288d7eae6a946d0fdd3a32519f29 (diff)
downloadblackbird-hostboot-4565dc9605b9cb7c450e5f2bd4b9b500daf922d3.tar.gz
blackbird-hostboot-4565dc9605b9cb7c450e5f2bd4b9b500daf922d3.zip
Need to support new PG keyword value for PowerBus
PG keyword for the PowerBus has MCL and MCR. Code needs to change to not check for MCL or MCR in determining the chip functionality. In addition, if MCL or MCR is bad, then the appropriate targets are marked non-functional (mcs0..3 for MCL, mcs4..7 for MCR). Change-Id: I0f682538df1b94a7d51ac4ba17e354e3dc818ead RTC: 66138 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3473 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwas/common/hwas.C')
-rw-r--r--src/usr/hwas/common/hwas.C39
1 files changed, 35 insertions, 4 deletions
diff --git a/src/usr/hwas/common/hwas.C b/src/usr/hwas/common/hwas.C
index 9736e3fa7..a89601391 100644
--- a/src/usr/hwas/common/hwas.C
+++ b/src/usr/hwas/common/hwas.C
@@ -5,7 +5,7 @@
/* */
/* IBM CONFIDENTIAL */
/* */
-/* COPYRIGHT International Business Machines Corp. 2011,2012 */
+/* COPYRIGHT International Business Machines Corp. 2011,2013 */
/* */
/* p1 */
/* */
@@ -228,14 +228,15 @@ errlHndl_t discoverTargets()
chipFunctional = false;
}
else
- if (pgData[VPD_CP00_PG_POWERBUS_INDEX] !=
- VPD_CP00_PG_POWERBUS_GOOD)
+ if ((pgData[VPD_CP00_PG_POWERBUS_INDEX] &
+ VPD_CP00_PG_POWERBUS_BASE) !=
+ VPD_CP00_PG_POWERBUS_BASE)
{
HWAS_INF("pTarget %.8X - PowerBus "
"pgPdata[%d]: expected 0x%04X - bad",
pTarget->getAttr<ATTR_HUID>(),
VPD_CP00_PG_POWERBUS_INDEX,
- VPD_CP00_PG_POWERBUS_GOOD);
+ VPD_CP00_PG_POWERBUS_BASE);
chipFunctional = false;
}
} // TYPE_PROC
@@ -324,6 +325,36 @@ errlHndl_t discoverTargets()
descFunctional = false;
}
}
+ else
+ if (pDesc->getAttr<ATTR_TYPE>() == TYPE_MCS)
+ {
+ ATTR_CHIP_UNIT_type indexMCS =
+ pDesc->getAttr<ATTR_CHIP_UNIT>();
+ // check: MCS 0..3 in MCL, MCS 4..7 in MCR
+ if (((indexMCS >=0) && (indexMCS <=3)) &&
+ ((pgData[VPD_CP00_PG_POWERBUS_INDEX] &
+ VPD_CP00_PG_POWERBUS_MCL) == 0))
+ {
+ HWAS_INF("pDesc %.8X - MCS%d "
+ "pgPdata[%d]: MCL expected 0x%04X - bad",
+ pDesc->getAttr<ATTR_HUID>(), indexMCS,
+ VPD_CP00_PG_POWERBUS_INDEX,
+ VPD_CP00_PG_POWERBUS_MCL);
+ descFunctional = false;
+ }
+ else
+ if (((indexMCS >=4) && (indexMCS <=7)) &&
+ ((pgData[VPD_CP00_PG_POWERBUS_INDEX] &
+ VPD_CP00_PG_POWERBUS_MCR) == 0))
+ {
+ HWAS_INF("pDesc %.8X - MCS%d "
+ "pgPdata[%d]: MCR expected 0x%04X - bad",
+ pDesc->getAttr<ATTR_HUID>(), indexMCS,
+ VPD_CP00_PG_POWERBUS_INDEX,
+ VPD_CP00_PG_POWERBUS_MCR);
+ descFunctional = false;
+ }
+ }
} // chipFunctional
// for sub-parts, if it's not functional, it's not present.
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