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authorChristian Geddes <crgeddes@us.ibm.com>2018-08-30 10:52:10 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2018-09-18 21:20:39 -0500
commitbbad6ad29aab4c1aab253d3a33adecffb0e37960 (patch)
treec02b958e02052a6919b220660ac46ead9b56c5d1 /src/usr/fapi2/test
parent5e3f78a64c7c22454b06e215ab16be4337bf455f (diff)
downloadblackbird-hostboot-bbad6ad29aab4c1aab253d3a33adecffb0e37960.tar.gz
blackbird-hostboot-bbad6ad29aab4c1aab253d3a33adecffb0e37960.zip
Add OCMB_CHIP and MEM_PORT fapi2 test cases
This commit adds test cases for new OCMB_CHIP and MEM_PORT target types that are being added to support the new explorer memory buffer used in Axone. Also this commit fixed up the Axone target generation which was missing a break on the inner loop and removed some changes that were made in target.H which was allowing invalid parets to be looked up for dimm targets. RTC: 172970 Change-Id: I7564fbcfcdde2177ece934015fe40c79011f559f Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65511 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/fapi2/test')
-rw-r--r--src/usr/fapi2/test/fapi2GetChildrenTest.H38
-rw-r--r--src/usr/fapi2/test/fapi2GetParentTest.H21
-rw-r--r--src/usr/fapi2/test/fapi2HwpTest.H2
-rw-r--r--src/usr/fapi2/test/fapi2IsFunctionalTest.H2
-rw-r--r--src/usr/fapi2/test/fapi2TestUtils.C488
-rw-r--r--src/usr/fapi2/test/fapi2TestUtils.H13
-rw-r--r--src/usr/fapi2/test/p9_sample_procedure.C538
-rw-r--r--src/usr/fapi2/test/p9_sample_procedure.H8
8 files changed, 239 insertions, 871 deletions
diff --git a/src/usr/fapi2/test/fapi2GetChildrenTest.H b/src/usr/fapi2/test/fapi2GetChildrenTest.H
index 38ca8444e..6dbe88e86 100644
--- a/src/usr/fapi2/test/fapi2GetChildrenTest.H
+++ b/src/usr/fapi2/test/fapi2GetChildrenTest.H
@@ -84,6 +84,8 @@ void test_fapi2GetChildren()
std::vector<Target<fapi2::TARGET_TYPE_XBUS> > l_childXBUSs;
std::vector<Target<fapi2::TARGET_TYPE_DMI> > l_childDMIs;
std::vector<Target<fapi2::TARGET_TYPE_OMI> > l_childOMIs;
+ std::vector<Target<fapi2::TARGET_TYPE_OCMB_CHIP> > l_childOCMBs;
+ std::vector<Target<fapi2::TARGET_TYPE_MEM_PORT> > l_childMEMPORTs;
if (isHwValid(l_proc, MY_MCA)
@@ -231,6 +233,42 @@ void test_fapi2GetChildren()
}
}
+ if (isHwValid(l_proc, MY_OMI)
+ && isHwValid(l_proc, MY_OCMB))
+ {
+ l_childOCMBs = fapi2_omiTarget.getChildren<fapi2::TARGET_TYPE_OCMB_CHIP>(TARGET_STATE_PRESENT);
+ l_targetHuid = TARGETING::get_huid(targeting_targets[MY_OMI]);
+ l_actualSize = l_childOCMBs.size();
+
+ //Set expected size to be the number of OMIs per proc
+ l_expectedSize = OCMB_PER_OMI;
+ numTests++;
+ if(l_actualSize != l_expectedSize)
+ {
+ FAPI_INF("fapi2TargetTest:: OCMBs per proc mismatch");
+ numFails++;
+ break;
+ }
+ }
+
+ if (isHwValid(l_proc, MY_OCMB)
+ && isHwValid(l_proc, MY_MEM_PORT))
+ {
+ l_childMEMPORTs = fapi2_ocmbTarget.getChildren<fapi2::TARGET_TYPE_MEM_PORT>(TARGET_STATE_PRESENT);
+ l_targetHuid = TARGETING::get_huid(targeting_targets[MY_OCMB]);
+ l_actualSize = l_childOCMBs.size();
+
+ //Set expected size to be the number of OMIs per proc
+ l_expectedSize = MEM_PORT_PER_OCMB;
+ numTests++;
+ if(l_actualSize != l_expectedSize)
+ {
+ FAPI_INF("fapi2TargetTest:: MEM_PORTs per proc mismatch");
+ numFails++;
+ break;
+ }
+ }
+
l_childCores = fapi2_exTarget.getChildren<fapi2::TARGET_TYPE_CORE>(TARGET_STATE_PRESENT);
l_targetHuid = TARGETING::get_huid(targeting_targets[MY_EX]) ;
diff --git a/src/usr/fapi2/test/fapi2GetParentTest.H b/src/usr/fapi2/test/fapi2GetParentTest.H
index 1dd8ea865..6ac5e9926 100644
--- a/src/usr/fapi2/test/fapi2GetParentTest.H
+++ b/src/usr/fapi2/test/fapi2GetParentTest.H
@@ -69,9 +69,6 @@ void test_fapi2GetParent()
if(TARGETING::get_huid(targeting_targets[PARENT_TEST_TARGET_ID]) != \
TARGETING::get_huid(l_parent)) \
{ \
- uint8_t l_instance = 0; \
- targeting_targets[TEST_TARGET_ID]-> \
- tryGetAttr<TARGETING::ATTR_CHIP_UNIT>(l_instance); \
TS_FAIL("fapi2TargetTest::Unable to find SRC_TYPE's" #PARENT_TYPE "parent!"); \
numFails++; \
} \
@@ -228,6 +225,24 @@ void test_fapi2GetParent()
GET_PARENT_TEST_MACRO(MY_OMI, TARGET_TYPE_OMI, MY_MC, TARGET_TYPE_MC)
}
}
+ // OCMB Parent Tests
+ if (isHwValid(l_proc, MY_OCMB))
+ {
+ if (isHwValid(l_proc, MY_OMI))
+ {
+ // Check parent OMI
+ GET_PARENT_TEST_MACRO(MY_OCMB, TARGET_TYPE_OCMB_CHIP, MY_OMI, TARGET_TYPE_OMI)
+ }
+ }
+ // MEM_PORT Parent Tests
+ if (isHwValid(l_proc, MY_MEM_PORT))
+ {
+ if (isHwValid(l_proc, MY_OCMB))
+ {
+ // Check parent OCMB
+ GET_PARENT_TEST_MACRO(MY_MEM_PORT, TARGET_TYPE_MEM_PORT, MY_OCMB, TARGET_TYPE_OCMB_CHIP)
+ }
+ }
// End Axone only targets
static pervasiveParentTestRec nimbusPervasiveParentTests [] = {
diff --git a/src/usr/fapi2/test/fapi2HwpTest.H b/src/usr/fapi2/test/fapi2HwpTest.H
index 416086c81..63ef6af69 100644
--- a/src/usr/fapi2/test/fapi2HwpTest.H
+++ b/src/usr/fapi2/test/fapi2HwpTest.H
@@ -102,6 +102,8 @@ void test_fapi2Hwp()
HWP_TEST_MODEL_SPECIFIC_MACRO(p9_sample_procedure_omi, fapi2_omiTarget, MY_OMI)
HWP_TEST_MODEL_SPECIFIC_MACRO(p9_sample_procedure_omic, fapi2_omicTarget, MY_OMIC)
HWP_TEST_MODEL_SPECIFIC_MACRO(p9_sample_procedure_mcc, fapi2_mccTarget, MY_MCC)
+ HWP_TEST_MODEL_SPECIFIC_MACRO(p9_sample_procedure_ocmb, fapi2_ocmbTarget, MY_OCMB)
+ HWP_TEST_MODEL_SPECIFIC_MACRO(p9_sample_procedure_mem_port, fapi2_memportTarget, MY_MEM_PORT)
}while(0);
FAPI_INF("test_fapiHWP:: Test Complete. %d/%d fails", numFails,numTests);
diff --git a/src/usr/fapi2/test/fapi2IsFunctionalTest.H b/src/usr/fapi2/test/fapi2IsFunctionalTest.H
index 861c917c8..6ebebcbcf 100644
--- a/src/usr/fapi2/test/fapi2IsFunctionalTest.H
+++ b/src/usr/fapi2/test/fapi2IsFunctionalTest.H
@@ -91,6 +91,8 @@ class Fapi2IsFunctional : public CxxTest::TestSuite
IS_FUNCTIONAL_TEST_MACRO(targeting_targets[MY_OMIC], fapi2_omicTarget)
IS_FUNCTIONAL_TEST_MACRO(targeting_targets[MY_MCC], fapi2_mccTarget)
IS_FUNCTIONAL_TEST_MACRO(targeting_targets[MY_PROC], fapi2_procTarget)
+ IS_FUNCTIONAL_TEST_MACRO(targeting_targets[MY_OCMB], fapi2_ocmbTarget)
+ IS_FUNCTIONAL_TEST_MACRO(targeting_targets[MY_MEM_PORT], fapi2_memportTarget)
} while(0);
diff --git a/src/usr/fapi2/test/fapi2TestUtils.C b/src/usr/fapi2/test/fapi2TestUtils.C
index bb548e057..3d5c59894 100644
--- a/src/usr/fapi2/test/fapi2TestUtils.C
+++ b/src/usr/fapi2/test/fapi2TestUtils.C
@@ -33,29 +33,20 @@
#include <fapi2.H>
#include "fapi2TestUtils.H"
+#define RESET_EPATH_TO_MASTER \
+ i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath); \
+ assert(TARGETING::targetService().toTarget(l_epath) != nullptr, \
+ "sys0node0proc0 should be valid according to system xml"); \
-//This is subject to change, try to keep updated
-#define NUM_EQS 6
-#define NUM_EXS 2
-#define NUM_CORES 2
-#define NUM_MCS 2
-#define NUM_MCAS 2
-#define NUM_MCBISTS 2
-#define NUM_PECS 3
-#define NUM_PHBS 6
-#define NUM_XBUS 2
-#define NUM_OBUS 2
-#define NUM_OBUS_BRICK 3
-#define NUM_PPES 21
-#define NUM_PERVS 55
-#define NUM_CAPPS 2
-#define NUM_SBES 1
-#define NUM_MC 2
-#define NUM_MI 2
-#define NUM_DMI 2
-#define NUM_OMI 2
-#define NUM_OMIC 3
-#define NUM_MCC 2
+#define CAT(a,b) a b
+#define VAL(str) #str
+
+#define GENERATE_TARGET(PLAT_TARGET_TYPE, EPATH_STRING, TARGET_TEST_ENUM, POS) \
+ l_epath.addLast(TARGETING::PLAT_TARGET_TYPE,POS); \
+ assert(TARGETING::targetService().toTarget(l_epath) != nullptr, \
+ CAT(#EPATH_STRING, " should be valid according to system xml")); \
+ o_targetList[TARGET_TEST_ENUM] = \
+ TARGETING::targetService().toTarget(l_epath);
namespace fapi2
{
@@ -63,381 +54,130 @@ namespace fapi2
void generateTargets(TARGETING::Target* i_pMasterProcChip,
TARGETING::Target* o_targetList[])
{
+ TARGETING::EntityPath l_epath;
+
+ // ensure o_targetList is initialized to nullptrs
for( uint64_t x = 0; x < NUM_TARGETS; x++ )
{
o_targetList[x] = nullptr;
}
- // Set up entity path for proc
- TARGETING::EntityPath l_epath;
- i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath);
+ // Start generic P9 Target
+ // Use the GENERATE_TARGET macro to generate the target if the pos 0
+ // unit exists in the simics test xml. This is true for most targets
+ // Set up entity path for proc
+ RESET_EPATH_TO_MASTER
o_targetList[MY_PROC] = i_pMasterProcChip;
- //Setup EQs, COREs, and EXs
- for(int i = 0; i < NUM_EQS; i++)
- {
- l_epath.addLast(TARGETING::TYPE_EQ,i);
- if(TARGETING::targetService().toTarget(l_epath) != nullptr)
- {
- o_targetList[MY_EQ] =
- TARGETING::targetService().toTarget(l_epath);
- for(int j = 0; j < NUM_EXS; j++)
- {
- l_epath.addLast(TARGETING::TYPE_EX,i);
- if(TARGETING::targetService().toTarget(l_epath) != nullptr)
- {
- o_targetList[MY_EX] =
- TARGETING::targetService().toTarget(l_epath);
- for(int k = 0; k < NUM_CORES; k++)
- {
- l_epath.addLast(TARGETING::TYPE_CORE,k);
- if(TARGETING::targetService().toTarget(l_epath)!=nullptr)
- {
- o_targetList[MY_CORE] =
- TARGETING::targetService().toTarget(l_epath);
- break;
- }
- else
- {
- l_epath.removeLast();
- }
- }
- break;
- }
- else
- {
- l_epath.removeLast();
- }
- }
- break;
- }
- else
- {
- l_epath.removeLast();
- }
- }
+ // Setup EQ, EX, and CORE targets which are common among all P9 Chips
+ GENERATE_TARGET(TYPE_EQ,sys0node0proc0eq0,MY_EQ,0)
+ GENERATE_TARGET(TYPE_EX,sys0node0proc0eq0ex0,MY_EX,0)
+ GENERATE_TARGET(TYPE_CORE,sys0node0proc0eq0ex0core0,MY_CORE,0)
- if (TARGETING::MODEL_NIMBUS ==
- i_pMasterProcChip->getAttr<TARGETING::ATTR_MODEL>())
- {
- //Setup MCBISTs, MCSs, and MCAs
- i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath);
- for(int i = 0; i < NUM_MCBISTS; i++)
- {
- l_epath.addLast(TARGETING::TYPE_MCBIST, i);
- if(TARGETING::targetService().toTarget(l_epath) != nullptr)
- {
- o_targetList[MY_MCBIST] =
- TARGETING::targetService().toTarget(l_epath);
- for(int j = 0; j < NUM_MCS; j++)
- {
- l_epath.addLast(TARGETING::TYPE_MCS, j);
- if(TARGETING::targetService().toTarget(l_epath) != nullptr)
- {
- o_targetList[MY_MCS] =
- TARGETING::targetService().toTarget(l_epath);
- for(int k = 0; k < NUM_MCAS; k++)
- {
- l_epath.addLast(TARGETING::TYPE_MCA,k);
- if(TARGETING::targetService().toTarget(l_epath)!=nullptr)
- {
- o_targetList[MY_MCA] =
- TARGETING::targetService().toTarget(l_epath);
- break;
- }
- else
- {
- l_epath.removeLast();
- }
- }
- break;
- }
- else
- {
- l_epath.removeLast();
- }
- }
- break;
- }
- else
- {
- l_epath.removeLast();
- }
- }
- }
- else if (TARGETING::MODEL_CUMULUS ==
- i_pMasterProcChip->getAttr<TARGETING::ATTR_MODEL>())
- {
- //Setup MC, MI, DMI
- i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath);
- for(int i = 0; i < NUM_MC; i++)
- {
- l_epath.addLast(TARGETING::TYPE_MC, i);
- if(TARGETING::targetService().toTarget(l_epath) != nullptr)
- {
- o_targetList[MY_MC] =
- TARGETING::targetService().toTarget(l_epath);
- for(int j = 0; j < NUM_MI; j++)
- {
- l_epath.addLast(TARGETING::TYPE_MI, j);
- if(TARGETING::targetService().toTarget(l_epath) != nullptr)
- {
- o_targetList[MY_MI] =
- TARGETING::targetService().toTarget(l_epath);
- for(int k = 0; k < NUM_DMI; k++)
- {
- l_epath.addLast(TARGETING::TYPE_DMI,k);
- if(TARGETING::targetService().toTarget(l_epath)!=nullptr)
- {
- o_targetList[MY_DMI] =
- TARGETING::targetService().toTarget(l_epath);
- break;
- }
- else
- {
- l_epath.removeLast();
- }
- }
- break;
- }
- else
- {
- l_epath.removeLast();
- }
- }
- break;
- }
- else
- {
- l_epath.removeLast();
- }
- }
- }
- else if (TARGETING::MODEL_AXONE ==
- i_pMasterProcChip->getAttr<TARGETING::ATTR_MODEL>())
- {
- //Setup MC, MI, MCC, OMI, and OMIC
- i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath);
- for(int i = 0; i < NUM_MC; i++)
- {
- l_epath.addLast(TARGETING::TYPE_MC, i);
- if(TARGETING::targetService().toTarget(l_epath) != nullptr)
- {
- o_targetList[MY_MC] =
- TARGETING::targetService().toTarget(l_epath);
- for(int j = 0; j < NUM_MI; j++)
- {
- l_epath.addLast(TARGETING::TYPE_MI, j);
- if(TARGETING::targetService().toTarget(l_epath) != nullptr)
- {
- o_targetList[MY_MI] =
- TARGETING::targetService().toTarget(l_epath);
- for(int k = 0; k < NUM_MCC; k++)
- {
- l_epath.addLast(TARGETING::TYPE_MCC,k);
- if(TARGETING::targetService().toTarget(l_epath)!=nullptr)
- {
- o_targetList[MY_MCC] =
- TARGETING::targetService().toTarget(l_epath);
- for(int l = 0; l < NUM_OMI; l++)
- {
- l_epath.addLast(TARGETING::TYPE_OMI,l);
- if(TARGETING::targetService().toTarget(l_epath)!=nullptr)
- {
- o_targetList[MY_OMI] =
- TARGETING::targetService().toTarget(l_epath);
- }
- else
- {
- l_epath.removeLast();
- }
- }
- break;
- }
- else
- {
- l_epath.removeLast();
- }
- }
- break;
- }
- else
- {
- l_epath.removeLast();
- }
- }
- for(int j = 0; j < NUM_OMIC; j++)
- {
- l_epath.addLast(TARGETING::TYPE_OMIC, j);
- if(TARGETING::targetService().toTarget(l_epath) != nullptr)
- {
- o_targetList[MY_OMIC] =
- TARGETING::targetService().toTarget(l_epath);
- }
- else
- {
- l_epath.removeLast();
- }
- }
- break;
- }
- else
- {
- l_epath.removeLast();
- }
- }
- }
+ // Reset l_epath to master proc
+ RESET_EPATH_TO_MASTER
//Setup PECs and PHBs
- i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath);
- for(int i = 0; i < NUM_PECS; i++)
- {
- l_epath.addLast(TARGETING::TYPE_PEC, i);
- if(TARGETING::targetService().toTarget(l_epath) != nullptr)
- {
- o_targetList[MY_PEC] =
- TARGETING::targetService().toTarget(l_epath);
- for(int j = 0; j < NUM_PHBS; j++)
- {
- l_epath.addLast(TARGETING::TYPE_PHB,j);
- if(TARGETING::targetService().toTarget(l_epath) != nullptr)
- {
- o_targetList[MY_PHB] =
- TARGETING::targetService().toTarget(l_epath);
- break;
- }
- else
- {
- l_epath.removeLast();
- }
- }
- break;
- }
- else
- {
- l_epath.removeLast();
- }
- }
+ GENERATE_TARGET(TYPE_PEC,sys0node0proc0pec0,MY_PEC,0)
+ GENERATE_TARGET(TYPE_PHB,sys0node0proc0pec0phb0,MY_PHB,0)
+
+ // Reset l_epath to master proc
+ RESET_EPATH_TO_MASTER
//Setup XBUS
- i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath);
- for(int i = 0; i < NUM_XBUS; i++)
- {
- // Nimbus doesn't have the 0th xbus, so index from 1 for now
- l_epath.addLast(TARGETING::TYPE_XBUS, i+1);
- if(TARGETING::targetService().toTarget(l_epath) != nullptr)
- {
- o_targetList[MY_XBUS] =
- TARGETING::targetService().toTarget(l_epath);
- break;
- }
- else
- {
- l_epath.removeLast();
- }
- }
+ GENERATE_TARGET(TYPE_XBUS,sys0node0proc0xbus1,MY_XBUS,1)
+ // Reset l_epath to master proc
+ RESET_EPATH_TO_MASTER
- //Setup OBUSs
- i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath);
- for(int i = 0; i < NUM_OBUS; i+=3)
- {
- l_epath.addLast(TARGETING::TYPE_OBUS, i);
- if(TARGETING::targetService().toTarget(l_epath) != nullptr)
- {
- o_targetList[MY_OBUS] =
- TARGETING::targetService().toTarget(l_epath);
+ //Setup OBUS, OBUS_BRICK
+ GENERATE_TARGET(TYPE_OBUS,sys0node0proc0obus0,MY_OBUS,0)
+ GENERATE_TARGET(TYPE_OBUS_BRICK,sys0node0proc0obus0obus_brick0,MY_OBUS_BRICK,0)
- for (int j = 0; j < NUM_OBUS_BRICK; j++)
- {
- l_epath.addLast(TARGETING::TYPE_OBUS_BRICK, j);
- if (TARGETING::targetService().toTarget(l_epath) != nullptr)
- {
- o_targetList[MY_OBUS_BRICK] =
- TARGETING::targetService().toTarget(l_epath);
- break;
- }
- else
- {
- l_epath.removeLast();
- }
- }
- break;
- }
- else
- {
- l_epath.removeLast();
- }
- }
+ // Reset l_epath to master proc
+ RESET_EPATH_TO_MASTER
- //Setup PPEs
- i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath);
- for(int i = 0; i < NUM_PPES; i++)
- {
- l_epath.addLast(TARGETING::TYPE_PPE, i);
- if(TARGETING::targetService().toTarget(l_epath) != nullptr)
- {
- o_targetList[MY_PPE] =
- TARGETING::targetService().toTarget(l_epath);
- break;
- }
- else
- {
- l_epath.removeLast();
- }
- }
+ //Setup PPE
+ GENERATE_TARGET(TYPE_PPE,sys0node0proc0ppe0,MY_PPE,0)
- //Setup CAPPs
- i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath);
- for(int i = 0; i < NUM_CAPPS; i++)
- {
- l_epath.addLast(TARGETING::TYPE_CAPP, i);
- if(TARGETING::targetService().toTarget(l_epath) != nullptr)
- {
- o_targetList[MY_CAPP] =
- TARGETING::targetService().toTarget(l_epath);
- break;
- }
- else
- {
- l_epath.removeLast();
- }
- }
+ // Reset l_epath to master proc
+ RESET_EPATH_TO_MASTER
+
+ //Setup CAPP
+ GENERATE_TARGET(TYPE_CAPP,sys0node0proc0capp0,MY_CAPP,0)
+
+ // Reset l_epath to master proc
+ RESET_EPATH_TO_MASTER
//Setup SBE
- i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath);
- for(int i = 0; i < NUM_SBES; i++)
+ GENERATE_TARGET(TYPE_SBE,sys0node0proc0capp0,MY_SBE,0)
+
+ // Reset l_epath to master proc
+ RESET_EPATH_TO_MASTER
+
+ //Setup PERV
+ GENERATE_TARGET(TYPE_PERV,sys0node0proc0perv1,MY_PERV,1)
+
+ // End generic P9 Target
+
+ // Reset l_epath to master proc
+ RESET_EPATH_TO_MASTER
+
+
+ // Start System Specific P9 Target
+
+ // See src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml
+ if (TARGETING::MODEL_NIMBUS ==
+ i_pMasterProcChip->getAttr<TARGETING::ATTR_MODEL>())
{
- l_epath.addLast(TARGETING::TYPE_SBE, i);
- if(TARGETING::targetService().toTarget(l_epath) != nullptr)
- {
- o_targetList[MY_SBE] =
- TARGETING::targetService().toTarget(l_epath);
- break;
- }
- else
- {
- l_epath.removeLast();
- }
+ //Setup MCBIST, MCS, and MCA
+ GENERATE_TARGET(TYPE_MCBIST,sys0node0proc0mcbist0,MY_MCBIST,0)
+ GENERATE_TARGET(TYPE_MCS,sys0node0proc0mcbist0mcs0,MY_MCS,0)
+ GENERATE_TARGET(TYPE_MCA,sys0node0proc0mcbist0mcs0mca0,MY_MCA,0)
}
+ // See src/usr/targeting/common/xmltohb/simics_CUMULUS.system.xml
+ else if (TARGETING::MODEL_CUMULUS ==
+ i_pMasterProcChip->getAttr<TARGETING::ATTR_MODEL>())
+ {
+ //Setup MC, MI, DMI
+ GENERATE_TARGET(TYPE_MC,sys0node0proc0mc0,MY_MC,0)
+ GENERATE_TARGET(TYPE_MI,sys0node0proc0mc0mi0,MY_MI,0)
+ GENERATE_TARGET(TYPE_DMI,sys0node0proc0mc0mi0dmi0,MY_DMI,0)
- //Setup PERVs
- i_pMasterProcChip->tryGetAttr<TARGETING::ATTR_PHYS_PATH>(l_epath);
- for(int i = 0; i < NUM_PERVS; i++)
+ }
+ // See src/usr/targeting/common/xmltohb/simics_AXONE.system.xml
+ else if (TARGETING::MODEL_AXONE ==
+ i_pMasterProcChip->getAttr<TARGETING::ATTR_MODEL>())
{
- l_epath.addLast(TARGETING::TYPE_PERV, i);
- if(TARGETING::targetService().toTarget(l_epath) != nullptr)
- {
- o_targetList[MY_PERV] =
- TARGETING::targetService().toTarget(l_epath);
- break;
- }
- else
- {
+ // Setup MC, MI, MCC, OMI
+ GENERATE_TARGET(TYPE_MC,sys0node0proc0mc0,MY_MC,0)
+ GENERATE_TARGET(TYPE_MI,sys0node0proc0mc0mi0,MY_MI,0)
+ GENERATE_TARGET(TYPE_MCC,sys0node0proc0mc0mi0mcc0,MY_MCC,0)
+ GENERATE_TARGET(TYPE_OMI,sys0node0proc0mc0mi0mcc0omi0,MY_OMI,0)
+
+ // Change epath type for both TYPE_OCMB_CHIP and TYPE_MEM_PORT
+ // so that targeting service will lookup the paths as type AFFINITY_PATH
+ // when looking up the target
+ l_epath.setType(TARGETING::EntityPath::PATH_AFFINITY);
+
+ // Setup OCBM_CHIP and MEM_PORT
+ GENERATE_TARGET(TYPE_OCMB_CHIP,sys0node0ocmb0,MY_OCMB,0)
+ GENERATE_TARGET(TYPE_MEM_PORT,sys0node0ocmb0memport0,MY_MEM_PORT,0)
+
+ // Set l_epath's type back to PATH_PHYSICAL
+ l_epath.setType(TARGETING::EntityPath::PATH_PHYSICAL);
+
+ // Remove MEM_PORT, OCMB_CHIP, OMI, MCC, MI (5 targets)
+ l_epath.removeLast(); l_epath.removeLast();
+ l_epath.removeLast(); l_epath.removeLast();
l_epath.removeLast();
- }
+
+ // Setup OMIC
+ GENERATE_TARGET(TYPE_OMIC,sys0node0proc0mc0omic0,MY_OMIC,0)
}
+
+ // End System Specific P9 Target
}
bool isHwValid(TARGETING::Target* i_procChip, uint8_t i_hwType)
@@ -454,7 +194,8 @@ bool isHwValid(TARGETING::Target* i_procChip, uint8_t i_hwType)
if (l_model == TARGETING::MODEL_CUMULUS)
{
if (i_hwType == MY_MCS || i_hwType == MY_MCA || i_hwType == MY_MCBIST ||
- i_hwType == MY_OMI || i_hwType == MY_OMIC || i_hwType == MY_MCC )
+ i_hwType == MY_OMI || i_hwType == MY_OMIC || i_hwType == MY_MCC ||
+ i_hwType == MY_OCMB || i_hwType == MY_MEM_PORT)
{
isValid = false;
}
@@ -462,7 +203,8 @@ bool isHwValid(TARGETING::Target* i_procChip, uint8_t i_hwType)
else if (l_model == TARGETING::MODEL_NIMBUS)
{
if (i_hwType == MY_MC || i_hwType == MY_MI || i_hwType == MY_DMI ||
- i_hwType == MY_OMI || i_hwType == MY_OMIC || i_hwType == MY_MCC)
+ i_hwType == MY_OMI || i_hwType == MY_OMIC || i_hwType == MY_MCC ||
+ i_hwType == MY_OCMB || i_hwType == MY_MEM_PORT)
{
isValid = false;
}
diff --git a/src/usr/fapi2/test/fapi2TestUtils.H b/src/usr/fapi2/test/fapi2TestUtils.H
index f513a5fc9..2d51330c2 100644
--- a/src/usr/fapi2/test/fapi2TestUtils.H
+++ b/src/usr/fapi2/test/fapi2TestUtils.H
@@ -50,6 +50,8 @@
#define MCC_PER_MI 2
#define OMI_PER_MCC 2
#define OMIC_PER_MC 3
+#define OCMB_PER_OMI 1
+#define MEM_PORT_PER_OCMB 1
#define SIMULATED_GOOD_CORES 4
@@ -119,6 +121,8 @@ enum FAPI2_TEST_TARGET_ID {
MY_OMI,
MY_OMIC,
MY_MCC,
+ MY_OCMB,
+ MY_MEM_PORT,
NUM_TARGETS
};
@@ -195,10 +199,11 @@ fapi2::Target<fapi2::TARGET_TYPE_MCBIST> fapi2_mcbistTarget(targeting_target
fapi2::Target<fapi2::TARGET_TYPE_MC> fapi2_mcTarget(targeting_targets[MY_MC]); /* Cumulus / Axone*/\
fapi2::Target<fapi2::TARGET_TYPE_MI> fapi2_miTarget(targeting_targets[MY_MI]); /* Cumulus / Axone*/\
fapi2::Target<fapi2::TARGET_TYPE_DMI> fapi2_dmiTarget(targeting_targets[MY_DMI]); /* Cumulus */ \
-fapi2::Target<fapi2::TARGET_TYPE_OMI> fapi2_omiTarget(targeting_targets[MY_OMI]); /* Axone */ \
-fapi2::Target<fapi2::TARGET_TYPE_OMIC> fapi2_omicTarget(targeting_targets[MY_OMIC]); /* Axone */ \
-fapi2::Target<fapi2::TARGET_TYPE_MCC> fapi2_mccTarget(targeting_targets[MY_MCC]); /* Axone */
-
+fapi2::Target<fapi2::TARGET_TYPE_OMI> fapi2_omiTarget(targeting_targets[MY_OMI]); /* Axone */\
+fapi2::Target<fapi2::TARGET_TYPE_OMIC> fapi2_omicTarget(targeting_targets[MY_OMIC]); /* Axone */\
+fapi2::Target<fapi2::TARGET_TYPE_MCC> fapi2_mccTarget(targeting_targets[MY_MCC]); /* Axone */\
+fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> fapi2_ocmbTarget(targeting_targets[MY_OCMB]); /* Axone */\
+fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT> fapi2_memportTarget(targeting_targets[MY_MEM_PORT]); /* Axone */
/**
diff --git a/src/usr/fapi2/test/p9_sample_procedure.C b/src/usr/fapi2/test/p9_sample_procedure.C
index 425768ac7..3e45ae0ef 100644
--- a/src/usr/fapi2/test/p9_sample_procedure.C
+++ b/src/usr/fapi2/test/p9_sample_procedure.C
@@ -37,495 +37,51 @@
//------------------------------------------------------------------------------
-fapi2::ReturnCode p9_sample_procedure_proc(
- fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_ERR("Entering ...");
- FAPI_ERR("Set Scratch Attr on PROC Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1,
- i_target,
- expectedValue));
-
- FAPI_ERR("Get Scratch Attr on PROC Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1,
- i_target,
- l_attr_scratch));
- FAPI_ERR("Read scratch value : %d , expected it to be %d",
- l_attr_scratch,
- expectedValue);
-
-
- fapi_try_exit:
-
- FAPI_ERR("Exiting ...");
-
- return fapi2::current_err;
-
-}
-
-
-fapi2::ReturnCode p9_sample_procedure_ex(
- fapi2::Target<fapi2::TARGET_TYPE_EX>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_ERR("Entering ...");
- FAPI_ERR("Set Scratch Attr on EX Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- expectedValue));
-
- FAPI_ERR("Get Scratch Attr on EX Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- l_attr_scratch));
-
- FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue);
-
-fapi_try_exit:
- FAPI_ERR("Exiting ...");
- return fapi2::current_err;
-
-}
-
-fapi2::ReturnCode p9_sample_procedure_eq(
- fapi2::Target<fapi2::TARGET_TYPE_EQ>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_ERR("Entering ...");
- FAPI_ERR("Set Scratch Attr on EQ Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- expectedValue));
-
- FAPI_ERR("Get Scratch Attr on EQ Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- l_attr_scratch));
- FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue);
-
-fapi_try_exit:
- FAPI_ERR("Exiting ...");
- return fapi2::current_err;
-
-}
-
-fapi2::ReturnCode p9_sample_procedure_core(
- fapi2::Target<fapi2::TARGET_TYPE_CORE>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_ERR("Entering ...");
- FAPI_ERR("Set Scratch Attr on CORE Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- expectedValue));
-
- FAPI_ERR("Get Scratch Attr on CORE Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- l_attr_scratch));
- FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue);
-
-fapi_try_exit:
- FAPI_ERR("Exiting ...");
- return fapi2::current_err;
-
-}
-
-
-
-fapi2::ReturnCode p9_sample_procedure_mcs(
- fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_ERR("Entering ...");
- FAPI_ERR("Set Scratch Attr on MCS Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- expectedValue));
-
- FAPI_ERR("Get Scratch Attr on MCS Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- l_attr_scratch));
- FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue);
-
-fapi_try_exit:
- FAPI_ERR("Exiting ...");
- return fapi2::current_err;
-
-}
-
-fapi2::ReturnCode p9_sample_procedure_mca(
- fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_ERR("Entering ...");
- FAPI_ERR("Set Scratch Attr on MCA Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- expectedValue));
-
- FAPI_ERR("Get Scratch Attr on MCA Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- l_attr_scratch));
- FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue);
-
-fapi_try_exit:
- FAPI_ERR("Exiting ...");
- return fapi2::current_err;
-
-}
-
-fapi2::ReturnCode p9_sample_procedure_mcbist(
- fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_ERR("Entering ...");
- FAPI_ERR("Set Scratch Attr on MCBIST Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- expectedValue));
-
- FAPI_ERR("Get Scratch Attr on MCBIST Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- l_attr_scratch));
- FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue);
-
-fapi_try_exit:
- FAPI_ERR("Exiting ...");
- return fapi2::current_err;
-
-}
-
-fapi2::ReturnCode p9_sample_procedure_xbus(
- fapi2::Target<fapi2::TARGET_TYPE_XBUS>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_ERR("Entering ...");
- FAPI_ERR("Set Scratch Attr on XBUS Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- expectedValue));
-
- FAPI_ERR("Get Scratch Attr on XBUS Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- l_attr_scratch));
- FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue);
-
-fapi_try_exit:
- FAPI_ERR("Exiting ...");
- return fapi2::current_err;
-
-}
-
-fapi2::ReturnCode p9_sample_procedure_capp(
- fapi2::Target<fapi2::TARGET_TYPE_CAPP>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_ERR("Entering ...");
- FAPI_ERR("Set Scratch Attr on CAPP Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- expectedValue));
-
- FAPI_ERR("Get Scratch Attr on CAPP Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- l_attr_scratch));
- FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue);
-
-fapi_try_exit:
- FAPI_ERR("Exiting ...");
- return fapi2::current_err;
-
-}
-
-fapi2::ReturnCode p9_sample_procedure_obus(
- fapi2::Target<fapi2::TARGET_TYPE_OBUS>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_ERR("Entering ...");
- FAPI_ERR("Set Scratch Attr on OBUS Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- expectedValue));
-
- FAPI_ERR("Get Scratch Attr on OBUS Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- l_attr_scratch));
- FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue);
-
-fapi_try_exit:
- FAPI_ERR("Exiting ...");
- return fapi2::current_err;
-
-}
-
-fapi2::ReturnCode p9_sample_procedure_obrick(
- fapi2::Target<fapi2::TARGET_TYPE_OBUS_BRICK>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_ERR("Entering ...");
- FAPI_ERR("Set Scratch Attr on OBUS BRICK Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- expectedValue));
-
- FAPI_ERR("Get Scratch Attr on OBUS BRICK Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- l_attr_scratch));
- FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue);
-
-fapi_try_exit:
- FAPI_ERR("Exiting ...");
- return fapi2::current_err;
-
-}
-
-fapi2::ReturnCode p9_sample_procedure_sbe(
- fapi2::Target<fapi2::TARGET_TYPE_SBE>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_ERR("Entering ...");
- FAPI_ERR("Set Scratch Attr on SBE Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- expectedValue));
-
- FAPI_ERR("Get Scratch Attr on SBE Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- l_attr_scratch));
- FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue);
-
-fapi_try_exit:
- FAPI_ERR("Exiting ...");
- return fapi2::current_err;
-
-}
-
-fapi2::ReturnCode p9_sample_procedure_ppe(
- fapi2::Target<fapi2::TARGET_TYPE_PPE>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_ERR("Entering ...");
- FAPI_ERR("Set Scratch Attr on PPE Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- expectedValue));
-
- FAPI_ERR("Get Scratch Attr on PPE Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- l_attr_scratch));
- FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue);
-
-fapi_try_exit:
- FAPI_ERR("Exiting ...");
- return fapi2::current_err;
-
-}
-
-fapi2::ReturnCode p9_sample_procedure_perv(
- fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_ERR("Entering ...");
- FAPI_ERR("Set Scratch Attr on PERV Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- expectedValue));
-
- FAPI_ERR("Get Scratch Attr on PERV Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- l_attr_scratch));
- FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue);
-
-fapi_try_exit:
- FAPI_ERR("Exiting ...");
- return fapi2::current_err;
-
-}
-
-fapi2::ReturnCode p9_sample_procedure_phb(
- fapi2::Target<fapi2::TARGET_TYPE_PHB>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_ERR("Entering ...");
- FAPI_ERR("Set Scratch Attr on PHB Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- expectedValue));
-
- FAPI_ERR("Get Scratch Attr on PHB Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- l_attr_scratch));
- FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue);
-
-fapi_try_exit:
- FAPI_ERR("Exiting ...");
- return fapi2::current_err;
-
-}
-
-fapi2::ReturnCode p9_sample_procedure_pec(
- fapi2::Target<fapi2::TARGET_TYPE_PEC>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_ERR("Entering ...");
- FAPI_ERR("Set Scratch Attr on PEC Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- expectedValue));
-
- FAPI_ERR("Get Scratch Attr on PEC Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- l_attr_scratch));
- FAPI_ERR("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue);
-
-fapi_try_exit:
- FAPI_ERR("Exiting ...");
- return fapi2::current_err;
-
-}
-
-fapi2::ReturnCode p9_sample_procedure_mc(
- fapi2::Target<fapi2::TARGET_TYPE_MC>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_INF("Entering ...");
- FAPI_INF("Set Scratch Attr on MC Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- expectedValue));
-
- FAPI_INF("Get Scratch Attr on MC Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- l_attr_scratch));
- FAPI_ASSERT( (l_attr_scratch == expectedValue),
- fapi2::FAPI2_SAMPLE(),
- "p9_sample_procedure_mc read scratch value: %d , expected it to be: %d", l_attr_scratch, expectedValue);
- FAPI_INF("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue);
-
-fapi_try_exit:
- FAPI_INF("Exiting ...");
- return fapi2::current_err;
-
-}
-
-fapi2::ReturnCode p9_sample_procedure_mi(
- fapi2::Target<fapi2::TARGET_TYPE_MI>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_INF("Entering ...");
- FAPI_INF("Set Scratch Attr on MI Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- expectedValue));
-
- FAPI_INF("Get Scratch Attr on MI Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- l_attr_scratch));
- FAPI_ASSERT( (l_attr_scratch == expectedValue),
- fapi2::FAPI2_SAMPLE(),
- "p9_sample_procedure_mi read scratch value: %d , expected it to be: %d", l_attr_scratch, expectedValue);
- FAPI_INF("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue);
-
-fapi_try_exit:
- FAPI_INF("Exiting ...");
- return fapi2::current_err;
-
-}
-
-fapi2::ReturnCode p9_sample_procedure_dmi(
- fapi2::Target<fapi2::TARGET_TYPE_DMI>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_INF("Entering ...");
- FAPI_INF("Set Scratch Attr on DMI Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- expectedValue));
-
- FAPI_INF("Get Scratch Attr on DMI Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- l_attr_scratch));
- FAPI_ASSERT( (l_attr_scratch == expectedValue),
- fapi2::FAPI2_SAMPLE(),
- "p9_sample_procedure_dmi read scratch value: %d , expected it to be: %d", l_attr_scratch, expectedValue);
- FAPI_INF("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue);
-
-fapi_try_exit:
- FAPI_INF("Exiting ...");
- return fapi2::current_err;
-
-}
-
-fapi2::ReturnCode p9_sample_procedure_omi(
- fapi2::Target<fapi2::TARGET_TYPE_OMI>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_INF("Entering ...");
- FAPI_INF("Set Scratch Attr on OMI Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- expectedValue));
-
- FAPI_INF("Get Scratch Attr on OMI Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- l_attr_scratch));
- FAPI_ASSERT( (l_attr_scratch == expectedValue),
- fapi2::FAPI2_SAMPLE(),
- "p9_sample_procedure_omi read scratch value: %d , expected it to be: %d", l_attr_scratch, expectedValue);
- FAPI_INF("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue);
-
-fapi_try_exit:
- FAPI_INF("Exiting ...");
- return fapi2::current_err;
-
-}
-
-fapi2::ReturnCode p9_sample_procedure_omic(
- fapi2::Target<fapi2::TARGET_TYPE_OMIC>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_INF("Entering ...");
- FAPI_INF("Set Scratch Attr on OMIC Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- expectedValue));
-
- FAPI_INF("Get Scratch Attr on OMIC Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- l_attr_scratch));
- FAPI_ASSERT( (l_attr_scratch == expectedValue),
- fapi2::FAPI2_SAMPLE(),
- "p9_sample_procedure_omic read scratch value: %d , expected it to be: %d", l_attr_scratch, expectedValue);
- FAPI_INF("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue);
-
-fapi_try_exit:
- FAPI_INF("Exiting ...");
- return fapi2::current_err;
-
-}
-
-fapi2::ReturnCode p9_sample_procedure_mcc(
- fapi2::Target<fapi2::TARGET_TYPE_MCC>& i_target,
- uint8_t expectedValue)
-{
- uint8_t l_attr_scratch = 0;
- FAPI_INF("Entering ...");
- FAPI_INF("Set Scratch Attr on MCC Target");
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- expectedValue));
-
- FAPI_INF("Get Scratch Attr on MCC Target");
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, i_target,
- l_attr_scratch));
- FAPI_ASSERT( (l_attr_scratch == expectedValue),
- fapi2::FAPI2_SAMPLE(),
- "p9_sample_procedure_mcc read scratch value: %d , expected it to be: %d", l_attr_scratch, expectedValue);
- FAPI_INF("Read scratch value : %d , expected it to be %d", l_attr_scratch, expectedValue);
-
-fapi_try_exit:
- FAPI_INF("Exiting ...");
- return fapi2::current_err;
-
-}
-
+#define SAMPLE_PROCEDURE_MACRO( SAMPLE_HWP_NAME, FAPI2_TYPE) \
+fapi2::ReturnCode SAMPLE_HWP_NAME( \
+ fapi2::Target<FAPI2_TYPE>& i_target, \
+ uint8_t expectedValue) \
+{ \
+ uint8_t l_attr_scratch = 0; \
+ FAPI_ERR("Entering ..."); \
+ FAPI_ERR("Set Scratch Attr on PROC Target"); \
+ FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_SCRATCH_UINT8_1, \
+ i_target, \
+ expectedValue)); \
+ FAPI_ERR("Get Scratch Attr on FAPI2_TYPE Target"); \
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SCRATCH_UINT8_1, \
+ i_target, \
+ l_attr_scratch)); \
+ FAPI_ERR("Read scratch value : %d , expected it to be %d", \
+ l_attr_scratch, \
+ expectedValue); \
+ fapi_try_exit: \
+ FAPI_ERR("Exiting ..."); \
+ return fapi2::current_err; \
+}
+
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_proc, fapi2::TARGET_TYPE_PROC_CHIP)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_ex, fapi2::TARGET_TYPE_EX)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_eq, fapi2::TARGET_TYPE_EQ)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_core, fapi2::TARGET_TYPE_CORE)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_mcs, fapi2::TARGET_TYPE_MCS)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_mca, fapi2::TARGET_TYPE_MCA)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_mcbist, fapi2::TARGET_TYPE_MCBIST)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_xbus, fapi2::TARGET_TYPE_XBUS)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_capp, fapi2::TARGET_TYPE_CAPP)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_obus, fapi2::TARGET_TYPE_OBUS)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_obrick, fapi2::TARGET_TYPE_OBUS_BRICK)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_sbe, fapi2::TARGET_TYPE_SBE)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_ppe, fapi2::TARGET_TYPE_PPE)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_perv, fapi2::TARGET_TYPE_PERV)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_phb, fapi2::TARGET_TYPE_PHB)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_pec, fapi2::TARGET_TYPE_PEC)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_mc, fapi2::TARGET_TYPE_MC)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_mi, fapi2::TARGET_TYPE_MI)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_dmi, fapi2::TARGET_TYPE_DMI)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_omi, fapi2::TARGET_TYPE_OMI)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_omic, fapi2::TARGET_TYPE_OMIC)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_mcc, fapi2::TARGET_TYPE_MCC)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_ocmb, fapi2::TARGET_TYPE_OCMB_CHIP)
+SAMPLE_PROCEDURE_MACRO(p9_sample_procedure_mem_port, fapi2::TARGET_TYPE_MEM_PORT)
diff --git a/src/usr/fapi2/test/p9_sample_procedure.H b/src/usr/fapi2/test/p9_sample_procedure.H
index cb3cd6ccd..2c1215734 100644
--- a/src/usr/fapi2/test/p9_sample_procedure.H
+++ b/src/usr/fapi2/test/p9_sample_procedure.H
@@ -134,6 +134,14 @@ fapi2::ReturnCode p9_sample_procedure_mcc(
fapi2::Target<fapi2::TARGET_TYPE_MCC>& i_target,
uint8_t expectedValue);
+fapi2::ReturnCode p9_sample_procedure_ocmb(
+ fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target,
+ uint8_t expectedValue);
+
+fapi2::ReturnCode p9_sample_procedure_mem_port(
+ fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target,
+ uint8_t expectedValue);
+
}
#endif // _P9_SAMPLE_PROCEDURE_H_
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