PRDF:Added access attribute in model of register in rule file.

Adding access attribute in register model helps to determine at run time
if register expects any read and write operation. Since data is no longer part
of register model, this additional attribute helps us to prevent unintentional
reading of a write-only register while accessing its current content ( during
cache miss ).

RTC: 51455
Change-Id: Ia2aeded8b63d675a1d4b5182171bce4c8b14d17b
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5080
Tested-by: Jenkins Server
Reviewed-by: Christopher T. Phan <cphan@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Zane Shelley <zshelle@us.ibm.com>
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5590

9 files changed, 221 insertions, 158 deletions

diff --git a/src/usr/diag/prdf/common/framework/register/iipscr.h b/src/usr/diag/prdf/common/framework/register/iipscr.h
index 90a31f3ff..722dcff77 100755
--- a/src/usr/diag/prdf/common/framework/register/iipscr.h
+++ b/src/usr/diag/prdf/common/framework/register/iipscr.h
@@ -42,11 +42,14 @@
 //----------------------------------------------------------------------
 
 #include <iipbits.h>
+#include <iipconst.h>
 #include <iipsdbug.h>
 #include <prdfMain.H>
+#include <prdfTrace.H>
 
 namespace PRDF
 {
+
 /*--------------------------------------------------------------------*/
 /*  Forward References                                                */
 /*--------------------------------------------------------------------*/
@@ -125,7 +128,18 @@ namespace PRDF
  */
 class SCAN_COMM_REGISTER_CLASS
 {
-public:
+  public: // enums, structs, typedefs
+
+    /** The register access level */
+    enum AccessLevel
+    {
+        ACCESS_NONE = 0x0, ///< No access
+        ACCESS_RO   = 0x1, ///< Read-only access
+        ACCESS_WO   = 0x2, ///< Write-only access
+        ACCESS_RW   = 0x3, ///< Read/Write access
+    };
+
+  public: // functions
 
   /**
    Destructor
@@ -143,7 +157,7 @@ public:
    <br><b>Sideaffects: </b> Value guarenteed to be read from hardware.
    <br><b>Exceptions:  </b> None.
    <br><b>Notes:       </b> Default is to call Read().  If a child class cannot
-                            guarentee hardware access everytime Read() is called
+                            guarantee hardware access everytime Read() is called
                             then the function ForceRead() should be overridden.
    </ul><br>
    */
@@ -359,6 +373,7 @@ public:
    */
   bool BitStringIsZero()
   { return GetBitString()->IsZero(); }
+
    /**
     *@brief    Returns TYPE_NA as type of Target associated with register.Actual
     *          implementation is expected in derived class
@@ -366,6 +381,12 @@ public:
    */
   virtual TARGETING::TYPE getChipType(void)const { return TARGETING::TYPE_NA; }
 
+    /** @return The register access level (see enum AccessLevel). */
+    virtual AccessLevel getAccessLevel() const { return ACCESS_RW; }
+
+    /** @brief Sets the register access level (see enum AccessLevel). */
+    virtual void setAccessLevel( AccessLevel i_op ) {}
+
 protected:
 
   /**
diff --git a/src/usr/diag/prdf/common/framework/register/prdfRegisterCache.C b/src/usr/diag/prdf/common/framework/register/prdfRegisterCache.C
index 2c168e2e8..be23f2d00 100644
--- a/src/usr/diag/prdf/common/framework/register/prdfRegisterCache.C
+++ b/src/usr/diag/prdf/common/framework/register/prdfRegisterCache.C
@@ -43,25 +43,20 @@ RegDataCache::~RegDataCache()
 
 //------------------------------------------------------------------------------
 
-BIT_STRING_CLASS & RegDataCache::read(
-                                ExtensibleChip* i_pChip,
-                                const SCAN_COMM_REGISTER_CLASS * i_pRegister,
-                                bool & o_readStat )
+BIT_STRING_CLASS & RegDataCache::read( ExtensibleChip * i_chip,
+                                       const SCAN_COMM_REGISTER_CLASS * i_reg )
 {
-    ScomRegisterAccess l_scomAccessKey ( *i_pRegister,i_pChip );
+    ScomRegisterAccess l_scomAccessKey ( *i_reg, i_chip );
     BIT_STRING_CLASS * l_pBitString = queryCache( l_scomAccessKey );
-    o_readStat = false;
-    if( NULL == l_pBitString )
+
+    if ( NULL == l_pBitString )
     {
         // Creating new entry
-        l_pBitString = new BitStringBuffer( i_pRegister->GetBitLength( ) );
+        l_pBitString = new BitStringBuffer( i_reg->GetBitLength() );
         // Adding register in the cache
         iv_cachedRead[l_scomAccessKey] = l_pBitString;
     }
-    else
-    {
-        o_readStat = true;
-    }
+
     return *l_pBitString;
 }
 
diff --git a/src/usr/diag/prdf/common/framework/register/prdfRegisterCache.H b/src/usr/diag/prdf/common/framework/register/prdfRegisterCache.H
index 411937af6..648faee63 100644
--- a/src/usr/diag/prdf/common/framework/register/prdfRegisterCache.H
+++ b/src/usr/diag/prdf/common/framework/register/prdfRegisterCache.H
@@ -72,18 +72,12 @@ class RegDataCache
 
     /**
      * @brief Returns the data buffer for the given target and address.
-     * @param i_pChip       The target associated with the register.
-     * @param i_pRegister   pointer to register to be read.
-     * @param o_readStat    Returns true if the register does not exist in
-     *                      cache. In this case, the function will create and
-     *                      add an empty BIT_STRING_CLASS to the cache.It is
-     *                      the responsibilty of the user to update the data
-     *                      buffer by reading from hardware.
+     * @param i_chip The target associated with the register.
+     * @param i_reg  Pointer to register to be read.
      * @return A reference to the data buffer associated with the register.
      */
-     BIT_STRING_CLASS & read( ExtensibleChip* i_pChip,
-                              const SCAN_COMM_REGISTER_CLASS * i_pRegister,
-                              bool & o_readStat );
+    BIT_STRING_CLASS & read( ExtensibleChip * i_chip,
+                             const SCAN_COMM_REGISTER_CLASS * i_reg );
 
     /**
      * @brief Flushes entire contents from cache.
diff --git a/src/usr/diag/prdf/common/framework/register/prdfScanFacility.C b/src/usr/diag/prdf/common/framework/register/prdfScanFacility.C
index e8e35ab68..8eed62ca6 100755
--- a/src/usr/diag/prdf/common/framework/register/prdfScanFacility.C
+++ b/src/usr/diag/prdf/common/framework/register/prdfScanFacility.C
@@ -70,11 +70,23 @@ ScanFacility & ScanFacility::Access(void)
   return sf;
 }
 //-----------------------------------------------------------------------------
-SCAN_COMM_REGISTER_CLASS & ScanFacility::GetScanCommRegister(
-    uint64_t address , uint32_t i_scomLength,TARGETING::TYPE i_type  )
+SCAN_COMM_REGISTER_CLASS & ScanFacility::GetScanCommRegister( uint64_t address,
+                                uint32_t i_scomLength, TARGETING::TYPE i_type,
+                                SCAN_COMM_REGISTER_CLASS::AccessLevel i_regOp )
 {
-  ScomRegister scrKey(address ,i_scomLength ,i_type );
-  return iv_scomRegFw.get(scrKey);
+    /* i_regOp is not used to determine uniqueness of the object for following
+      reason -
+      There can not be two registers in hardware with same address and target
+      type supporting different operations say one supports only write and
+      other both read and write.
+      */
+
+    ScomRegister scrKey( address, i_scomLength, i_type, i_regOp );
+    // in case we get a object with different default operation, we shall reset
+    // it to what it should be as per rule file.
+    ScomRegister &regCreated = iv_scomRegFw.get(scrKey);
+    regCreated.setAccessLevel( i_regOp );
+    return regCreated;
 }
 //------------------------------------------------------------------------------
 
diff --git a/src/usr/diag/prdf/common/framework/register/prdfScanFacility.H b/src/usr/diag/prdf/common/framework/register/prdfScanFacility.H
index 65494a75b..22cc41a42 100755
--- a/src/usr/diag/prdf/common/framework/register/prdfScanFacility.H
+++ b/src/usr/diag/prdf/common/framework/register/prdfScanFacility.H
@@ -83,11 +83,12 @@ public:
     * @param     i_address        address of the register
     * @param     i_scomLength     length of the bit string
     * @param     i_type           type of target associated with register
+    * @param     i_regOp          operations supported for given register
     * @return   returns reference to flyweight object from factory
     */
-   SCAN_COMM_REGISTER_CLASS & GetScanCommRegister(
-                    uint64_t address ,uint32_t i_scomLength,
-                    TARGETING::TYPE i_type );
+   SCAN_COMM_REGISTER_CLASS & GetScanCommRegister( uint64_t address,
+                                uint32_t i_scomLength, TARGETING::TYPE i_type,
+                                SCAN_COMM_REGISTER_CLASS::AccessLevel i_regOp );
 
   /**
    Get a scan ring register
diff --git a/src/usr/diag/prdf/common/framework/register/prdfScomRegister.C b/src/usr/diag/prdf/common/framework/register/prdfScomRegister.C
index 94595de71..ba7617bb4 100755
--- a/src/usr/diag/prdf/common/framework/register/prdfScomRegister.C
+++ b/src/usr/diag/prdf/common/framework/register/prdfScomRegister.C
@@ -80,91 +80,132 @@ void ScomRegister::SetBitString( const BIT_STRING_CLASS *bs )
 }
 
 
-// ---------------------------------------------------------------------
+//------------------------------------------------------------------------------
 
-const BIT_STRING_CLASS *ScomRegister::GetBitString( ATTENTION_TYPE i_type )const
+const BIT_STRING_CLASS * ScomRegister::GetBitString(ATTENTION_TYPE i_type) const
 {
-    BIT_STRING_CLASS * l_pString = NULL;
-    bool l_readStat = false;
-    //Expectation is, caller shall first call Read( ) and then GetBitString.
-    //This leaves an opportunity of mistake. One may call GetBitString without
-    //calling Read() first. As a result, a stray entry in cache gets created
-    //which  shall never be in sync with hardware.
-
-    //As a solution, first cache is queried.If the given entry exist, bitString
-    //pointer is returned else a new entry is created. This new entry is
-    //synchronized with hardware and then pointer to bit string is returned to
-    //caller.
-    RegDataCache & regDump = RegDataCache::getCachedRegisters();
-    l_pString = regDump.queryCache( getChip( ), this );
-
-    if( NULL == l_pString )
+    // Calling Read() will ensure that an entry exists in the cache and the
+    // entry has at been synched with hardware at least once. Note that we
+    // cannot read hardware for write-only registers. In this case, an entry
+    // will be created in the cache, if it does not exist, when readCache() is
+    // called below.
+    if ( ( ACCESS_NONE != iv_operationType ) &&
+            ( ACCESS_WO != iv_operationType ) )
     {
-        ForceRead( );
-        //if ForceRead fails, a dummy entry is returned that way analysis shall
-        //fail gracefully else we return a new entry which is in sync with
-        //hardware
-        l_pString = &( readCache( l_readStat ) );
-
+        Read();
     }
-    return l_pString;
+    return &(readCache());
 }
-// ---------------------------------------------------------------------
-BIT_STRING_CLASS & ScomRegister::AccessBitString( )
+
+//------------------------------------------------------------------------------
+
+BIT_STRING_CLASS & ScomRegister::AccessBitString()
 {
-    bool l_readStat = false;
-    //FIXME RTC 51455 We need to find a way to make AccessBitString independent
-    //of Read. Calling Read inside this function shall make it read even
-    //write only registers. This operation shall fail on actual hardware.
-    return ( readCache( l_readStat ) );
+    // Calling Read() will ensure that an entry exists in the cache and the
+    // entry has at been synched with hardware at least once. Note that we
+    // cannot read hardware for write-only registers. In this case, an entry
+    // will be created in the cache, if it does not exist, when readCache() is
+    // called below.
+    if ( ( ACCESS_NONE != iv_operationType ) &&
+            ( ACCESS_WO != iv_operationType ) )
+    {
+        Read();
+    }
 
+    return readCache();
 }
 
 //------------------------------------------------------------------------------
 
 uint32_t ScomRegister::Read() const
 {
-    int32_t rc = SUCCESS;
-    bool l_readStat = false;
-    readCache( l_readStat );
-    if( false == l_readStat )
+    uint32_t o_rc = SUCCESS;
+
+    // First query the cache for an existing entry.
+    if ( !queryCache() )
     {
-        //updating cache by reading hardware .So next read  need not access
-        //hardware
-        rc = ForceRead();
+        // There was not a previous entry in the cache, so do a ForceRead() to
+        // sync the cache with hardware.
+        o_rc = ForceRead();
     }
 
-    return(rc);
+    return o_rc;
 }
 
 //------------------------------------------------------------------------------
 
 uint32_t ScomRegister::ForceRead() const
 {
-    int32_t rc = SUCCESS;
-    bool l_readStat = false;
-    BIT_STRING_CLASS & bs = readCache( l_readStat );
-    rc = Access( bs,MopRegisterAccess::READ );
-    if( SUCCESS != rc )
-    {
-        ExtensibleChip* l_pChip = getChip( );
-        flushCache( l_pChip );
-    }
+    #define PRDF_FUNC "[ScomRegister::ForceRead] "
+
+    uint32_t o_rc = FAIL;
 
-    return rc;
+    do
+    {
+        // No read allowed if register access attribute is write-only or no
+        // access.
+        if ( ( ACCESS_NONE == iv_operationType ) &&
+                ( ACCESS_WO == iv_operationType ) )
+        {
+            PRDF_ERR( PRDF_FUNC"Write-only register: 0x%08x 0x%016llx",
+                      getChip()->GetId(), iv_scomAddress );
+            break;
+        }
+
+        // Read hardware.
+        o_rc = Access( readCache(), MopRegisterAccess::READ );
+        if ( SUCCESS != o_rc )
+        {
+            // The read failed. Remove the entry from the cache so a subsequent
+            // Read() will attempt to read from hardware again.
+            flushCache( getChip() );
+        }
+
+    } while (0);
+
+    return o_rc;
+
+    #undef PRDF_FUNC
 }
 
 //------------------------------------------------------------------------------
 
 uint32_t ScomRegister::Write()
 {
-    uint32_t rc = FAIL;
-    bool l_entryBeforeWrite = false;
-    BIT_STRING_CLASS & bs = readCache( l_entryBeforeWrite );
-    PRDF_ASSERT( true == l_entryBeforeWrite );
-    rc = Access( bs, MopRegisterAccess::WRITE );
+    #define PRDF_FUNC "[ScomRegister::Write] "
 
-    return(rc);
+    uint32_t o_rc = FAIL;
+
+    do
+    {
+        // No write allowed if register access attribute is read-only or no
+        // access.
+        if ( ( ACCESS_NONE == iv_operationType ) &&
+                 ( ACCESS_RO == iv_operationType ) )
+        {
+            PRDF_ERR( PRDF_FUNC"Read-only register: 0x%08x 0x%016llx",
+                      getChip()->GetId(), iv_scomAddress );
+            break;
+        }
+
+        // Query the cache for an existing entry.
+        if ( !queryCache() )
+        {
+            // Something bad happened and there was nothing in the cache to
+            // write to hardware.
+            PRDF_ERR( PRDF_FUNC"No entry found in cache: 0x%08x 0x%016llx",
+                      getChip()->GetId(), iv_scomAddress );
+            break;
+        }
+
+        // Write hardware.
+        o_rc = Access( readCache(), MopRegisterAccess::WRITE );
+
+    } while (0);
+
+    return o_rc;
+
+    #undef PRDF_FUNC
 }
 
 //------------------------------------------------------------------------------
@@ -188,15 +229,25 @@ ExtensibleChip* ScomRegister::getChip( )const
     PRDF_ASSERT( iv_chipType == l_type )
     return l_pchip;
 }
-//-----------------------------------------------------------------------------
-BIT_STRING_CLASS & ScomRegister::readCache( bool & o_existingEntry ) const
+
+//------------------------------------------------------------------------------
+
+bool ScomRegister::queryCache() const
 {
-    ExtensibleChip* l_pChip = getChip( );
-    RegDataCache & regDump = RegDataCache::getCachedRegisters();
-    return  regDump.read( l_pChip,this,o_existingEntry );
+    RegDataCache & cache = RegDataCache::getCachedRegisters();
+    BIT_STRING_CLASS * bs = cache.queryCache( getChip(), this );
+    return ( NULL != bs );
+}
 
+//------------------------------------------------------------------------------
+
+BIT_STRING_CLASS & ScomRegister::readCache() const
+{
+    RegDataCache & cache = RegDataCache::getCachedRegisters();
+    return cache.read( getChip(), this );
 }
-//-----------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
 
 void ScomRegister::flushCache( ExtensibleChip *i_pChip ) const
 {
diff --git a/src/usr/diag/prdf/common/framework/register/prdfScomRegister.H b/src/usr/diag/prdf/common/framework/register/prdfScomRegister.H
index 18e03161a..91ecfbc46 100755
--- a/src/usr/diag/prdf/common/framework/register/prdfScomRegister.H
+++ b/src/usr/diag/prdf/common/framework/register/prdfScomRegister.H
@@ -37,6 +37,7 @@
 #include <iipscr.h>
 #include <iipbits.h>
 #include <iipMopRegisterAccess.h>
+#include <prdfTrace.H>
 
 namespace PRDF
 {
@@ -46,11 +47,9 @@ class CHIP_CLASS;
 class MopsRegisterAccess;
 class ExtensibleChip;
 
-
-
 class ScomRegister : public SCAN_COMM_REGISTER_CLASS
 {
-public:
+  public:
 
     /**
      * @brief     constructor
@@ -58,25 +57,26 @@ public:
      * @param     i_bitLength      bit length of register
      * @param     i_targetType     target type associated with register
      */
-    ScomRegister( uint64_t i_address ,uint32_t i_bitLength,TARGETING::TYPE
-                    i_targetType ) :
+    ScomRegister( uint64_t i_address, uint32_t i_bitLength,
+                  TARGETING::TYPE i_targetType, AccessLevel i_access ) :
         SCAN_COMM_REGISTER_CLASS(),
         iv_bitLength( i_bitLength ),
         iv_chipType( i_targetType ),
-        iv_scomAddress( i_address )
-    { }
+        iv_scomAddress( i_address ),
+        iv_operationType( i_access )
+    {}
 
     /**
      * @brief     constructor .Added this because we save object of this type in
      * @          FlyweightS
      */
     ScomRegister():
-        SCAN_COMM_REGISTER_CLASS( ),
-        iv_bitLength(0),
-        iv_chipType(TARGETING::TYPE_NA),iv_scomAddress(0)
-    { }
-
-
+        SCAN_COMM_REGISTER_CLASS(),
+        iv_bitLength( 0 ),
+        iv_chipType( TARGETING::TYPE_NA ),
+        iv_scomAddress( 0 ),
+        iv_operationType( ACCESS_NONE )
+    {}
 
     /**
      * @brief     Returns the pointer to bit string
@@ -165,19 +165,26 @@ public:
     */
    bool operator >= ( const ScomRegister & i_rightRegister  ) const;
 
-    protected: // Functions
+    /** @return The register access level (see enum AccessLevel). */
+    virtual AccessLevel getAccessLevel() const { return iv_operationType; }
+
+    /** @brief Sets the register access level (see enum AccessLevel). */
+    virtual void setAccessLevel( AccessLevel i_op ) { iv_operationType = i_op; }
+
+  protected: // Functions
+
     /**
      * @brief     copy constructor
      * @param     i_scomRegister   scomRegister instance to be copied
      */
     ScomRegister( const SCAN_COMM_REGISTER_CLASS & i_scomRegister ):
         SCAN_COMM_REGISTER_CLASS(),
-        iv_bitLength( i_scomRegister.GetBitLength() ),
-        iv_shortId( i_scomRegister.GetId()           ),
-        iv_chipType( i_scomRegister.getChipType()    ),
-        iv_scomAddress( i_scomRegister.GetAddress()  )
-    { }
-
+        iv_bitLength(     i_scomRegister.GetBitLength()   ),
+        iv_shortId(       i_scomRegister.GetId()          ),
+        iv_chipType(      i_scomRegister.getChipType()    ),
+        iv_scomAddress(   i_scomRegister.GetAddress()     ),
+        iv_operationType( i_scomRegister.getAccessLevel() )
+    {}
 
    /**
     * @brief    Returns reference to bit string associated with register
@@ -193,37 +200,41 @@ public:
      */
     uint32_t Access( BIT_STRING_CLASS & bs,
                      MopRegisterAccess::Operation op )const;
-   /**
-    * @brief    Returns rulechip poiner associated with the register
-    * @return   Refer to function description
-   */
-
-    virtual ExtensibleChip* getChip( )const ;
 
+    /**
+     * @brief  Returns rulechip pointer associated with the register
+     * @return Refer to function description
+     */
+    virtual ExtensibleChip * getChip() const;
 
 private: // functions
 
   friend class CaptureData;
+
+    /** @return TRUE if entry for this register exist in this cache. */
+    bool queryCache() const;
+
     /**
-     * @brief     Reads register contents from cache
-     * @param     reference to bool .Expected to be set to true if entry in
-     *            cache already exist  and false if it is a  newly created
-     *            entry.
-     * @return    Reference to bit string buffer maintained in cache
+     * @brief  Reads register contents from cache.
+     * @return Reference to bit string buffer maintained in cache.
      */
-  BIT_STRING_CLASS & readCache( bool & o_existingEntry ) const;
+    BIT_STRING_CLASS & readCache() const;
+
     /**
      * @brief     Deletes one or all entry in the cache
      * @param     RuleChip pointer associated with register
      * @return    Nil
      */
-  void flushCache( ExtensibleChip *i_pChip = NULL ) const ;
+    void flushCache( ExtensibleChip *i_pChip = NULL ) const;
+
+  private: // Data
+
+    uint32_t        iv_bitLength;     // bit length of scom
+    uint16_t        iv_shortId;       // unique hash id of register
+    TARGETING::TYPE iv_chipType;      // type of target associated with register
+    uint64_t        iv_scomAddress;   // scom address associated with regiser
+    AccessLevel     iv_operationType; // Operation supported (RO, WO, or RW)
 
-private: // Data
-    uint32_t iv_bitLength;           // bit length of scom
-    uint16_t iv_shortId;              // unique hash id of register
-    TARGETING::TYPE iv_chipType ;     // type of target associated with register
-    uint64_t iv_scomAddress;          // scom address associated with regiser
 };
 
 }//namespace PRDF ends
diff --git a/src/usr/diag/prdf/common/framework/register/prdfScomRegisterAccess.C b/src/usr/diag/prdf/common/framework/register/prdfScomRegisterAccess.C
index 3d076d16e..2e944876c 100644
--- a/src/usr/diag/prdf/common/framework/register/prdfScomRegisterAccess.C
+++ b/src/usr/diag/prdf/common/framework/register/prdfScomRegisterAccess.C
@@ -29,25 +29,11 @@ namespace PRDF
 {
 
 ScomRegisterAccess::ScomRegisterAccess(
-                    const SCAN_COMM_REGISTER_CLASS  &i_pRegister ,
-                    ExtensibleChip* i_pRuleChip
-                    )
-                    :ScomRegister( i_pRegister ),
-                     iv_containerChip( i_pRuleChip )
-{
-}
-
-//----------------------------------------------------------------------
-
-ScomRegisterAccess::ScomRegisterAccess( uint64_t i_scomAddress,
-                                        uint32_t i_bitLength,
-                                        ExtensibleChip* i_pRuleChip ):
-    ScomRegister( i_scomAddress ,i_bitLength,
-                  PlatServices::getTargetType( i_pRuleChip->GetChipHandle())),
+                    const SCAN_COMM_REGISTER_CLASS & i_pRegister,
+                    ExtensibleChip * i_pRuleChip ) :
+    ScomRegister( i_pRegister ),
     iv_containerChip( i_pRuleChip )
-{
-}
-
+{}
 
 //----------------------------------------------------------------------
 
diff --git a/src/usr/diag/prdf/common/framework/register/prdfScomRegisterAccess.H b/src/usr/diag/prdf/common/framework/register/prdfScomRegisterAccess.H
index 84dcbb930..a8317d0cd 100644
--- a/src/usr/diag/prdf/common/framework/register/prdfScomRegisterAccess.H
+++ b/src/usr/diag/prdf/common/framework/register/prdfScomRegisterAccess.H
@@ -58,20 +58,12 @@ class ScomRegisterAccess : public ScomRegister
      * @brief     constructor
      * @param     i_Register     Reference to flyweight register
      * @param     i_pchip        RuleChip associated with register
-    */
+     */
     ScomRegisterAccess( const SCAN_COMM_REGISTER_CLASS & i_Register,
                         ExtensibleChip* i_pchip );
     /**
      * @brief     constructor
-     * @param     i_scomAddress   scom address of register
-     * @param     i_bitLength     scom length
-     * @param     i_pchip         RuleChip to which register belongs
-    */
-    ScomRegisterAccess( uint64_t i_scomAddress,uint32_t i_bitLength,
-                        ExtensibleChip* i_pchip );
-    /**
-     * @brief     constructor
-    */
+     */
     ScomRegisterAccess():ScomRegister( ),iv_containerChip ( NULL ){ };
 
     /**