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authorPatrick Williams <iawillia@us.ibm.com>2012-04-12 22:11:51 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2012-04-18 16:21:11 -0500
commit55401cde54ca769a382a9c64f1db13b87bc24ea0 (patch)
tree79aaba5345f31a2f409d788fb17f6a52ec24bbfa /src/kernel/vmmmgr.C
parentb97e806c5c044abd0cc12cbca41c8358c67eade1 (diff)
downloadblackbird-hostboot-55401cde54ca769a382a9c64f1db13b87bc24ea0.tar.gz
blackbird-hostboot-55401cde54ca769a382a9c64f1db13b87bc24ea0.zip
Optimize PageTableManager and associated VMM.
- Changed overall page table behavior to no longer use C bits in page table entries. Instead, individual blocks mark pages as dirty based on stores during page faults. Initially all writable pages are marked read-only until the first store to it. At that time the block gets an exception and changes the permission on the page table entry to writable and marks its own SPTE to dirty. - Greatly reduced the number of tlbie's and page table accesses. Accomplished this by: * Skipping many of the page table manipulations, such as LRU updates, when the PTE is invalid. * Converting most of the previously general-case of "Modifying a PTE" to specific cases such as "Resetting the Reference Bit" and "Modifying the SW field". - Fixed the LRU-flush algorithm so that it is O(n) instead of O(n^2), where n = size of page table. Change-Id: I2520fa88970fd7f656e6348bf6b34d5db82fd3db Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/892 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/kernel/vmmmgr.C')
-rw-r--r--src/kernel/vmmmgr.C8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/kernel/vmmmgr.C b/src/kernel/vmmmgr.C
index b1f13f1a3..ed88a4879 100644
--- a/src/kernel/vmmmgr.C
+++ b/src/kernel/vmmmgr.C
@@ -66,9 +66,9 @@ void VmmManager::init_slb()
v.initSDR1(); /*no effect*/ // BEAM Fix.
}
-bool VmmManager::pteMiss(task_t* t, uint64_t effAddr)
+bool VmmManager::pteMiss(task_t* t, uint64_t effAddr, bool store)
{
- return Singleton<VmmManager>::instance()._pteMiss(t, effAddr);
+ return Singleton<VmmManager>::instance()._pteMiss(t, effAddr, store);
}
uint64_t VmmManager::findPhysicalAddress(uint64_t i_vaddr)
@@ -112,11 +112,11 @@ void VmmManager::initSDR1()
asm volatile("mtsdr1 %0" :: "r"(sdr1) : "memory");
}
-bool VmmManager::_pteMiss(task_t* t, uint64_t effAddr)
+bool VmmManager::_pteMiss(task_t* t, uint64_t effAddr, bool store)
{
lock.lock();
- bool rc = SegmentManager::handlePageFault(t, effAddr);
+ bool rc = SegmentManager::handlePageFault(t, effAddr, store);
lock.unlock();
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