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authorMike Baiocchi <mbaiocch@us.ibm.com>2016-11-04 11:30:17 -0500
committerWilliam G. Hoffa <wghoffa@us.ibm.com>2017-03-08 11:06:34 -0500
commitc3d233bbaf7a2f274147d16edbc080bae0ffd714 (patch)
tree8058bc8e764135eecc21cdcd1177814dd4e180c8 /src/include/usr/util
parent1301e43641f7d3f315a0abc8112fa88927c9fa9a (diff)
downloadblackbird-hostboot-c3d233bbaf7a2f274147d16edbc080bae0ffd714.tar.gz
blackbird-hostboot-c3d233bbaf7a2f274147d16edbc080bae0ffd714.zip
Hostboot Base TCE Support
This commit adds the base support for hostboot to enable/disable the use of TCEs. It allows for the creation and managment of a TCE table and also initializes the P9 processors to use this table. Change-Id: Idb40f9df5a90d8b7e87b2f5b745cbe7e66109df2 RTC:145071 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32562 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/include/usr/util')
-rw-r--r--src/include/usr/util/util_reasoncodes.H19
-rw-r--r--src/include/usr/util/utiltce.H111
2 files changed, 130 insertions, 0 deletions
diff --git a/src/include/usr/util/util_reasoncodes.H b/src/include/usr/util/util_reasoncodes.H
index 4df8d3897..4b9c5c308 100644
--- a/src/include/usr/util/util_reasoncodes.H
+++ b/src/include/usr/util/util_reasoncodes.H
@@ -40,6 +40,14 @@ namespace Util
UTIL_LIDMGR_RT = 0x06,
UTIL_LIDMGR_CLEANUP = 0x07, // UtilLidMgr::cleanup
UTIL_RT_CMDS = 0x08, // rt_cmds.C
+ UTIL_TCE_INIT_HDW = 0x09, // UtilTceMgr::initTceInHdw
+ UTIL_TCE_ALLOCATE = 0x0A, // UtilTceMgr::allocateTces
+ UTIL_TCE_DEALLOCATE = 0x0B, // UtilTceMgr::deallocateTces
+ UTIL_TCE_CREATE_TABLE = 0x0C, // UtilTceMgr::createTceTable
+ UTIL_TCE_DISABLE_TCES = 0x0D, // Util::UTIL_TCE_DISABLE_TCES
+ UTIL_TCE_MAP_PSIHB = 0x0E, // UtilTceMgr::mapPsiHostBridge
+ UTIL_TCE_UNMAP_PSIHB = 0x0F, // UtilTceMgr::unmapPsiHostBridge
+
};
enum ReasonCode
@@ -55,6 +63,17 @@ namespace Util
UTIL_LIDMGR_UNLOAD_RC_FAIL = UTIL_COMP_ID | 0x09,
UTIL_LIDMGR_NOT_FOUND = UTIL_COMP_ID | 0x0A,
UTIL_LIDMGR_MM_FAIL = UTIL_COMP_ID | 0x0B,
+ UTIL_TCE_INVALID_SIZE = UTIL_COMP_ID | 0x0C,
+ UTIL_TCE_ADDR_NOT_ALIGNED = UTIL_COMP_ID | 0x0D,
+ UTIL_TCE_DEV_MAP_FAIL = UTIL_COMP_ID | 0x0E,
+ UTIL_TCE_DEV_UNMAP_FAIL = UTIL_COMP_ID | 0x0F,
+ UTIL_TCE_NOT_ENOUGH_FREE_ENTRIES = UTIL_COMP_ID | 0x10,
+ UTIL_TCE_ENTRY_NOT_CONTIGUOUS = UTIL_COMP_ID | 0x11,
+ UTIL_TCE_PREVIOUSLY_ALLOCATED = UTIL_COMP_ID | 0x12,
+ UTIL_TCE_INVALID_COUNT = UTIL_COMP_ID | 0x13,
+ UTIL_TCE_ALLOC_BLOCK_FAIL = UTIL_COMP_ID | 0x14,
+ UTIL_TCE_BLOCK_UNMAP_FAIL = UTIL_COMP_ID | 0x15,
+
};
};
diff --git a/src/include/usr/util/utiltce.H b/src/include/usr/util/utiltce.H
new file mode 100644
index 000000000..bcaeecbca
--- /dev/null
+++ b/src/include/usr/util/utiltce.H
@@ -0,0 +1,111 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/include/usr/util/utiltce.H $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2013,2017 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+#ifndef __TCEIF_H
+#define __TCEIF_H
+
+#include <stdint.h>
+#include <builtins.h>
+#include <errl/errlentry.H>
+#include <devicefw/userif.H>
+
+#define UTILTCE_TRACE_NAME "UTILTCE"
+
+namespace TCE
+{
+
+/*******************************************/
+/* General TCE Enable/Disable Functions */
+/*******************************************/
+
+/**
+ * @brief Responsible for allocating TCEs
+ *
+ * @param[in] i_startingAddress - Starting physical address that the allocated
+ * TCEs will map to.
+ * Needs to be Page-Aligned or will fail.
+ * @param[in] i_size - Size of the address space that TCEs map to.
+ * Size must be less than (512K * PAGESIZE) or will fail.
+ * Assert if not greater than zero.
+ *
+ * Note: First time this is called will cause TCE Table to be created and
+ * the Processors to be setup to point at the TCE Table
+ *
+ * @return errlHndl_t - Return Error Handle if failed
+ *
+ */
+errlHndl_t utilAllocateTces(uint64_t i_startingAddress,
+ size_t i_size);
+
+/**
+ * @brief Responsible for deallocating TCEs
+ *
+ * @param[in] i_startingAddress Starting physical address of the TCEs that
+ * are to be deallocated from the TCE Table.
+ * Needs to be page-aligned or will fail.
+ * @param[in] i_size - Size of address space that the TCEs that are to
+ * be deallocated map to.
+ * Size must be less than (512K * PAGESIZE) or will fail.
+ * Assert if not greater than zero.
+ *
+ * @return errlHndl_t - Return Error Handle if failed
+ *
+ */
+errlHndl_t utilDeallocateTces(uint64_t i_startingAddress,
+ size_t i_size);
+
+
+/**
+ * @brief Responsible for disabling TCEs on the system, including
+ * clearing the TCE Table and disabling Processor settings
+ *
+ * @return errlHndl_t - Return Error Handle if failed
+ *
+ */
+errlHndl_t utilDisableTces(void);
+
+
+/******************************************************/
+/* Specific TCE Setup/Close Functions for PAYLOAD */
+/******************************************************/
+
+/**
+ * @brief Responsible for Setting up TCEs for PAYLOAD
+ *
+ * @return errlHndl_t - Return Error Handle if failed
+ *
+ */
+errlHndl_t utilSetupPayloadTces(void);
+
+/**
+ * @brief Responsible for closing the TCEs for PAYLOAD
+ *
+ * @return errlHndl_t - Return Error Handle if failed
+ *
+ */
+errlHndl_t utilClosePayloadTces(void);
+
+};
+
+#endif
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