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| author | Mike Baiocchi <mbaiocch@us.ibm.com> | 2017-12-06 07:08:01 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-12-12 17:05:15 -0500 |
| commit | 8fcdfa14a7d3e8615f08c398bec2ee0b7a8d119e (patch) | |
| tree | 6e451e32e74b77daa524512213d7d0bd94a18655 /src/include/usr/util | |
| parent | a6d6b5da3da48be85bedacfb2732a3760b35445c (diff) | |
| download | blackbird-hostboot-8fcdfa14a7d3e8615f08c398bec2ee0b7a8d119e.tar.gz blackbird-hostboot-8fcdfa14a7d3e8615f08c398bec2ee0b7a8d119e.zip | |
Support Verifying and Moving PAYLOAD and HDAT when TCEs are Enabled
This commit makes changes in istep 16 to set up temporary memory
regions that the FSP will use to DMA-via-TCEs the PAYLOAD and HDAT
sections into memory in istep 20. Then in istep 21 Hostboot will
verify and move these sections to the final memory locations.
Change-Id: I3c9e026a8e2c3c40008364c4229915b4a661d0fe
RTC:181900
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50624
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com>
Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/include/usr/util')
| -rw-r--r-- | src/include/usr/util/utiltce.H | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/src/include/usr/util/utiltce.H b/src/include/usr/util/utiltce.H index 0aaffacf1..b0aaf48ae 100644 --- a/src/include/usr/util/utiltce.H +++ b/src/include/usr/util/utiltce.H @@ -50,10 +50,11 @@ namespace TCE * Size must be less than (512K * PAGESIZE) or will fail. * Assert if not greater than zero. * - * @param[out] o_startingToken - Starting Entry into the table. - * (This is an offset into the array based on the - * TCE index * PAGESIZE. Each TCE entry maps to - * a pagesize of memory) + * @param[out] o_startingToken - Key to the Starting Entry into the table. + * This is an offset into the array based on the + * TCE Index * PAGESIZE. + * FSP uses the token as a DMA Address. + * Each TCE entry maps to a pagesize of memory. * * Note: First time this is called will cause TCE Table to be created and * the Processors to be setup to point at the TCE Table @@ -97,7 +98,7 @@ errlHndl_t utilDisableTces(void); /******************************************************/ /** - * @brief Responsible for Setting up TCEs for PAYLOAD + * @brief Responsible for Setting up TCEs for PAYLOAD, including HDAT * * @return errlHndl_t - Return Error Handle if failed * @@ -105,7 +106,7 @@ errlHndl_t utilDisableTces(void); errlHndl_t utilSetupPayloadTces(void); /** - * @brief Responsible for closing the TCEs for PAYLOAD + * @brief Responsible for closing the TCEs for PAYLOAD, including HDAT * * @return errlHndl_t - Return Error Handle if failed * |
