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| author | Dean Sanner <dsanner@us.ibm.com> | 2018-02-01 09:53:30 -0600 |
|---|---|---|
| committer | Dean Sanner <dsanner@us.ibm.com> | 2018-02-13 06:38:43 -0500 |
| commit | 305fcd051d535220f5372051cace8968d25f8491 (patch) | |
| tree | e89ac2d7331a2c495735e9f45ba1af8a5767ea0a /src/include/kernel/cpu.H | |
| parent | b3073568dbd8ec534ad77e0ed89c03e2cedfb160 (diff) | |
| download | blackbird-hostboot-305fcd051d535220f5372051cace8968d25f8491.tar.gz blackbird-hostboot-305fcd051d535220f5372051cace8968d25f8491.zip | |
Updates to make multinode IPC work
-Fixed node/group id calculations
-Reduced dbell printk to prevent printk overflow
-Fixed architectual hole in how internode IPC works
Workitems won't work, instead just always check
for IPC on any doorbells to master thread
-Changed PIR tracing to print out in hex
Change-Id: I25eb7f87fd812a90f98a7724b1ac1100f764fe7b
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53187
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Diffstat (limited to 'src/include/kernel/cpu.H')
| -rw-r--r-- | src/include/kernel/cpu.H | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/include/kernel/cpu.H b/src/include/kernel/cpu.H index b967c1319..f218e3e45 100644 --- a/src/include/kernel/cpu.H +++ b/src/include/kernel/cpu.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2010,2016 */ +/* Contributors Listed Below - COPYRIGHT 2010,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -38,8 +38,11 @@ #include <util/lockfree/stack.H> // See BookIV PIR definition. -#define KERNEL_MAX_SUPPORTED_NODES 8 -#define KERNEL_MAX_SUPPORTED_CPUS_PER_NODE (8 * 16 * 8) // Chip, core, thread. +#define KERNEL_MAX_SUPPORTED_NODES 4 + +// This constant is coming from the PIR: GGGGPPPRCCCCCTT +// 3-bits for chiP (P), 1-reserved bit, 5-Core bits (C), 2-for Thread (T) +#define KERNEL_MAX_SUPPORTED_CPUS_PER_NODE (8 * 2 * 32 * 4) // ChipId, reserved bit, core, thread class Scheduler; |
