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| author | crgeddes <crgeddes@us.ibm.com> | 2016-07-26 11:40:30 -0500 |
|---|---|---|
| committer | William G. Hoffa <wghoffa@us.ibm.com> | 2016-08-25 14:50:15 -0400 |
| commit | b0bf18528f97ecef49ff27fd4715b2d2a50ad5ba (patch) | |
| tree | c62489d62c413e523e72e3a5559d629165078c08 /src/bootloader/bootloader.C | |
| parent | 1400bea75a6bbd2083a8b39095470102479c8514 (diff) | |
| download | blackbird-hostboot-b0bf18528f97ecef49ff27fd4715b2d2a50ad5ba.tar.gz blackbird-hostboot-b0bf18528f97ecef49ff27fd4715b2d2a50ad5ba.zip | |
Update Bootloader to handle moving the TOC of PNOR around
Moved 1 of the PNOR TOCs from 0x8000 to TOP_OF_FLASH - 64KB.
Updated bootloader and pnor access code to handle new toc
location. Update the defaultPnorLayout to reflect these changes
Also added a FSP default pnor xml that will generate a 128 MB
image for FSP boxes to use.
RTC: 154286
Change-Id: I0253590299ff9714b0d5ab12a02ac9d653b115fa
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27461
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/bootloader/bootloader.C')
| -rw-r--r-- | src/bootloader/bootloader.C | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/src/bootloader/bootloader.C b/src/bootloader/bootloader.C index 0158f211a..ec9b12c4a 100644 --- a/src/bootloader/bootloader.C +++ b/src/bootloader/bootloader.C @@ -76,17 +76,25 @@ namespace Bootloader{ // Set variables needed for getting location of HB base code // @TODO RTC:138268 Support multiple sides of PNOR in bootloader - uint64_t l_pnorStart = LPC::LPC_PHYS_BASE + LPC::LPCHC_FW_SPACE - + PNOR::LPC_SFC_MMIO_OFFSET; + + //pnorEnd is the end of flash, which is base of lpc, plus + //the offset of the FW space, plus the TOP memory address in FW space + uint64_t l_pnorEnd = LPC::LPC_PHYS_BASE + LPC::LPCHC_FW_SPACE + + PNOR::LPC_TOP_OF_FLASH_OFFSET; + + //We dont know what the start of pnor is because we dont know the size + uint64_t l_pnorStart = 0; + uint32_t l_errCode = PNOR::NO_ERROR; uint8_t l_tocUsed = 0; // Get location of HB base code in PNOR from TOC // @TODO RTC:138268 Support multiple sides of PNOR in bootloader - bl_pnorAccess::getHBBSection(l_pnorStart, + bl_pnorAccess::getHBBSection(l_pnorEnd, bootloader_hbbSection, l_errCode, - l_tocUsed); + l_tocUsed, + l_pnorStart); BOOTLOADER_TRACE(BTLDR_TRC_MAIN_GETHBBSECTION_RTN ); if(PNOR::NO_ERROR == l_errCode) |
