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author | Benjamin Weisenbeck <bweisenb@us.ibm.com> | 2018-08-20 15:05:14 -0500 |
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committer | Zane C. Shelley <zshelle@us.ibm.com> | 2018-08-23 10:19:22 -0500 |
commit | eae1d5f0e27f1e5a91c1ab00efece20898954440 (patch) | |
tree | 36932b8d093b85019fa4e8ec92e82a54cc232270 | |
parent | 4dee8a0a654536130b4886c114ba7fe1d23bcee0 (diff) | |
download | blackbird-hostboot-eae1d5f0e27f1e5a91c1ab00efece20898954440.tar.gz blackbird-hostboot-eae1d5f0e27f1e5a91c1ab00efece20898954440.zip |
PRD: Separate PLL handling by domain type
Change-Id: I3555b8b4a3b06e8ceaef98cce216bd31d9a3179d
CQ: SW442945
Backport: release-fips921
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64863
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64983
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
-rw-r--r-- | src/usr/diag/prdf/common/plat/p9/p9_proc_common_regs.rule | 7 | ||||
-rw-r--r-- | src/usr/diag/prdf/common/plat/p9/prdfP9Pll.C | 35 | ||||
-rw-r--r-- | src/usr/diag/prdf/common/plat/p9/prdfP9PllDomain.C | 158 |
3 files changed, 100 insertions, 100 deletions
diff --git a/src/usr/diag/prdf/common/plat/p9/p9_proc_common_regs.rule b/src/usr/diag/prdf/common/plat/p9/p9_proc_common_regs.rule index 5da5bf198..8d9182d0a 100644 --- a/src/usr/diag/prdf/common/plat/p9/p9_proc_common_regs.rule +++ b/src/usr/diag/prdf/common/plat/p9/p9_proc_common_regs.rule @@ -104,6 +104,13 @@ capture group never; }; + register OSC_SW_SENSE + { + name "Osc Switch Sense 1"; + scomaddr 0x0005001D; + capture group PllFIRs; + }; + register TODWOF { name "Time of Day / WOF Counter"; diff --git a/src/usr/diag/prdf/common/plat/p9/prdfP9Pll.C b/src/usr/diag/prdf/common/plat/p9/prdfP9Pll.C index 2ac6f4b86..90c3dbcf4 100644 --- a/src/usr/diag/prdf/common/plat/p9/prdfP9Pll.C +++ b/src/usr/diag/prdf/common/plat/p9/prdfP9Pll.C @@ -412,7 +412,6 @@ int32_t ClearPll( ExtensibleChip * i_chip, ClearChipletPll(i_chip, TYPE_XBUS); ClearChipletPll(i_chip, TYPE_OBUS); ClearChipletPll(i_chip, TYPE_MCBIST); - ClearChipletPll(i_chip, TYPE_PEC); // Clear TP_LFIR SCAN_COMM_REGISTER_CLASS * TP_LFIRand = @@ -420,7 +419,6 @@ int32_t ClearPll( ExtensibleChip * i_chip, TP_LFIRand->setAllBits(); TP_LFIRand->ClearBit(PLL_UNLOCK); TP_LFIRand->ClearBit(OSC_SW_SYS_REF); - TP_LFIRand->ClearBit(OSC_SW_MF_REF); rc = TP_LFIRand->Write(); if (rc != SUCCESS) @@ -437,6 +435,39 @@ int32_t ClearPll( ExtensibleChip * i_chip, PRDF_PLUGIN_DEFINE_NS( p9_nimbus, Proc, ClearPll ); PRDF_PLUGIN_DEFINE_NS( p9_cumulus, Proc, ClearPll ); +int32_t ClearMfPll( ExtensibleChip * i_chip, + STEP_CODE_DATA_STRUCT & i_sc) +{ + #define PRDF_FUNC "[Proc::ClearMfPll] " + + int32_t rc = SUCCESS; + + if (CHECK_STOP != i_sc.service_data->getPrimaryAttnType()) + { + // Clear Pll bits in chiplet PCB Slave error regs + ClearChipletPll(i_chip, TYPE_PEC); + + // Clear TP_LFIR + SCAN_COMM_REGISTER_CLASS * TP_LFIRand = + i_chip->getRegister("TP_LFIR_AND"); + TP_LFIRand->setAllBits(); + TP_LFIRand->ClearBit(PLL_UNLOCK); + TP_LFIRand->ClearBit(OSC_SW_MF_REF); + rc = TP_LFIRand->Write(); + if (rc != SUCCESS) + { + PRDF_ERR(PRDF_FUNC "TP_LFIR_AND write failed" + "for chip: 0x%08x", i_chip->getHuid()); + } + } + + return SUCCESS; + + #undef PRDF_FUNC +} +PRDF_PLUGIN_DEFINE_NS( p9_nimbus, Proc, ClearMfPll ); +PRDF_PLUGIN_DEFINE_NS( p9_cumulus, Proc, ClearMfPll ); + /** * @brief Mask the PLL error for P9 Plugin * @param i_chip P9 chip diff --git a/src/usr/diag/prdf/common/plat/p9/prdfP9PllDomain.C b/src/usr/diag/prdf/common/plat/p9/prdfP9PllDomain.C index cba854c08..1524e899f 100644 --- a/src/usr/diag/prdf/common/plat/p9/prdfP9PllDomain.C +++ b/src/usr/diag/prdf/common/plat/p9/prdfP9PllDomain.C @@ -82,10 +82,26 @@ bool PllDomain::Query(ATTENTION_TYPE attentionType) if( l_analysisPending ) { + // Check if any clock errors are present + uint32_t l_errType = 0; ExtensibleChipFunction * l_query = - l_chip->getExtensibleFunction("QueryPll"); - int32_t rc = (*l_query) - (l_chip,PluginDef::bindParm<bool &>(atAttn)); + l_chip->getExtensibleFunction("CheckErrorType"); + int32_t rc = (*l_query)(l_chip, + PluginDef::bindParm<uint32_t &> (l_errType)); + + // Check if clock errors apply to this domain + if ( GetId() == CLOCK_DOMAIN_IO ) + { + if ( ( l_errType & PCI_PLL_UNLOCK ) || + ( l_errType & PCI_OSC_FAILOVER ) ) + atAttn = true; + } + else + { + if ( ( l_errType & SYS_PLL_UNLOCK ) || + ( l_errType & SYS_OSC_FAILOVER ) ) + atAttn = true; + } // if rc then scom read failed // Error log has already been generated @@ -108,13 +124,11 @@ bool PllDomain::Query(ATTENTION_TYPE attentionType) //------------------------------------------------------------------------------ int32_t PllDomain::Analyze(STEP_CODE_DATA_STRUCT & serviceData, - ATTENTION_TYPE attentionType) + ATTENTION_TYPE attentionType) { #define PRDF_FUNC "[PllDomain::Analyze] " - std::vector<ExtensibleChip *> sysRefList; - std::vector<ExtensibleChip *> pciList; - std::vector<ExtensibleChip *> mfFoList; - std::vector<ExtensibleChip *> sysRefFoList; + std::vector<ExtensibleChip *> pllUnlockList; + std::vector<ExtensibleChip *> failoverList; int32_t rc = SUCCESS; uint32_t mskErrType = 0; @@ -147,6 +161,17 @@ int32_t PllDomain::Analyze(STEP_CODE_DATA_STRUCT & serviceData, if ( 0 == l_errType ) continue; + if (GetId() == CLOCK_DOMAIN_IO) + { + if (l_errType & PCI_PLL_UNLOCK ) pllUnlockList.push_back(l_chip); + if (l_errType & PCI_OSC_FAILOVER) failoverList.push_back(l_chip); + } + else + { + if (l_errType & SYS_PLL_UNLOCK ) pllUnlockList.push_back(l_chip); + if (l_errType & SYS_OSC_FAILOVER) failoverList.push_back(l_chip); + } + // Get this chip's capture data for any error l_chip->CaptureErrorData( serviceData.service_data->GetCaptureData()); @@ -170,13 +195,6 @@ int32_t PllDomain::Analyze(STEP_CODE_DATA_STRUCT & serviceData, { PlatServices::hwpErrorIsolation( l_chip, serviceData ); } - - // Update error lists - if (l_errType & SYS_PLL_UNLOCK ) sysRefList.push_back( l_chip ); - if (l_errType & PCI_PLL_UNLOCK ) pciList.push_back( l_chip ); - if (l_errType & PCI_OSC_FAILOVER) mfFoList.push_back( l_chip ); - if (l_errType & SYS_OSC_FAILOVER) sysRefFoList.push_back( l_chip ); - } // end for each chip in domain // Remove all non-functional chips. @@ -215,36 +233,33 @@ int32_t PllDomain::Analyze(STEP_CODE_DATA_STRUCT & serviceData, farClockSource.Resolve(serviceData); } - if (sysRefList.size() > 0 || pciList.size() > 0) + if (pllUnlockList.size() > 0) { + // Test for threshold iv_threshold.Resolve(serviceData); - } - - if (sysRefList.size() > 0 ) - { - // Test for threshold if(serviceData.service_data->IsAtThreshold()) { - mskErrType |= SYS_PLL_UNLOCK; + mskErrType |= (GetId() == CLOCK_DOMAIN_IO) ? + PCI_PLL_UNLOCK : SYS_PLL_UNLOCK; } // Set Signature serviceData.service_data->GetErrorSignature()-> - setChipId(sysRefList[0]->getHuid()); + setChipId(pllUnlockList[0]->getHuid()); serviceData.service_data->SetErrorSig( PRDFSIG_PLL_ERROR ); // If only one detected sys ref error, add it to the callout list. - if (sysRefList.size() == 1) + if (pllUnlockList.size() == 1) { const uint32_t tmpCount = serviceData.service_data->getMruListSize(); // Call this chip's CalloutPll plugin if it exists. ExtensibleChipFunction * l_callout = - sysRefList[0]->getExtensibleFunction( "CalloutPll", true ); + pllUnlockList[0]->getExtensibleFunction( "CalloutPll", true ); if ( NULL != l_callout ) { - (*l_callout)( sysRefList[0], + (*l_callout)( pllUnlockList[0], PluginDef::bindParm<STEP_CODE_DATA_STRUCT &>(serviceData) ); } @@ -253,70 +268,33 @@ int32_t PllDomain::Analyze(STEP_CODE_DATA_STRUCT & serviceData, if ( tmpCount == serviceData.service_data->getMruListSize() ) { // No additional callouts were made so add this chip to the list - serviceData.service_data->SetCallout( sysRefList[0]->getTrgt()); + serviceData.service_data->SetCallout( + pllUnlockList[0]->getTrgt()); } } } - if (pciList.size() > 0) + if (failoverList.size() > 0) { - // Test for threshold - if(serviceData.service_data->IsAtThreshold()) + if (GetId() == CLOCK_DOMAIN_IO) { - mskErrType |= PCI_PLL_UNLOCK; - } + // Mask failovers for this domain + mskErrType |= PCI_OSC_FAILOVER; - // Set Signature - serviceData.service_data->GetErrorSignature()-> - setChipId(pciList[0]->getHuid()); - serviceData.service_data->SetErrorSig( PRDFSIG_PLL_ERROR ); - - // If only one detected sys ref error, add it to the callout list. - if (pciList.size() == 1) + // Set signature + serviceData.service_data->SetErrorSig( PRDFSIG_MF_REF_FAILOVER ); + } + else { - const uint32_t tmpCount = - serviceData.service_data->getMruListSize(); - - // Call this chip's CalloutPll plugin if it exists. - ExtensibleChipFunction * l_callout = - pciList[0]->getExtensibleFunction( "CalloutPll", true ); - if ( NULL != l_callout ) - { - (*l_callout)( pciList[0], - PluginDef::bindParm<STEP_CODE_DATA_STRUCT &>(serviceData) ); - } + // Mask failovers for this domain + mskErrType |= SYS_OSC_FAILOVER; - // If CalloutPll plugin does not add anything new to the callout - // list, callout this chip - if ( tmpCount == serviceData.service_data->getMruListSize() ) - { - // No additional callouts were made so add this chip to the list - serviceData.service_data->SetCallout( pciList[0]->getTrgt()); - } + // Set signature + serviceData.service_data->SetErrorSig( PRDFSIG_SYS_REF_FAILOVER ); } - } - - if (mfFoList.size() > 0) - { - mskErrType |= PCI_OSC_FAILOVER; - - // Set Signature - serviceData.service_data->GetErrorSignature()-> - setChipId(mfFoList[0]->getHuid()); - serviceData.service_data->SetErrorSig( PRDFSIG_MF_REF_FAILOVER ); - - // Make the error log predictive on first occurrence. - serviceData.service_data->SetThresholdMaskId(0); - } - if (sysRefFoList.size() > 0) - { - mskErrType |= SYS_OSC_FAILOVER; - - // Set Signature serviceData.service_data->GetErrorSignature()-> - setChipId(sysRefFoList[0]->getHuid()); - serviceData.service_data->SetErrorSig( PRDFSIG_SYS_REF_FAILOVER ); + setChipId(failoverList[0]->getHuid()); // Make the error log predictive on first occurrence. serviceData.service_data->SetThresholdMaskId(0); @@ -338,7 +316,7 @@ int32_t PllDomain::Analyze(STEP_CODE_DATA_STRUCT & serviceData, PluginDef::bindParm<STEP_CODE_DATA_STRUCT&>(serviceData)); // Run PLL Post Analysis on any analyzed chips in this domain. - for(auto l_chip : sysRefList) + for(auto l_chip : pllUnlockList) { // Send any special messages indicating there was a PLL error. ExtensibleChipFunction * l_pllPostAnalysis = @@ -347,24 +325,7 @@ int32_t PllDomain::Analyze(STEP_CODE_DATA_STRUCT & serviceData, PluginDef::bindParm<STEP_CODE_DATA_STRUCT&>(serviceData)); } - for(auto l_chip : pciList) - { - // Send any special messages indicating there was a PLL error. - ExtensibleChipFunction * l_pllPostAnalysis = - l_chip->getExtensibleFunction("PllPostAnalysis", true); - (*l_pllPostAnalysis)(l_chip, - PluginDef::bindParm<STEP_CODE_DATA_STRUCT&>(serviceData)); - } - - for(auto l_chip : mfFoList) - { - // Send any special messages indicating there was a PLL error. - ExtensibleChipFunction * l_pllPostAnalysis = - l_chip->getExtensibleFunction("PllPostAnalysis", true); - (*l_pllPostAnalysis)(l_chip, - PluginDef::bindParm<STEP_CODE_DATA_STRUCT&>(serviceData)); - } - for(auto l_chip : sysRefFoList) + for(auto l_chip : failoverList) { // Send any special messages indicating there was a PLL error. ExtensibleChipFunction * l_pllPostAnalysis = @@ -392,7 +353,8 @@ int32_t PllDomain::ClearPll( ExtensibleDomain * i_domain, { PllDomain * l_domain = (PllDomain *) i_domain; - const char * clearPllFuncName = "ClearPll"; + const char * clearPllFuncName = (l_domain->GetId() == CLOCK_DOMAIN_IO) ? + "ClearMfPll" : "ClearPll"; // Clear children chips. for ( uint32_t i = 0; i < l_domain->GetSize(); i++ ) |