diff options
author | Christian Geddes <crgeddes@us.ibm.com> | 2019-06-11 09:27:34 -0500 |
---|---|---|
committer | Daniel M Crowell <dcrowell@us.ibm.com> | 2019-07-17 14:55:07 -0500 |
commit | e7f8781ee64c8758890e58967cc13532c3c477a8 (patch) | |
tree | 009dcd06c4c34df7e2c12fbf37be0678200f2942 | |
parent | 2619526afc04e9fe58c680ba67b93bd2d916283a (diff) | |
download | blackbird-hostboot-e7f8781ee64c8758890e58967cc13532c3c477a8.tar.gz blackbird-hostboot-e7f8781ee64c8758890e58967cc13532c3c477a8.zip |
Force sbe update loop if a change in OMI freq is detected
After we parse the SPD to determine correct frequency settings we
need to check if the optimal settings found differ from the original
settings we booted with. This commit adds a check for OMI frequency
changes in addition to the existing nest frequency and mc sync mode
checks.
Change-Id: Icaf64eda225df3aab82a033866663e3103cef55f
RTC: 207596
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78739
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M Crowell <dcrowell@us.ibm.com>
-rw-r--r-- | src/build/configs/simics_axone.config | 3 | ||||
-rw-r--r-- | src/include/usr/isteps/istep_reasoncodes.H | 2 | ||||
-rw-r--r-- | src/usr/isteps/istep07/call_mss_freq.C | 134 | ||||
-rw-r--r-- | src/usr/isteps/mss/HBconfig | 2 | ||||
-rw-r--r-- | src/usr/targeting/common/xmltohb/simics_AXONE.system.xml | 6 |
5 files changed, 129 insertions, 18 deletions
diff --git a/src/build/configs/simics_axone.config b/src/build/configs/simics_axone.config index 5e4e3fe4b..0b26f13bd 100644 --- a/src/build/configs/simics_axone.config +++ b/src/build/configs/simics_axone.config @@ -44,3 +44,6 @@ set AXONE # Enable Console set CONSOLE unset CONSOLE_OUTPUT_ERRORDISPLAY + +# OMIs were introduced in Axone and will be in P10 also +set SUPPORT_OMI
\ No newline at end of file diff --git a/src/include/usr/isteps/istep_reasoncodes.H b/src/include/usr/isteps/istep_reasoncodes.H index 5bd5fbf94..36c1e8e39 100644 --- a/src/include/usr/isteps/istep_reasoncodes.H +++ b/src/include/usr/isteps/istep_reasoncodes.H @@ -68,6 +68,7 @@ namespace ISTEP MOD_MSS_SCRUB = 0x25, MOD_CALL_UPDATE_UCD_FLASH = 0x26, MOD_LOAD_HCODE = 0x27, + MOD_GET_OMI_FREQ = 0x28, }; /** @@ -142,6 +143,7 @@ namespace ISTEP RC_SLAVE_CORE_WAKEUP_ERROR = ISTEP_COMP_ID | 0x4E, RC_UCD_IMG_NOT_IN_CONTAINER = ISTEP_COMP_ID | 0x4F, RC_MM_UNMAP_FAILED = ISTEP_COMP_ID | 0x50, + RC_OMI_FREQ_MISMATCH = ISTEP_COMP_ID | 0x51, }; }; diff --git a/src/usr/isteps/istep07/call_mss_freq.C b/src/usr/isteps/istep07/call_mss_freq.C index f6b35e688..9bec2f97b 100644 --- a/src/usr/isteps/istep07/call_mss_freq.C +++ b/src/usr/isteps/istep07/call_mss_freq.C @@ -72,13 +72,25 @@ using namespace ISTEP_ERROR; using namespace ERRORLOG; using namespace TARGETING; +#ifdef CONFIG_AXONE +/** + * @brief Look at all FREQ_OMI_MHZ attribute on all processors, make sure + * they are the same and return the value. + * @param[out] o_omiFreq the frequency of the OMI link between proc and ocmbs + * @return fapi2::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. + * + * @note returns error if all OMIs do not have matching frequency set + */ +errlHndl_t getOmiFreq(TARGETING::ATTR_FREQ_OMI_MHZ_type & o_omiFreq); +#endif + // // Wrapper function to call mss_freq // void* call_mss_freq( void *io_pArgs ) { IStepError l_StepError; - errlHndl_t l_err = NULL; + errlHndl_t l_err = nullptr; #ifdef CONFIG_SECUREBOOT bool l_isMemdLoaded = false; @@ -248,10 +260,21 @@ void* call_mss_freq( void *io_pArgs ) // allow it to change here TARGETING::Target * l_sys = nullptr; TARGETING::targetService().getTopLevelTarget( l_sys ); - // TODO RTC: 207596 Get nest boot freq for OMIs - #ifndef CONFIG_AXONE_BRING_UP - uint32_t l_originalNest = Util::getBootNestFreq(); - #endif + + uint32_t l_originalNestFreq = Util::getBootNestFreq(); + + // Omi Freq is only used in P9a and beyond, to limit #ifdef + // craziness below just leave it at 0 so it never changes + uint32_t l_originalOmiFreq = 0; +#ifdef CONFIG_AXONE + l_err = getOmiFreq(l_originalOmiFreq); + if(l_err) + { + l_StepError.addErrorDetails( l_err ); + errlCommit( l_err, ISTEP_COMP_ID ); + break; + } +#endif // Read MC_SYNC_MODE from SBE itself and set the attribute uint8_t l_bootSyncMode = 0; @@ -357,34 +380,55 @@ void* call_mss_freq( void *io_pArgs ) break; } - // TODO RTC: 207596 Get nest boot freq for OMIs - #ifndef CONFIG_AXONE_BRING_UP // Get latest MC_SYNC_MODE and FREQ_PB_MHZ uint8_t l_mcSyncMode = l_masterProc->getAttr<TARGETING::ATTR_MC_SYNC_MODE>(); - uint32_t l_newNest = l_sys->getAttr<TARGETING::ATTR_FREQ_PB_MHZ>(); + uint32_t l_newOmiFreq = 0; + + uint32_t l_newNestFreq = l_sys->getAttr<TARGETING::ATTR_FREQ_PB_MHZ>(); +#ifdef CONFIG_AXONE + l_err = getOmiFreq(l_newOmiFreq); + if(l_err) + { + l_StepError.addErrorDetails( l_err ); + errlCommit( l_err, ISTEP_COMP_ID ); + break; + } +#endif //Trigger sbe update if the nest frequency changed. - if( (l_newNest != l_originalNest) || (l_mcSyncMode != l_bootSyncMode) ) + if( (l_newNestFreq != l_originalNestFreq) + || (l_mcSyncMode != l_bootSyncMode) + || (l_newOmiFreq != l_originalOmiFreq) + ) { TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "The nest frequency or sync mode changed!" " Original Nest: %d New Nest: %d" - " Original syncMode: %d New syncMode: %d", - l_originalNest, l_newNest, l_bootSyncMode, l_mcSyncMode ); + " Original syncMode: %d New syncMode: %d" + " Original Omi : %d New Omi : %d" + , l_originalNestFreq, l_newNestFreq, l_bootSyncMode, l_mcSyncMode + , l_originalOmiFreq, l_newOmiFreq + ); if(l_sys->getAttr<TARGETING::ATTR_IS_MPIPL_HB>() == true) { TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "Error: SBE update detected in MPIPL"); + // It is highly unlikely nest frequency will change + // in Axone systems but OMI freq might. Its is impossible + // for OMI freq to change in Nimbus/Cumulus systems. So + // we will display Nest freq in error for Nimbus/Cumulus and + // display OMI freq for Axone. + /*@ * @errortype * @moduleid MOD_SBE_PERFORM_UPDATE_CHECK * @reasoncode RC_SBE_UPDATE_IN_MPIPL * @userdata1[0:31] original mc sync mode * @userdata1[32:63] new mc sync mode - * @userdata2[0:31] original nest frequency - * @userdata2[32:63] new nest frequency + * @userdata2[0:31] original (nest p9 | omi p9a+) frequency + * @userdata2[32:63] new (nest p9 | omi p9a+) frequency * @devdesc SBE cannot be reset during MPIPL * @custdesc Illegal action during boot */ @@ -394,8 +438,16 @@ void* call_mss_freq( void *io_pArgs ) TWO_UINT32_TO_UINT64( TO_UINT32(l_bootSyncMode), TO_UINT32(l_mcSyncMode)), +#ifndef CONFIG_AXONE + TWO_UINT32_TO_UINT64( + l_originalNestFreq, + l_newNestFreq)); +#else TWO_UINT32_TO_UINT64( - l_originalNest, l_newNest)); + l_originalOmiFreq, + l_newOmiFreq)); +#endif + l_err->collectTrace("ISTEPS_TRACE"); l_StepError.addErrorDetails( l_err ); errlCommit( l_err, ISTEP_COMP_ID ); @@ -403,8 +455,9 @@ void* call_mss_freq( void *io_pArgs ) else { TARGETING::setFrequencyAttributes(l_sys, - l_newNest); + l_newNestFreq); l_err = SBE::updateProcessorSbeSeeproms(); + if( l_err ) { TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, @@ -419,7 +472,6 @@ void* call_mss_freq( void *io_pArgs ) } } } - #endif } while(0); @@ -450,4 +502,54 @@ void* call_mss_freq( void *io_pArgs ) return l_StepError.getErrorHandle(); } +#ifdef CONFIG_AXONE +errlHndl_t getOmiFreq(TARGETING::ATTR_FREQ_OMI_MHZ_type & o_omiFreq) +{ + errlHndl_t l_err = nullptr; + TARGETING::TargetHandleList l_procTargetList; + getAllChips(l_procTargetList, TYPE_PROC); + + assert( l_procTargetList.size() > 0, "getOmiFreq: Expected at least one functional processor"); + + o_omiFreq = l_procTargetList[0]->getAttr<TARGETING::ATTR_FREQ_OMI_MHZ>(); + // Until we are told we need to support individual processor frequency + // assert that all of the processors have the same values + for(uint8_t i = 1; i < l_procTargetList.size(); i++) + { + + TARGETING::ATTR_FREQ_OMI_MHZ_type l_tmpFreq = + l_procTargetList[i]->getAttr<TARGETING::ATTR_FREQ_OMI_MHZ>(); + + if(o_omiFreq != l_tmpFreq) + { + /*@ + * @errortype ERRL_SEV_UNRECOVERABLE + * @moduleid MOD_GET_OMI_FREQ + * @reasoncode RC_OMI_FREQ_MISMATCH + * @userdata1[0:31] First OMI freq found + * @userdata1[32:63] Mismatched OMI freq found + * @userdata2[0:31] Huid of first proc found + * @userdata2[32:63] Huid of proc w/ mismatched OMI freq + * @devdesc Processor have mismatch OMI freq + * @custdesc Invalid processor frequency settings + */ + l_err = new ErrlEntry(ERRL_SEV_UNRECOVERABLE, + MOD_GET_OMI_FREQ, + RC_OMI_FREQ_MISMATCH, + TWO_UINT32_TO_UINT64( + TO_UINT32(o_omiFreq), + TO_UINT32(l_tmpFreq)), + TWO_UINT32_TO_UINT64( + get_huid(l_procTargetList[0]), + get_huid(l_procTargetList[i])), + ErrlEntry::ADD_SW_CALLOUT); + + break; + } + } + + return l_err; +} +#endif + }; // end namespace diff --git a/src/usr/isteps/mss/HBconfig b/src/usr/isteps/mss/HBconfig index f48017fe1..56334c98c 100644 --- a/src/usr/isteps/mss/HBconfig +++ b/src/usr/isteps/mss/HBconfig @@ -1,4 +1,4 @@ config LRDIMM_CAPABLE default n help - Enable the use of LRDIMM code + Enable the use of LRDIMM code
\ No newline at end of file diff --git a/src/usr/targeting/common/xmltohb/simics_AXONE.system.xml b/src/usr/targeting/common/xmltohb/simics_AXONE.system.xml index d47924115..342507e90 100644 --- a/src/usr/targeting/common/xmltohb/simics_AXONE.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_AXONE.system.xml @@ -201,7 +201,7 @@ </attribute> <attribute> <id>ASYNC_NEST_FREQ_MHZ</id> - <default>0xFFFF</default> + <default>2000</default> </attribute> <attribute> <id>HB_SETTINGS</id> @@ -637,6 +637,10 @@ <id>VPD_REC_NUM</id> <default>0</default> </attribute> + <attribute> + <id>FREQ_OMI_MHZ</id> + <default>25600</default> + </attribute> </targetInstance> <!-- ===================================================================== --> |