Update Core Scratch Reg 6 with L3 vs Mainstore for FSP to query

RTC:64829
Change-Id: Ic8e7983f6838b79c359c4cee2647b7676493cb1e
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3564
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

9 files changed, 207 insertions, 27 deletions

diff --git a/src/include/arch/ppc.H b/src/include/arch/ppc.H
index ebb1f0f02..46c78d754 100644
--- a/src/include/arch/ppc.H
+++ b/src/include/arch/ppc.H
@@ -317,6 +317,19 @@ inline size_t getCacheLineWords()
     return getCacheLineBytes() / sizeof(uint64_t);
 }
 
+ALWAYS_INLINE
+inline void writeScratchReg(uint64_t _scratch_addr, uint64_t _data)
+{
+    register uint64_t scratch_addr = _scratch_addr;
+    register uint64_t data = _data;
+
+    asm volatile("mtspr 276, %0\n"
+                 "isync\n"
+                 "mtspr 277, %1"
+                 :: "r" (scratch_addr), "r" (data));
+
+}
+
 /** @brief  This is a special assembler instruction that is a nop on
  *  regular hardware, but has special meaning to Simics.  Code that
  *  executes this instruction in Simics will cause a "hap," a
diff --git a/src/include/kernel/memstate.H b/src/include/kernel/memstate.H
new file mode 100644
index 000000000..35d625f09
--- /dev/null
+++ b/src/include/kernel/memstate.H
@@ -0,0 +1,95 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/include/kernel/misc.H $                                   */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2011,2013              */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+/** @file misc.H
+ *  @brief Misc. Kernel functions and utilities.
+ */
+
+#ifndef __KERNEL_MEMSTATE_H
+#define __KERNEL_MEMSTATE_H
+
+namespace KernelMemState
+{
+    // hb_Mem_Location struct values are defined below.
+    /* Core Scratch 6 (Scom 0x10013289) will be used to indicate the memory
+     state
+
+     Register Bit Definition:
+     - 0:7 - Indicator of memory mode
+     NOTE:  having no bits on in this range indicated the memory is not ready.
+     - - 0b00000000 = Hostboot contained in L3
+     - - 0b00000001 = Hostboot expanded to mainstore
+     - 8:31 - Reserved/Unused
+     - 32:63 - Size of active Hostboot memory in MB
+     - - 0 = Hostboot is not ready yet.
+     - - 4 = Hostboot is using half a cache
+     - - 8 = Hostboot is using the full cache
+     - - 32 = Hostboot is using 32 MB of mainstore*/
+
+
+    enum MemLocation
+    {
+          MEM_CONTAINED_NR  = 0x0,
+          MEM_CONTAINED_L3  = 0x80,
+          MEM_CONTAINED_MS  = 0x40,
+    };
+
+    enum MemSize
+    {
+          NO_MEM          =  0x0,
+          HALF_CACHE      =  0x00000004,
+          FULL_CACHE      =  0x00000008,
+          MS_32MEG        =  0x00000020,
+          PRE_SECURE_BOOT =  0x000000FF,
+    };
+
+    struct mem_location
+    {
+
+        union{
+            struct {
+                uint64_t memMode:8;     /**< indicator of memory mode HostBoot
+                                             contained in l3 or mainstore  */
+
+                uint64_t reserved:24;   /**< reserved */
+                uint64_t memSize:32;    /**< Size of the memory */
+            };
+            uint64_t Scratch6Data;      /**< Full double word */
+        }; 
+   };
+
+    /** @fn set
+     *
+     *  @brief Sets the Hostboot memory location and size in the scratch
+     *     register 6
+     *
+     *  This is used to update the core scratch reg 6 with the current
+     *  location of hostboot memory and the size it is.
+     *
+     *  @param[in] uint16_t - location of the memory (L3 or Mainstore)
+     *  @param[in] uint32_t - size of the memory
+     */
+    void setMemScratchReg(MemLocation i_location,MemSize i_size);
+
+};
+
+#endif
diff --git a/src/include/kernel/misc.H b/src/include/kernel/misc.H
index 5a818078e..11677d250 100644
--- a/src/include/kernel/misc.H
+++ b/src/include/kernel/misc.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2011,2012              */
+/* COPYRIGHT International Business Machines Corp. 2011,2013              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -31,6 +31,8 @@
 #include <usr/vmmconst.h>
 #include <kernel/deferred.H>
 #include <kernel/task.H>
+#include <kernel/memstate.H>
+#include <sys/mmio.h>
 
 namespace KernelMisc
 {
@@ -111,5 +113,24 @@ namespace KernelMisc
      *                     (This address is not dcbz'd itself)
      */
     void populate_cache_lines(uint64_t* i_start, uint64_t* i_end);
+
+    /** @fn set
+     *
+     *  @brief Update value of scratch register to specified data.
+     *
+     *  This is used to update any core scratch reg defined by the enum
+     *      MMIO_SCRATCH_REG with the data passed in.
+     *
+     *     NOTE: This function is a wrapper function for writeScratchReg that
+     *     takes care of modifying the scratch register address value depending
+     *     on the getCPUType.   The writeScratchReg takes the scratch address 
+     *     passed in and puts that date in that register using assembly code
+     *
+     *  @param[in] uint64_t - scratch_addr
+     *  @param[in] uint64_t - Data 
+     */
+    void updateScratchReg(MMIO_Scratch_Register scratch_addr, uint64_t data);
+
+
 };
 #endif
diff --git a/src/include/sys/mmio.h b/src/include/sys/mmio.h
index afdf0d5d1..76c9c7866 100644
--- a/src/include/sys/mmio.h
+++ b/src/include/sys/mmio.h
@@ -92,8 +92,9 @@ enum MMIO_Scratch_Register
     MMIO_SCRATCH_RSVD_T4 = 0x20,
         /** Thread5 Scratch Register - Unused */
     MMIO_SCRATCH_RSVD_T5 = 0x28,
-        /** Thread6 Scratch Register - Unused */
-    MMIO_SCRATCH_RSVD_T6 = 0x30,
+        /** Thread6 Scratch Register - Identifies where hostboot currently
+                                       resides and how large the space is */
+    MMIO_SCRATCH_MEMORY_STATE = 0x30,
         /** Thread7 Scratch Register - Identifies if Hostboot is active after
          *                             host_start_payload. */
     MMIO_SCRATCH_HOSTBOOT_ACTIVE = 0x38,
diff --git a/src/kernel/basesegment.C b/src/kernel/basesegment.C
index 0b4ad5969..5317d2a25 100644
--- a/src/kernel/basesegment.C
+++ b/src/kernel/basesegment.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2011,2012              */
+/* COPYRIGHT International Business Machines Corp. 2011,2013              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -32,6 +32,7 @@
 #include <kernel/console.H>
 #include <kernel/pagemgr.H>
 #include <kernel/spte.H>
+#include <kernel/memstate.H>
 
 BaseSegment::~BaseSegment()
 {
@@ -280,6 +281,11 @@ int BaseSegment::_mmExtend(void)
     // block size to the physical mem size.
     iv_physMemSize += VMM_EXTEND_BLOCK_SIZE;
 
+
+    // Call to set the Hostboot MemSize and location needed for DUMP.
+    KernelMemState::setMemScratchReg(KernelMemState::MEM_CONTAINED_MS,
+                                     KernelMemState::MS_32MEG);
+
     return 0;
 }
 
diff --git a/src/kernel/misc.C b/src/kernel/misc.C
index 629a474de..f73bf2947 100644
--- a/src/kernel/misc.C
+++ b/src/kernel/misc.C
@@ -33,6 +33,7 @@
 #include <errno.h>
 #include <kernel/pagemgr.H>
 #include <kernel/vmmmgr.H>              // INITIAL_MEM_SIZE
+#include <kernel/memstate.H>
 
 extern "C"
     void kernel_shutdown(size_t, uint64_t, uint64_t, uint64_t) NO_RETURN;
@@ -65,20 +66,9 @@ namespace KernelMisc
                        status);
             }
 
-            register uint64_t scratch_address = 0; // Values from PervSpec
-            switch(CpuID::getCpuType())
-            {
-              case CORE_POWER8_MURANO:
-              case CORE_POWER8_VENICE:
-              case CORE_UNKNOWN:
-                scratch_address = 0x40;
-                break;
-            }
+            // Call to set the Core Scratch Reg 0 with the status 
+            updateScratchReg(MMIO_SCRATCH_PROGRESS_CODE, status);
 
-            asm volatile("mtspr 276, %0\n"
-                         "isync\n"
-                         "mtspr 277, %1"
-                         :: "r" (scratch_address), "r" (status));
         }
 
         // If the Shutdown was called with a status of GOOD then
@@ -269,6 +259,10 @@ namespace KernelMisc
         }
 
         executed = true;
+
+        KernelMemState::setMemScratchReg(KernelMemState::MEM_CONTAINED_L3,
+                                         KernelMemState::FULL_CACHE);
+
         return 0;
     }
 
@@ -282,4 +276,45 @@ namespace KernelMisc
             i_start += cache_line_size;
         }
     }
+
+    void updateScratchReg(MMIO_Scratch_Register scratch_addr,
+                          uint64_t data)
+    {
+
+        uint64_t l_scratch_addr = static_cast<uint64_t>(scratch_addr);
+
+        switch(CpuID::getCpuType())
+        {
+          case CORE_POWER8_MURANO:
+          case CORE_POWER8_VENICE:
+          case CORE_UNKNOWN:
+            l_scratch_addr = l_scratch_addr + 0x40;
+            break;
+        }
+
+        writeScratchReg(l_scratch_addr, data);
+    };
+
+
+};
+
+namespace KernelMemState
+{
+
+    void setMemScratchReg(MemLocation i_location,
+                         MemSize i_size)
+    {
+        mem_location l_MemData;
+
+        l_MemData.memMode = i_location;
+        l_MemData.reserved = 0;
+        l_MemData.memSize = i_size;
+
+        KernelMisc::updateScratchReg(MMIO_SCRATCH_MEMORY_STATE,
+                                   l_MemData.Scratch6Data);
+
+    }
+
+
+
 };
diff --git a/src/kernel/pagemgr.C b/src/kernel/pagemgr.C
index f1a1f2976..f1e74c695 100644
--- a/src/kernel/pagemgr.C
+++ b/src/kernel/pagemgr.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2010,2012              */
+/* COPYRIGHT International Business Machines Corp. 2010,2013              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -33,6 +33,8 @@
 #include <kernel/misc.H>
 #include <sys/syscall.h>
 #include <assert.h>
+#include <kernel/memstate.H>
+
 
 size_t PageManager::cv_coalesce_count = 0;
 size_t PageManager::cv_low_page_count = -1;
@@ -209,6 +211,9 @@ PageManager::PageManager()
 
     iv_heap.addMemory( addr, length );
 
+    KernelMemState::setMemScratchReg(KernelMemState::MEM_CONTAINED_L3,
+                                     KernelMemState::HALF_CACHE);
+
     // Statistics
     iv_pagesTotal = length;
     iv_pagesAvail = length;
diff --git a/src/usr/hwpf/hwp/initfiles/sample.initfile b/src/usr/hwpf/hwp/initfiles/sample.initfile
index 1110664d2..7d68ad41e 100755
--- a/src/usr/hwpf/hwp/initfiles/sample.initfile
+++ b/src/usr/hwpf/hwp/initfiles/sample.initfile
@@ -209,13 +209,14 @@ scom 0x0000000015013288              {
 #--******************************************************************************
 #-- Complex SCOM with Bit Support, associated attributes and logical operators
 #--******************************************************************************
-scom 0x0000000015013289              {
-  bits,  scom_data,               MBA1.ATTR_CHIP_UNIT_POS, expr;
-  23,    0b0,                     1,                       MBA0.ATTR_CHIP_UNIT_POS == 1;
-  23,    MBA1.ATTR_CHIP_UNIT_POS, 1,                       MBA0.ATTR_CHIP_UNIT_POS == 0;
-  24:25, 0b10,                    0,                       any;
-  24:25, 0b01,                    1,                       SYS.ATTR_SCRATCH_UINT8_ARRAY_1[2] == SYS.ATTR_SCRATCH_UINT8_1;
-}
+# TODO:  RTC:Issue 66579   remove this register as it is now being used by dump
+#scom 0x0000000015013289              {
+#  bits,  scom_data,               MBA1.ATTR_CHIP_UNIT_POS, expr;
+#  23,    0b0,                     1,                       MBA0.ATTR_CHIP_UNIT_POS == 1;
+#  23,    MBA1.ATTR_CHIP_UNIT_POS, 1,                       MBA0.ATTR_CHIP_UNIT_POS == 0;
+#  24:25, 0b10,                    0,                       any;
+#  24:25, 0b01,                    1,                       SYS.ATTR_SCRATCH_UINT8_ARRAY_1[2] == SYS.ATTR_SCRATCH_UINT8_1;
+#}
 
 #--******************************************************************************
 #-- Basic SCOM with Multiple Arrays/Address Ranges
diff --git a/src/usr/hwpf/test/hwpftest.H b/src/usr/hwpf/test/hwpftest.H
index ae267b83e..ebf401df9 100644
--- a/src/usr/hwpf/test/hwpftest.H
+++ b/src/usr/hwpf/test/hwpftest.H
@@ -353,8 +353,11 @@ public:
             {0x0000000015013286, 0, 0x0000000000000192},
             {0x0000000015013287, 0, 0x0000000000000182},
             {0x0000000015013288, 0, 0x0000000000000192},
-            {0x0000000015013289, 0, (0x8000000000000000 >> 0x17) |
-                                    (0x4000000000000000 >> 0x18)}
+            // TODO:  RTC:Issue 66579    Removed as this register is now being
+            // used by dump
+
+            /*{0x0000000015013289, 0, (0x8000000000000000 >> 0x17) |
+                                    (0x4000000000000000 >> 0x18)}*/
         };
 
         fapi::ReturnCode l_rc = fapi::FAPI_RC_SUCCESS;