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| author | Joe McGill <jmcgill@us.ibm.com> | 2016-12-19 19:34:39 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-01-04 17:30:00 -0500 |
| commit | 7f89db8c75fe7efdfd95adec93ef9dbdbf0edc3e (patch) | |
| tree | d016491676131d2557a8f335a533a70aa74f38fd | |
| parent | a5a056312006942f7a12cad606f570def4d3b37b (diff) | |
| download | blackbird-hostboot-7f89db8c75fe7efdfd95adec93ef9dbdbf0edc3e.tar.gz blackbird-hostboot-7f89db8c75fe7efdfd95adec93ef9dbdbf0edc3e.zip | |
p9_htm_setup -- update default VGTARGET state, ensure toggle on MEM_ALLOC
Change-Id: I4c47de2331a334fc629456257b440ebd1132fd71
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34074
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34075
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
| -rwxr-xr-x | src/import/chips/p9/procedures/hwp/nest/p9_htm_setup.C | 5 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/p9_htm_setup_attributes.xml | 2 |
2 files changed, 4 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_htm_setup.C b/src/import/chips/p9/procedures/hwp/nest/p9_htm_setup.C index 5676209a3..2c49e3674 100755 --- a/src/import/chips/p9/procedures/hwp/nest/p9_htm_setup.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_htm_setup.C @@ -756,13 +756,14 @@ fapi2::ReturnCode setup_HTM_MEM( // Note: Yes, write same value to both engines. for (uint8_t ii = 0; ii < NUM_NHTM_ENGINES; ii++) { + // MEM_ALLOC must switch from 0->1 for this setup to complete + l_scomData.clearBit<PU_HTM0_HTM_MEM_HTMSC_ALLOC>(); FAPI_TRY(fapi2::putScom(i_target, NHTM_modeRegList[ii] + HTM_MEM, l_scomData), "setup_HTM_MEM: putScom returns error (1): Addr 0x%016llX, " "l_rc 0x%.8X", NHTM_modeRegList[ii] + HTM_MEM, (uint64_t)fapi2::current_err); - // MEM_ALLOC must switch from 0->1 for this setup to complete l_scomData.setBit<PU_HTM0_HTM_MEM_HTMSC_ALLOC>(); FAPI_TRY(fapi2::putScom(i_target, NHTM_modeRegList[ii] + HTM_MEM, l_scomData), @@ -972,7 +973,7 @@ fapi2::ReturnCode setup_HTM_MODE( FAPI_DBG(" ATTR_HTMSC_MODE_VGTARGET 0x%.8X", l_uint32_attr); l_scomData.insertFromRight<PU_HTM0_HTM_MODE_HTMSC_VGTARGET, PU_HTM0_HTM_MODE_HTMSC_VGTARGET_LEN> - (l_uint32_attr); + (~l_uint32_attr); // Display HTM_MODE reg setup value FAPI_INF("setup_HTM_MODE: HTM_MODE reg setup: 0x%016llX", l_scomData); diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_htm_setup_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_htm_setup_attributes.xml index af7f820ff..0d0886206 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/p9_htm_setup_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_htm_setup_attributes.xml @@ -498,7 +498,7 @@ <id>ATTR_HTMSC_MODE_VGTARGET</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> Nest HTM: VG target mode. - HTM Collection Mode Register (24:39). + Stores inverse of HTM Collection Mode Register (24:39). Vg Target bits should be configured if HTM_MEM[scope] is Vg or if Disable Group Scope=1 </description> |
