Correct ptr math and force CI i/o in kernal for machchk escalation

When we take machine checks in hostboot we will escalate them to a
checkstop by setting bit 31 in the PB Fir reg 0x5012000. This is
done via xscom in some kernel code. There were 2 bugs found in this
path. The first was in how we were calculating the MMIO addressed
used to perform the xscom. The other issue was that we were not
forcing the kernel code to perform a cache-inhibited store. This
commit addressed both of these problems.

Change-Id: I41871fa754cbedf4cdb913711ce02a00f0213334
CQ: SW481030
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/87539
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Reviewed-by: Nicholas E Bofferding <bofferdn@us.ibm.com>
Reviewed-by: William G Hoffa <wghoffa@us.ibm.com>

2 files changed, 11 insertions, 7 deletions

diff --git a/src/kernel/machchk.C b/src/kernel/machchk.C
index d17c1ff90..73f5831b6 100644
--- a/src/kernel/machchk.C
+++ b/src/kernel/machchk.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2013,2018                        */
+/* Contributors Listed Below - COPYRIGHT 2013,2019                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -180,7 +180,14 @@ void forceCheckstop()
     {
         printk( "Forcing a xstop with %p = %.16lX\n",
                 g_xstopRegPtr, g_xstopRegValue );
-        *g_xstopRegPtr = g_xstopRegValue;
+
+        // Per PowerPC ISA :
+        // Store Doubleword Caching Inhibited Indexed
+        // stdcix      RS,RA,RB
+        // let the effective address (EA) be the sum(RA|0)+ (RB).
+        // (RS) is stored into the doubleword in storage addressed by EA
+        asm volatile("stdcix %0,0,%1"
+                     :: "r" (g_xstopRegValue) , "r" (reinterpret_cast <uint64_t>(g_xstopRegPtr)));
     }
     else
     {
diff --git a/src/usr/xscom/xscom.C b/src/usr/xscom/xscom.C
index 73d7e9e22..3b3a59d40 100644
--- a/src/usr/xscom/xscom.C
+++ b/src/usr/xscom/xscom.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2011,2018                        */
+/* Contributors Listed Below - COPYRIGHT 2011,2019                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -810,11 +810,8 @@ uint64_t generate_mmio_addr( TARGETING::Target* i_proc,
     // Build the XSCom address (relative to group 0, chip 0)
     XSComP9Address l_mmioAddr(i_scomAddr);
 
-    // Get the offset
-    uint64_t l_offset = l_mmioAddr.offset();
-
     // Compute value relative to target chip
-    l_returnAddr = l_XSComBaseAddr + l_offset;
+    l_returnAddr = l_XSComBaseAddr + l_mmioAddr;
 
     return l_returnAddr;
 }