cpu_spr_value syscall for SLW image build.

    Task 44887

Change-Id: If87b6e80b974bb4cbff13844d8a3f055a17282d2
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1378
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

9 files changed, 258 insertions, 89 deletions

diff --git a/src/include/arch/ppc.H b/src/include/arch/ppc.H
index 7807b5743..9ba62ff9e 100644
--- a/src/include/arch/ppc.H
+++ b/src/include/arch/ppc.H
@@ -1,25 +1,26 @@
-//  IBM_PROLOG_BEGIN_TAG
-//  This is an automatically generated prolog.
-//
-//  $Source: src/include/arch/ppc.H $
-//
-//  IBM CONFIDENTIAL
-//
-//  COPYRIGHT International Business Machines Corp. 2011
-//
-//  p1
-//
-//  Object Code Only (OCO) source materials
-//  Licensed Internal Code Source Materials
-//  IBM HostBoot Licensed Internal Code
-//
-//  The source code for this program is not published or other-
-//  wise divested of its trade secrets, irrespective of what has
-//  been deposited with the U.S. Copyright Office.
-//
-//  Origin: 30
-//
-//  IBM_PROLOG_END
+/*  IBM_PROLOG_BEGIN_TAG
+ *  This is an automatically generated prolog.
+ *
+ *  $Source: src/include/arch/ppc.H $
+ *
+ *  IBM CONFIDENTIAL
+ *
+ *  COPYRIGHT International Business Machines Corp. 2011-2012
+ *
+ *  p1
+ *
+ *  Object Code Only (OCO) source materials
+ *  Licensed Internal Code Source Materials
+ *  IBM HostBoot Licensed Internal Code
+ *
+ *  The source code for this program is not published or other-
+ *  wise divested of its trade secrets, irrespective of what has
+ *  been deposited with the U.S. Copyright Office.
+ *
+ *  Origin: 30
+ *
+ *  IBM_PROLOG_END_TAG
+ */
 #ifndef __KERNEL_PPCARCH_H
 #define __KERNEL_PPCARCH_H
 
@@ -213,6 +214,29 @@ inline uint64_t getHEIR()
 }
 
 ALWAYS_INLINE
+inline uint64_t getLPCR()
+{
+    register uint64_t lpcr = 0;
+    asm volatile("mfspr %0, 318" : "=r" (lpcr));
+    return lpcr;
+}
+
+ALWAYS_INLINE
+inline void setLPCR(uint64_t _lpcr)
+{
+    register uint64_t lpcr = _lpcr;
+    asm volatile("mtspr 318, %0; isync" :: "r" (lpcr));
+}
+
+ALWAYS_INLINE
+inline uint64_t getHRMOR()
+{
+    register uint64_t hrmor = 0;
+    asm volatile("mfspr %0, 313" : "=r" (hrmor));
+    return hrmor;
+}
+
+ALWAYS_INLINE
 inline void setThreadPriorityLow()
 {
     asm volatile("or 1,1,1");
diff --git a/src/include/kernel/cpumgr.H b/src/include/kernel/cpumgr.H
index d7bc2da78..bbd16fcd8 100644
--- a/src/include/kernel/cpumgr.H
+++ b/src/include/kernel/cpumgr.H
@@ -101,6 +101,20 @@ class CpuManager
          */
         static void forceMemoryPeriodic();
 
+        /** Desired value for MSR after wakeup.
+         *
+         *  bit 0 - 64 bit mode.
+         *  bit 3 - Hypervisor mode.
+         */
+        static const uint64_t WAKEUP_MSR_VALUE =    0x9000000000000000;
+
+        /** Desired value for LPCR after wakeup.
+         *
+         *  bit 49 - Wake-up from external interrupt.
+         *  bit 51 - Wake-up from machine check.
+         *  bit 60, 61 - LPES(0,1) = 1 (see ISA).
+         */
+        static const uint64_t WAKEUP_LPCR_VALUE =   0x000000000000500C;
 
     protected:
         CpuManager();
@@ -131,6 +145,7 @@ class CpuManager
         static uint64_t cv_shutdown_status;
 
         static InteractiveDebug cv_interactive_debug;
+
 };
 
 #endif
diff --git a/src/include/kernel/syscalls.H b/src/include/kernel/syscalls.H
index 0a0d5dba5..28e13628c 100644
--- a/src/include/kernel/syscalls.H
+++ b/src/include/kernel/syscalls.H
@@ -90,6 +90,8 @@ namespace Systemcalls
         MISC_CPUDDLEVEL,
             /** cpu_start_core() */
         MISC_CPUSTARTCORE,
+            /** cpu_spr_value() */
+        MISC_CPUSPRVALUE,
 
             /** mm_alloc_block() */
         MM_ALLOC_BLOCK,
diff --git a/src/include/sys/misc.h b/src/include/sys/misc.h
index 90ff57964..e1f8e42a7 100644
--- a/src/include/sys/misc.h
+++ b/src/include/sys/misc.h
@@ -1,25 +1,26 @@
-//  IBM_PROLOG_BEGIN_TAG
-//  This is an automatically generated prolog.
-//
-//  $Source: src/include/sys/misc.h $
-//
-//  IBM CONFIDENTIAL
-//
-//  COPYRIGHT International Business Machines Corp. 2011
-//
-//  p1
-//
-//  Object Code Only (OCO) source materials
-//  Licensed Internal Code Source Materials
-//  IBM HostBoot Licensed Internal Code
-//
-//  The source code for this program is not published or other-
-//  wise divested of its trade secrets, irrespective of what has
-//  been deposited with the U.S. Copyright Office.
-//
-//  Origin: 30
-//
-//  IBM_PROLOG_END
+/*  IBM_PROLOG_BEGIN_TAG
+ *  This is an automatically generated prolog.
+ *
+ *  $Source: src/include/sys/misc.h $
+ *
+ *  IBM CONFIDENTIAL
+ *
+ *  COPYRIGHT International Business Machines Corp. 2011-2012
+ *
+ *  p1
+ *
+ *  Object Code Only (OCO) source materials
+ *  Licensed Internal Code Source Materials
+ *  IBM HostBoot Licensed Internal Code
+ *
+ *  The source code for this program is not published or other-
+ *  wise divested of its trade secrets, irrespective of what has
+ *  been deposited with the U.S. Copyright Office.
+ *
+ *  Origin: 30
+ *
+ *  IBM_PROLOG_END_TAG
+ */
 #ifndef __SYS_MISC_H
 #define __SYS_MISC_H
 
@@ -40,7 +41,6 @@ enum ShutdownStatus
     SHUTDOWN_STATUS_INITSVC_FAILED      = 0x01230004,
 };
 
-
 #ifdef __cplusplus
 extern "C"
 {
@@ -112,6 +112,27 @@ size_t cpu_thread_count();
  */
 int cpu_start_core(uint64_t pir);
 
+/**
+ * @enum CpuSprNames
+ *
+ * Names for SPR registers for cpu_spr_value().
+ */
+enum CpuSprNames
+{
+    CPU_SPR_MSR,
+    CPU_SPR_LPCR,
+    CPU_SPR_HRMOR,
+};
+
+/** @fn cpu_spr_value
+ *  @brief Reads the kernel-desired value for an SPR.
+ *
+ *  This is used, for instance, in building a sleep-winkle image.
+ *
+ *  @return The desired value of the SPR register.
+ */
+uint64_t cpu_spr_value(CpuSprNames spr);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/src/kernel/cpumgr.C b/src/kernel/cpumgr.C
index 48bf4a5e8..943ef48fd 100644
--- a/src/kernel/cpumgr.C
+++ b/src/kernel/cpumgr.C
@@ -161,9 +161,15 @@ void CpuManager::startSlaveCPU(cpu_t* cpu)
 
 void CpuManager::activateCPU(cpu_t * i_cpu)
 {
+    // Set active.
     i_cpu->active = true;
     __sync_add_and_fetch(&cv_cpuCount, 1);
     lwsync();
+
+    // Verify / set SPRs.
+    uint64_t msr = getMSR();
+    kassert(WAKEUP_MSR_VALUE == msr);
+    setLPCR(WAKEUP_LPCR_VALUE);
 }
 
 void CpuManager::executePeriodics(cpu_t * i_cpu)
diff --git a/src/kernel/start.S b/src/kernel/start.S
index a8166b980..2e4cd1784 100644
--- a/src/kernel/start.S
+++ b/src/kernel/start.S
@@ -1,25 +1,26 @@
-//  IBM_PROLOG_BEGIN_TAG
-//  This is an automatically generated prolog.
-//
-//  $Source: src/kernel/start.S $
-//
-//  IBM CONFIDENTIAL
-//
-//  COPYRIGHT International Business Machines Corp. 2010 - 2011
-//
-//  p1
-//
-//  Object Code Only (OCO) source materials
-//  Licensed Internal Code Source Materials
-//  IBM HostBoot Licensed Internal Code
-//
-//  The source code for this program is not published or other-
-//  wise divested of its trade secrets, irrespective of what has
-//  been deposited with the U.S. Copyright Office.
-//
-//  Origin: 30
-//
-//  IBM_PROLOG_END
+/*  IBM_PROLOG_BEGIN_TAG
+ *  This is an automatically generated prolog.
+ *
+ *  $Source: src/kernel/start.S $
+ *
+ *  IBM CONFIDENTIAL
+ *
+ *  COPYRIGHT International Business Machines Corp. 2010-2012
+ *
+ *  p1
+ *
+ *  Object Code Only (OCO) source materials
+ *  Licensed Internal Code Source Materials
+ *  IBM HostBoot Licensed Internal Code
+ *
+ *  The source code for this program is not published or other-
+ *  wise divested of its trade secrets, irrespective of what has
+ *  been deposited with the U.S. Copyright Office.
+ *
+ *  Origin: 30
+ *
+ *  IBM_PROLOG_END_TAG
+ */
 .include "kernel/ppcconsts.S"
 
 .section .text.intvects
@@ -29,6 +30,18 @@ _start:
     ;// Set thread priority high.
     or 3,3,3
 
+    ;// Clear MSR[TA] (bit 63).
+    mfmsr r2
+    rldicl r2,r2,1,1
+    rotldi r2,r2,63
+    ;// Set up SRR0 / SRR1 to enable new MSR.
+    mtsrr1 r2
+    li r2, _start_postmsr@l
+    mtsrr0 r2
+    rfid
+
+_start_postmsr:
+
     ;// Determine if this is the first thread.
     li r4, 2
     ;// Read spinlock value.
diff --git a/src/kernel/syscall.C b/src/kernel/syscall.C
index 26a72cd35..061971f96 100644
--- a/src/kernel/syscall.C
+++ b/src/kernel/syscall.C
@@ -97,6 +97,7 @@ namespace Systemcalls
     void CpuCoreType(task_t *t);
     void CpuDDLevel(task_t *t);
     void CpuStartCore(task_t *t);
+    void CpuSprValue(task_t *t);
     void MmAllocBlock(task_t *t);
     void MmRemovePages(task_t *t);
     void MmSetPermission(task_t *t);
@@ -131,6 +132,7 @@ namespace Systemcalls
         &CpuCoreType, // MISC_CPUCORETYPE
         &CpuDDLevel,  // MISC_CPUDDLEVEL
         &CpuStartCore, // MISC_CPUSTARTCORE
+        &CpuSprValue, // MISC_CPUSPRVALUE
 
         &MmAllocBlock, // MM_ALLOC_BLOCK
         &MmRemovePages, // MM_REMOVE_PAGES
@@ -640,6 +642,31 @@ namespace Systemcalls
             CpuManager::startCore(static_cast<uint64_t>(TASK_GETARG0(t))));
     };
 
+    /** Read SPR values. */
+    void CpuSprValue(task_t *t)
+    {
+        uint64_t spr = TASK_GETARG0(t);
+
+        switch (spr)
+        {
+            case CPU_SPR_MSR:
+                TASK_SETRTN(t, CpuManager::WAKEUP_MSR_VALUE);
+                break;
+
+            case CPU_SPR_LPCR:
+                TASK_SETRTN(t, CpuManager::WAKEUP_LPCR_VALUE);
+                break;
+
+            case CPU_SPR_HRMOR:
+                TASK_SETRTN(t, getHRMOR());
+                break;
+
+            default:
+                TASK_SETRTN(t, -1);
+                break;
+        }
+    };
+
     /**
      * Allocate a block of virtual memory within the base segment
      * @param[in] t: The task used to allocate a block in the base segment
diff --git a/src/lib/syscall_misc.C b/src/lib/syscall_misc.C
index 3124342c1..af58021a7 100644
--- a/src/lib/syscall_misc.C
+++ b/src/lib/syscall_misc.C
@@ -1,25 +1,26 @@
-//  IBM_PROLOG_BEGIN_TAG
-//  This is an automatically generated prolog.
-//
-//  $Source: src/lib/syscall_misc.C $
-//
-//  IBM CONFIDENTIAL
-//
-//  COPYRIGHT International Business Machines Corp. 2011
-//
-//  p1
-//
-//  Object Code Only (OCO) source materials
-//  Licensed Internal Code Source Materials
-//  IBM HostBoot Licensed Internal Code
-//
-//  The source code for this program is not published or other-
-//  wise divested of its trade secrets, irrespective of what has
-//  been deposited with the U.S. Copyright Office.
-//
-//  Origin: 30
-//
-//  IBM_PROLOG_END
+/*  IBM_PROLOG_BEGIN_TAG
+ *  This is an automatically generated prolog.
+ *
+ *  $Source: src/lib/syscall_misc.C $
+ *
+ *  IBM CONFIDENTIAL
+ *
+ *  COPYRIGHT International Business Machines Corp. 2011-2012
+ *
+ *  p1
+ *
+ *  Object Code Only (OCO) source materials
+ *  Licensed Internal Code Source Materials
+ *  IBM HostBoot Licensed Internal Code
+ *
+ *  The source code for this program is not published or other-
+ *  wise divested of its trade secrets, irrespective of what has
+ *  been deposited with the U.S. Copyright Office.
+ *
+ *  Origin: 30
+ *
+ *  IBM_PROLOG_END_TAG
+ */
 #define __HIDDEN_SYSCALL_SHUTDOWN
 
 #include <sys/misc.h>
@@ -76,3 +77,9 @@ int cpu_start_core(uint64_t pir)
         _syscall1(MISC_CPUSTARTCORE, reinterpret_cast<void*>(pir)));
 }
 
+uint64_t cpu_spr_value(CpuSprNames spr)
+{
+    return reinterpret_cast<uint64_t>(
+        _syscall1(MISC_CPUSPRVALUE, reinterpret_cast<void*>(spr)));
+}
+
diff --git a/src/usr/testcore/kernel/misctest.H b/src/usr/testcore/kernel/misctest.H
new file mode 100644
index 000000000..9a7cbb2ba
--- /dev/null
+++ b/src/usr/testcore/kernel/misctest.H
@@ -0,0 +1,54 @@
+/*  IBM_PROLOG_BEGIN_TAG
+ *  This is an automatically generated prolog.
+ *
+ *  $Source: src/usr/testcore/kernel/misctest.H $
+ *
+ *  IBM CONFIDENTIAL
+ *
+ *  COPYRIGHT International Business Machines Corp. 2012
+ *
+ *  p1
+ *
+ *  Object Code Only (OCO) source materials
+ *  Licensed Internal Code Source Materials
+ *  IBM HostBoot Licensed Internal Code
+ *
+ *  The source code for this program is not published or other-
+ *  wise divested of its trade secrets, irrespective of what has
+ *  been deposited with the U.S. Copyright Office.
+ *
+ *  Origin: 30
+ *
+ *  IBM_PROLOG_END_TAG
+ */
+#ifndef __TESTCORE_KERNEL_MISC_H
+#define __TESTCORE_KERNEL_MISC_H
+
+#include <sys/misc.h>
+#include <kernel/cpumgr.H>
+
+/** @file misctest.H
+ *
+ *  Testcases for the system calls in sys/misc.h
+ */
+
+class MiscTest : public CxxTest::TestSuite
+{
+    public:
+
+        /** Tests for cpu_spr_value() */
+        void testCpuSprValue()
+        {
+            if (CpuManager::WAKEUP_MSR_VALUE != cpu_spr_value(CPU_SPR_MSR))
+            {
+                TS_FAIL("MSR value is not as expected.");
+            }
+
+            if (CpuManager::WAKEUP_LPCR_VALUE != cpu_spr_value(CPU_SPR_LPCR))
+            {
+                TS_FAIL("LPCR value is not as expected.");
+            }
+        }
+};
+
+#endif