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path: root/stage1/init_hw.c
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* stage1: Enable most previously disabled init_hw code. (#218)Evan Lojewski2021-05-161-19/+22
* stage1: Fix an issue that resulted in FreeBSD failing to read out a valid MAC...Evan Lojewski2021-05-161-1/+5
* stage1: Ensure PciConfig is initialized to enable APE writes from the host. (...Evan Lojewski2021-05-151-1/+8
* stage1: Ensure the link does not drop on driver load/unload. (#186)Evan Lojewski2020-11-281-3/+20
* stage1: Cleanup remaining linting issues (#169)Evan Lojewski2020-11-081-42/+70
* stage1: Ensure only valid vendor and device Ids are used. (#168)Evan Lojewski2020-11-081-13/+21
* stage1: Cleanup trivial linting warnings. (#166)Evan Lojewski2020-11-081-36/+28
* build: Enable builds under FreeBSD (#164)Evan Lojewski2020-11-071-0/+2
* clang-format: Enable additional projects and re-format. (#61)Evan Lojewski2020-03-211-52/+48
* init: Simplify stage1 init and enable handshaking between stage1 and the APE ...Evan Lojewski2020-02-081-35/+0
* init: Bypass block 0x8010 init when there is a risk of an infinite loop due t...Evan Lojewski2020-02-081-39/+42
* MII: Add a device parameter to enable the APE to use different registers base...Evan Lojewski2019-08-071-25/+33
* Remove additional system includesLojewski, Evan2019-05-111-2/+1
* Update stage1 to perform all required init. Remove stage2 folder.Evan Lojewski2019-03-161-0/+40
* Add missing DEVICE.EavRefClockControl initialization.Evan Lojewski2019-03-111-7/+15
* Aquire the APE lock before configuring the MII ports.Evan Lojewski2019-02-261-0/+3
* Ensure MII Port0 init only runs on function 0. Als fix mac addr loading.Evan Lojewski2019-02-261-48/+51
* Add some additional debugging to stage1 init code.Evan Lojewski2019-02-241-32/+48
* Update stage1 code to latest implimentation. Zero out bss during early init.Evan Lojewski2019-02-231-3/+25
* Add additional init-from-nvm codeEvan Lojewski2019-02-191-19/+67
* Add additional nvm configuration handling.Evan Lojewski2019-02-191-27/+66
* Add additional init-from-NVM code.Evan Lojewski2019-02-191-3/+97
* Add additional hw initialization.Evan Lojewski2019-02-181-3/+54
* Run stage1 init_hw.c through clang-format.Evan Lojewski2019-02-181-6/+3
* Update MII init code to match latest description for port 0.Evan Lojewski2019-02-181-6/+13
* Impliment mii initialization routines for stage 1.Evan Lojewski2019-02-161-7/+40
* Update nvrma format to more closely match ortega spec.Evan Lojewski2019-02-111-1/+1
* Add an iniital WIP version of stage1 main.Evan Lojewski2019-02-111-2/+48
* Do a manual clang-format runEvan Lojewski2019-02-091-18/+29
* Rename stage0 to stage1, matching https://github.com/hlandau/ortega/blob/mast...Evan Lojewski2019-02-091-0/+107
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