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* Check in some additional ipxact generator output.Evan Lojewski2019-05-0414-0/+4237
* Add a passthrough rx routine bypassing any buffers.Evan Lojewski2019-05-041-0/+3
* Update TX/RX sim generationEvan Lojewski2019-05-028-12/+21
* Add initial RX port register generation.Evan Lojewski2019-05-029-0/+611
* Begin moving APE tx code from the host to the APE.Evan Lojewski2019-05-023-0/+15
* Additioanl tx trialsEvan Lojewski2019-05-012-0/+12
* Fix register definiton for ape peripheral.Evan Lojewski2019-04-292-0/+6
* Update tx port ipxact definition and regen.Evan Lojewski2019-04-288-0/+616
* Add MAC address match registers and regenerate.Evan Lojewski2019-04-222-0/+48
* Begin adding support for setting ape statistics in the SHM region.Evan Lojewski2019-04-1413-204/+1545
* Split APE register region into two - mapped in different places based on host...Evan Lojewski2019-04-132-0/+402
* Split APE register region into two - mapped in different places based on host...Evan Lojewski2019-04-134-264/+6
* Regenrate headers with additional APE registers for RX/TX.Evan Lojewski2019-04-132-0/+168
* Regenerate header with properly component offsets.Evan Lojewski2019-04-091-8/+8
* Update APE registers to exist in the APE code.Evan Lojewski2019-04-092-8/+152
* Add initial rx-from-network initialization code.Evan Lojewski2019-04-061-8/+20
* Ass missing HAL code for the APE FILTERS and NVIC registers.Evan Lojewski2019-04-064-0/+494
* Add initial indeirect APE read support for the host cxxsim code.Evan Lojewski2019-04-068-40/+44
* Clean up CXXRegister print outptu.Evan Lojewski2019-04-061-2/+2
* Clean up CXXregister code slightly to prepare for initial APE-indirect access...Evan Lojewski2019-04-067-1100/+669
* Add initial ape loade rbinary to allow the bcmregtool to read/write arbitrary...Evan Lojewski2019-04-032-0/+28
* Regenerate headers + simulation code to allow arbitrary read/writes from the ...Evan Lojewski2019-04-036-0/+150
* Add in DEVICVE changes for simulator.Evan Lojewski2019-04-012-0/+14
* Fix typoe in HAL.Evan Lojewski2019-03-241-1/+1
* Split APE SHM out of the APE register area. Instantiate 4x in the APE, one pe...Evan Lojewski2019-03-236-542/+687
* SPlit NVM registers out of bcm5719 xml.Evan Lojewski2019-03-231-1/+1
* Update ipxact to include addtional APE registers.Evan Lojewski2019-03-162-15/+253
* Update the host/sim code to map the APE SHM reigster area.Evan Lojewski2019-03-162-1/+3
* Add som additional attention register information from the manual.Evan Lojewski2019-03-162-0/+7
* Add additional shadowed MII regisers and APE registers.Evan Lojewski2019-03-136-5/+117
* Add in additional NVM configuration registers to the ipxact and regenerate.Evan Lojewski2019-03-114-0/+42
* Align register printout bitfields.Evan Lojewski2019-02-231-3/+11
* Update stage1 to load stage2 and report the status.Evan Lojewski2019-02-236-0/+7
* Add some initial support for pretty-printing registers.Evan Lojewski2019-02-231-1/+35
* Fix MII register addresses and impliment accessing paged blocks.Evan Lojewski2019-02-161-0/+5
* Enable the simulator to use any of the bcm5719 ports.Evan Lojewski2019-02-162-7/+7
* Update bcmregtool to print out a number of useful registers and to support si...Evan Lojewski2019-02-167-1/+48
* Move common simulator init code to HAL.cppEvan Lojewski2019-02-152-6/+95
* Ensure we don't accidentaly mmap pci registers under valgrind. It causes the ...Evan Lojewski2019-02-151-0/+13
* Regen ipxact output with a project name specified.Evan Lojewski2019-02-1411-18/+24
* Clean up the HAL code slightly.Evan Lojewski2019-02-141-12/+18
* Clean up a few mem leaks - simulation support doesn't need to be on the heap.Evan Lojewski2019-02-145-981/+746
* Update ipxact headers to include sim prototypes.Evan Lojewski2019-02-091-5/+1
* Do a manual clang-format runEvan Lojewski2019-02-0911-1330/+1798
* Import initial bcm flash tool.Evan Lojewski2019-02-091-32/+11
* Update NVM API to use words instead of bytes.Evan Lojewski2019-02-091-0/+0
* Remove usage of ExternalProjectsEvan Lojewski2019-02-091-1/+1
* Begin enabling building for mips targets.Evan Lojewski2018-06-132-0/+12
* Update cxx register wraper to only copy base register. Ensure write callback ...Evan Lojewski2018-05-1513-580/+24
* Initial source code import.Evan Lojewski2018-05-1317-0/+3311
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