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author | Evan Lojewski <github@meklort.com> | 2019-05-02 21:21:05 -0600 |
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committer | Evan Lojewski <github@meklort.com> | 2019-05-02 21:21:05 -0600 |
commit | 0e0e5e5b28c86da08c23a9ecb30bd08c4323d441 (patch) | |
tree | 96ada964bc1869d06dd7d5725df8da6a4c4594ae /simulator/APE_RX_PORT3_sim.cpp | |
parent | 86106d98887a390f3a0dd54edf167cb5da1c2436 (diff) | |
download | bcm5719-ortega-0e0e5e5b28c86da08c23a9ecb30bd08c4323d441.tar.gz bcm5719-ortega-0e0e5e5b28c86da08c23a9ecb30bd08c4323d441.zip |
Add initial RX port register generation.
Diffstat (limited to 'simulator/APE_RX_PORT3_sim.cpp')
-rw-r--r-- | simulator/APE_RX_PORT3_sim.cpp | 99 |
1 files changed, 99 insertions, 0 deletions
diff --git a/simulator/APE_RX_PORT3_sim.cpp b/simulator/APE_RX_PORT3_sim.cpp new file mode 100644 index 0000000..6ce0c7e --- /dev/null +++ b/simulator/APE_RX_PORT3_sim.cpp @@ -0,0 +1,99 @@ +//////////////////////////////////////////////////////////////////////////////// +/// +/// @file APE_RX_PORT3_sim.cpp +/// +/// @project ape +/// +/// @brief APE_RX_PORT3_sim +/// +//////////////////////////////////////////////////////////////////////////////// +/// +//////////////////////////////////////////////////////////////////////////////// +/// +/// @copyright Copyright (c) 2018, Evan Lojewski +/// @cond +/// +/// All rights reserved. +/// +/// Redistribution and use in source and binary forms, with or without +/// modification, are permitted provided that the following conditions are met: +/// 1. Redistributions of source code must retain the above copyright notice, +/// this list of conditions and the following disclaimer. +/// 2. Redistributions in binary form must reproduce the above copyright notice, +/// this list of conditions and the following disclaimer in the documentation +/// and/or other materials provided with the distribution. +/// 3. Neither the name of the <organization> nor the +/// names of its contributors may be used to endorse or promote products +/// derived from this software without specific prior written permission. +/// +//////////////////////////////////////////////////////////////////////////////// +/// +/// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +/// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +/// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +/// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +/// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +/// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +/// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +/// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +/// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +/// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +/// POSSIBILITY OF SUCH DAMAGE. +/// @endcond +//////////////////////////////////////////////////////////////////////////////// + +#include <stdint.h> +#include <utility> +#include <bcm5719_SHM.h> +#include <APE_RX_PORT3.h> + +static uint32_t loader_read_mem(uint32_t val, uint32_t offset, void *args) +{ + uint32_t addr = (uint32_t)((uint64_t)args); + addr += offset; + + SHM.LoaderArg0.r32 = addr; + SHM.LoaderCommand.bits.Command = SHM_LOADER_COMMAND_COMMAND_READ_MEM; + + // Wait for command to be handled. + while(0 != SHM.LoaderCommand.bits.Command); + + return (uint32_t)SHM.LoaderArg0.r32; +} + +static uint32_t loader_write_mem(uint32_t val, uint32_t offset, void *args) +{ + uint32_t addr = (uint32_t)((uint64_t)args); + addr += offset; + + SHM.LoaderArg0.r32 = addr; + SHM.LoaderArg1.r32 = val; + SHM.LoaderCommand.bits.Command = SHM_LOADER_COMMAND_COMMAND_WRITE_MEM; + + // Wait for command to be handled. + while(0 != SHM.LoaderCommand.bits.Command); + + return val; +} + +void init_APE_RX_PORT3_sim(void *arg0) +{ + (void)arg0; // unused + void* base = (void*)0xa000c000; + + RX_PORT3.mIndexReadCallback = loader_read_mem; + RX_PORT3.mIndexReadCallbackArgs = base; + + RX_PORT3.mIndexWriteCallback = loader_write_mem; + RX_PORT3.mIndexWriteCallbackArgs = base; + + /** @brief Component Registers for @ref RX_PORT3. */ + /** @brief Bitmap for @ref RX_PORT3_t.Queue. */ + for(int i = 0; i < 4096; i++) + { + RX_PORT3.Queue[i].r32.installReadCallback(loader_read_mem, (uint8_t *)base); + RX_PORT3.Queue[i].r32.installWriteCallback(loader_write_mem, (uint8_t *)base); + } + + +} |