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authorEvan Lojewski <github@meklort.com>2020-10-17 08:23:14 -0600
committerGitHub <noreply@github.com>2020-10-17 08:23:14 -0600
commit35ddcb4bac8ec813de28ef92b652a717a06dde7c (patch)
tree7da2b4affa479ed1ce4932956145ec649256d6b7 /libs
parent014bd41470af7f6ed0d6a1701891d4b5ac9b7f96 (diff)
downloadbcm5719-ortega-35ddcb4bac8ec813de28ef92b652a717a06dde7c.tar.gz
bcm5719-ortega-35ddcb4bac8ec813de28ef92b652a717a06dde7c.zip
nvm: Cleanup various linting warnings. (#145)
Diffstat (limited to 'libs')
-rw-r--r--libs/NVRam/EM100.c32
-rw-r--r--libs/NVRam/bitbang.c20
-rw-r--r--libs/NVRam/include/NVRam.h10
-rw-r--r--libs/NVRam/nvm.c37
4 files changed, 39 insertions, 60 deletions
diff --git a/libs/NVRam/EM100.c b/libs/NVRam/EM100.c
index 3aa3c93..07b35fc 100644
--- a/libs/NVRam/EM100.c
+++ b/libs/NVRam/EM100.c
@@ -41,55 +41,56 @@
/// POSSIBILITY OF SUCH DAMAGE.
/// @endcond
////////////////////////////////////////////////////////////////////////////////
-#include "bcm5719_NVM.h"
+
+#include "EM100.h"
#include <NVRam.h>
// #define ENABLE_CONSOLE
#undef ENABLE_CONSOLE
-#if ENABLE_CONSOLE
+#ifdef ENABLE_CONSOLE
void NVRam_EM100_enableConsole(void);
void NVRam_EM100_disableConsole(void);
#endif /* ENABLE_CONSOLE */
#define EM100_CONSOLE_WRITE_COMMAND (0x11)
-#define EM100_CMD_GET_UFIFO_LEN (0xB1)
-#define EM100_CMD_GET_DFIFO_LEN (0xB2)
+// #define EM100_CMD_GET_UFIFO_LEN (0xB1)
+// #define EM100_CMD_GET_DFIFO_LEN (0xB2)
#define EM100_CMD_WRITE_UFIFO (0xC0)
-#define EM100_CMD_READ_DFIFO (0xD0)
-#define EM100_CMD_EXIT_CONSOLE (0xE0)
+// #define EM100_CMD_READ_DFIFO (0xD0)
+// #define EM100_CMD_EXIT_CONSOLE (0xE0)
#define EM100_MSG_STRING (0x05)
#define EM100_MSG_SIG (0x47364440)
-uint8_t gEM100Packet[64] = {
+uint8_t gEM100Packet[65] = {
EM100_CONSOLE_WRITE_COMMAND, /* 0: SPI COmmand */
0x00, /* 1: Reserved */
- EM100_CMD_WRITE_UFIFO, /* 2: EM100 COmmand */
+ EM100_CMD_WRITE_UFIFO, /* 2: EM100 Command */
0xFF & (EM100_MSG_SIG), /* 3: EM100_MSG_SIG */
0xFF & (EM100_MSG_SIG >> 8), /* 4: EM100_MSG_SIG */
0xFF & (EM100_MSG_SIG >> 16), /* 5: EM100_MSG_SIG */
0xFF & (EM100_MSG_SIG >> 24), /* 6: EM100_MSG_SIG */
EM100_MSG_STRING, /* 7: Message Type */
0, /* 8: Message Length */
-};
+}; //lint !e785
#define EM100_PACKET_MSG_LEN (8u)
#define EM100_PACKET_BUFFER_OFFSET (9u)
#define EM100_MAX_BUFFER_LEN (sizeof(gEM100Packet) - EM100_PACKET_BUFFER_OFFSET)
void NVRam_EM100_putchar(char c)
{
- int used_buffer = gEM100Packet[EM100_PACKET_MSG_LEN] + 1;
+ uint8_t used_buffer = gEM100Packet[EM100_PACKET_MSG_LEN] + 1;
- gEM100Packet[used_buffer + EM100_PACKET_BUFFER_OFFSET - 1] = c;
+ gEM100Packet[used_buffer + EM100_PACKET_BUFFER_OFFSET - 1] = (uint8_t)c;
gEM100Packet[EM100_PACKET_MSG_LEN] = used_buffer;
// Flush if the buffer is full or if we reached the end of a line
if (('\n' == c) || (used_buffer >= EM100_MAX_BUFFER_LEN))
{
-#if ENABLE_CONSOLE
+#ifdef ENABLE_CONSOLE
NVRam_EM100_enableConsole();
#endif
if (NVRam_sendBytes(gEM100Packet, EM100_PACKET_BUFFER_OFFSET + used_buffer))
@@ -103,16 +104,15 @@ void NVRam_EM100_putchar(char c)
{
// Don't output any more chars
gEM100Packet[EM100_PACKET_MSG_LEN] = used_buffer - 1;
- ;
}
}
-#if ENABLE_CONSOLE
+#ifdef ENABLE_CONSOLE
NVRam_EM100_disableConsole();
#endif
}
}
-#if ENABLE_CONSOLE
+#ifdef ENABLE_CONSOLE
void NVRam_EM100_enableConsole(void)
{
uint8_t packet_AA[] = { EM100_CONSOLE_WRITE_COMMAND, 0x00, 0xAA, 0xAA, 0x00 };
@@ -133,4 +133,4 @@ void NVRam_EM100_disableConsole(void)
};
NVRam_sendBytes(packet_exit_console, sizeof(packet_exit_console));
}
-#endif /* ENABLE_CONSOLE */ \ No newline at end of file
+#endif /* ENABLE_CONSOLE */
diff --git a/libs/NVRam/bitbang.c b/libs/NVRam/bitbang.c
index 3fc96b7..b8fb650 100644
--- a/libs/NVRam/bitbang.c
+++ b/libs/NVRam/bitbang.c
@@ -54,7 +54,7 @@ void NVRAM_sendByte(uint8_t byte)
{
// Setup the SI value
nvm_write.bits.SCLKOutputValue = 0;
- nvm_write.bits.SIOutputValue = (byte & (1 << i)) ? 1 : 0;
+ nvm_write.bits.SIOutputValue = (byte & (1u << i)) ? 1 : 0;
NVM.Write.r32 = nvm_write.r32;
// Clock data out.
@@ -78,7 +78,7 @@ uint8_t NVRAM_sendAndGetByte(uint8_t byte)
{
// Setup the SI value
nvm_write.bits.SCLKOutputValue = 0;
- nvm_write.bits.SIOutputValue = (byte & (1 << i)) ? 1 : 0;
+ nvm_write.bits.SIOutputValue = (byte & (1u << i)) ? 1 : 0;
NVM.Write.r32 = nvm_write.r32;
// Clock data out.
@@ -86,7 +86,7 @@ uint8_t NVRAM_sendAndGetByte(uint8_t byte)
NVM.Write.r32 = nvm_write.r32;
// Read Input value.
- readByte |= NVM.Read.bits.SOInputValue ? (1 << i) : 0;
+ readByte |= (uint8_t)(NVM.Read.bits.SOInputValue ? (1u << i) : 0);
}
// Final clock edge
@@ -97,7 +97,7 @@ uint8_t NVRAM_sendAndGetByte(uint8_t byte)
return readByte;
}
-bool NVRam_sendBytes(uint8_t bytes[], uint32_t num_bytes)
+bool NVRam_sendBytes(const uint8_t bytes[], uint32_t num_bytes)
{
// Aquire the lock
if (!NVRam_acquireLock())
@@ -129,7 +129,7 @@ bool NVRam_sendBytes(uint8_t bytes[], uint32_t num_bytes)
// Enable Bitbang mode
NVM.NvmCfg1.r32 = cfg1_bitbang.r32;
- for (int i = 0; i < num_bytes; i++)
+ for (uint32_t i = 0; i < num_bytes; i++)
{
NVRAM_sendByte(bytes[i]);
}
@@ -143,7 +143,7 @@ bool NVRam_sendBytes(uint8_t bytes[], uint32_t num_bytes)
return true;
}
-bool NVRam_sendAndGetBytes(uint8_t send_bytes[], uint8_t get_bytes[], int32_t num_bytes)
+bool NVRam_sendAndGetBytes(const uint8_t send_bytes[], uint8_t get_bytes[], uint32_t num_bytes)
{
// Aquire the lock
if (!NVRam_acquireLock())
@@ -175,7 +175,7 @@ bool NVRam_sendAndGetBytes(uint8_t send_bytes[], uint8_t get_bytes[], int32_t nu
// Enable Bitbang mode
NVM.NvmCfg1.r32 = cfg1_bitbang.r32;
- for (int i = 0; i < num_bytes; i++)
+ for (uint32_t i = 0; i < num_bytes; i++)
{
get_bytes[i] = NVRAM_sendAndGetByte(send_bytes[i]);
}
@@ -200,7 +200,7 @@ uint32_t NVRam_bitbang_readWord(uint32_t address)
uint32_t num_bytes = sizeof(send_bytes);
if (NVRam_sendAndGetBytes(send_bytes, get_bytes, num_bytes))
{
- uint32_t read_word = (get_bytes[4]) | (get_bytes[5] << 8) | (get_bytes[6] << 16) | (get_bytes[7] << 24);
+ uint32_t read_word = ((uint32_t)get_bytes[4]) | ((uint32_t)get_bytes[5] << 8) | ((uint32_t)get_bytes[6] << 16) | ((uint32_t)get_bytes[7] << 24);
return read_word;
}
@@ -211,7 +211,7 @@ uint32_t NVRam_bitbang_readWord(uint32_t address)
}
}
-void NVRam_bitbang_writeWord(uint32_t address, uint32_t word)
+bool NVRam_bitbang_writeWord(uint32_t address, uint32_t word)
{
// 0x82: write word for AT45DB021D
uint8_t send_bytes[] = { 0x82,
@@ -223,5 +223,5 @@ void NVRam_bitbang_writeWord(uint32_t address, uint32_t word)
(uint8_t)(word >> 8),
(uint8_t)(word) };
uint32_t num_bytes = sizeof(send_bytes);
- NVRam_sendBytes(send_bytes, num_bytes);
+ return NVRam_sendBytes(send_bytes, num_bytes);
}
diff --git a/libs/NVRam/include/NVRam.h b/libs/NVRam/include/NVRam.h
index 5ec5b5f..7aadbf0 100644
--- a/libs/NVRam/include/NVRam.h
+++ b/libs/NVRam/include/NVRam.h
@@ -47,8 +47,8 @@
#include <types.h>
bool NVRam_acquireLock(void);
-bool NVRam_releaseLock(void);
-bool NVRam_releaseAllLocks(void);
+void NVRam_releaseLock(void);
+void NVRam_releaseAllLocks(void);
uint32_t NVRam_readWord(uint32_t address);
void NVRam_read(uint32_t address, uint32_t *buffer, uint32_t words);
@@ -71,10 +71,10 @@ uint32_t NVRam_crc(const uint8_t *pcDatabuf, // Pointer to data buffer
void NVRAM_sendByte(uint8_t byte);
uint8_t NVRAM_sendAndGetByte(uint8_t byte);
-bool NVRam_sendBytes(uint8_t bytes[], uint32_t num_bytes);
-bool NVRam_sendAndGetBytes(uint8_t send_bytes[], uint8_t get_bytes[], int32_t num_bytes);
+bool NVRam_sendBytes(const uint8_t bytes[], uint32_t num_bytes);
+bool NVRam_sendAndGetBytes(const uint8_t send_bytes[], uint8_t get_bytes[], uint32_t num_bytes);
uint32_t NVRam_bitbang_readWord(uint32_t address);
-void NVRam_bitbang_writeWord(uint32_t address, uint32_t word);
+bool NVRam_bitbang_writeWord(uint32_t address, uint32_t word);
#endif /* NVRAM_H */
diff --git a/libs/NVRam/nvm.c b/libs/NVRam/nvm.c
index b897644..c6efde6 100644
--- a/libs/NVRam/nvm.c
+++ b/libs/NVRam/nvm.c
@@ -47,13 +47,7 @@
#define BCM_NVRAM_MAGIC (0x669955AAu)
-#define ATMEL_AT45DB0X1B_PAGE_POS (9u)
-#define ATMEL_AT45DB0X1B_PAGE_SIZE (264u)
-#define ATMEL_AT45DB0X1B_ERASE (false)
-
-#define PAGE_POS ATMEL_AT45DB0X1B_PAGE_POS
-#define PAGE_SIZE ATMEL_AT45DB0X1B_PAGE_SIZE
-#define NEEDS_ERASE ATMEL_AT45DB0X1B_ERASE
+#define PAGE_SIZE (256u)
#ifdef CXX_SIMULATOR
#include <arpa/inet.h>
@@ -61,7 +55,7 @@
#define REQ ReqSet1
#define CLR ReqClr1
#define WON ArbWon1
-#elif __arm__
+#elif defined(__arm__)
/* APE Firmware */
#define ntohl(__x__) (__x__) /* Todo: swap */
#define htonl(__x__) (__x__) /* Todo: swap */
@@ -84,19 +78,7 @@
*/
static inline uint32_t NVRam_translate(uint32_t address)
{
-#if 0
- // Equation from NetXtremeII PG203
- if(NVM_NVM_CFG_1_PAGE_SIZE_264_BYTES == NVM.NvmCfg1.bits.PageSize)
- {
- return ((address / PAGE_SIZE) << PAGE_POS) + (address % PAGE_SIZE);
- }
- else
- {
- return address;
- }
-#else
return address;
-#endif
}
void NVRam_enable(void)
@@ -142,18 +124,16 @@ bool NVRam_acquireLock(void)
return true;
}
-bool NVRam_releaseLock(void)
+void NVRam_releaseLock(void)
{
// Release locks
RegNVMSoftwareArbitration_t req;
req.r32 = 0;
req.bits.CLR = 1;
NVM.SoftwareArbitration = req;
-
- return true;
}
-bool NVRam_releaseAllLocks(void)
+void NVRam_releaseAllLocks(void)
{
RegNVMSoftwareArbitration_t req;
req.r32 = 0;
@@ -162,8 +142,6 @@ bool NVRam_releaseAllLocks(void)
req.bits.ReqClr2 = 1;
req.bits.ReqClr3 = 1;
NVM.SoftwareArbitration = req;
-
- return true;
}
#ifdef CXX_SIMULATOR
@@ -271,12 +249,12 @@ void NVRam_writeWord(uint32_t address, uint32_t data)
void NVRam_write(uint32_t address, uint32_t *buffer, uint32_t words)
{
- uint32_t page_size = 256;
+ uint32_t page_size = PAGE_SIZE;
bool find_first_difference = true;
uint32_t last_difference = address + words * 4;
- uint32_t trim_address;
uint32_t trim_words = words;
- uint32_t *trim_buffer;
+ uint32_t trim_address = address;
+ uint32_t *trim_buffer = buffer;
if (!words)
{
@@ -294,6 +272,7 @@ void NVRam_write(uint32_t address, uint32_t *buffer, uint32_t words)
while (words && trim_words)
{
uint32_t read_word;
+
if (1 == words || 1 == trim_words)
{
// Last word.
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