diff options
author | Evan Lojewski <github@meklort.com> | 2020-07-14 20:07:52 -0600 |
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committer | GitHub <noreply@github.com> | 2020-07-14 20:07:52 -0600 |
commit | 437967699cf69896e6bb9c50979dbc17a4850ced (patch) | |
tree | 5ba05f80c7d304a4a7c7ea4cdd9674d06ad2b36e | |
parent | 74c4f25d634429c02cb7654bbd1a7ce742a3433e (diff) | |
download | bcm5719-ortega-437967699cf69896e6bb9c50979dbc17a4850ced.tar.gz bcm5719-ortega-437967699cf69896e6bb9c50979dbc17a4850ced.zip |
regs: Add APE Clock Policy definitions. (#91)
-rw-r--r-- | include/APE_DEVICE.h | 181 | ||||
-rw-r--r-- | include/APE_DEVICE1.h | 1 | ||||
-rw-r--r-- | include/APE_DEVICE2.h | 1 | ||||
-rw-r--r-- | include/APE_DEVICE3.h | 1 | ||||
-rw-r--r-- | include/bcm5719_DEVICE.h | 181 | ||||
-rw-r--r-- | ipxact/DEVICE.xml | 150 | ||||
-rw-r--r-- | simulator/APE_DEVICE.cpp | 2 | ||||
-rw-r--r-- | simulator/APE_DEVICE0.cpp | 331 | ||||
-rw-r--r-- | simulator/APE_DEVICE1.cpp | 2 | ||||
-rw-r--r-- | simulator/APE_DEVICE1_sim.cpp | 4 | ||||
-rw-r--r-- | simulator/APE_DEVICE2.cpp | 2 | ||||
-rw-r--r-- | simulator/APE_DEVICE2_sim.cpp | 4 | ||||
-rw-r--r-- | simulator/APE_DEVICE3.cpp | 2 | ||||
-rw-r--r-- | simulator/APE_DEVICE3_sim.cpp | 4 | ||||
-rw-r--r-- | simulator/APE_DEVICE_sim.cpp | 4 | ||||
-rw-r--r-- | simulator/bcm5719_DEVICE.cpp | 2 | ||||
-rw-r--r-- | simulator/bcm5719_DEVICE_sim.cpp | 6 |
17 files changed, 871 insertions, 7 deletions
diff --git a/include/APE_DEVICE.h b/include/APE_DEVICE.h index e5892bb..7e4f5e1 100644 --- a/include/APE_DEVICE.h +++ b/include/APE_DEVICE.h @@ -3586,6 +3586,176 @@ typedef register_container RegDEVICELinkAwarePowerModeClockPolicy_t { #endif /* CXX_SIMULATOR */ } RegDEVICELinkAwarePowerModeClockPolicy_t; +#define REG_DEVICE_APE_CLK_POLICY ((volatile APE_DEVICE_H_uint32_t*)0xa004361c) /* */ +#define DEVICE_APE_CLK_POLICY_LAPM_APE_CLOCK_SWITCH_SHIFT 0u +#define DEVICE_APE_CLK_POLICY_LAPM_APE_CLOCK_SWITCH_MASK 0x1fu +#define GET_DEVICE_APE_CLK_POLICY_LAPM_APE_CLOCK_SWITCH(__reg__) (((__reg__) & 0x1f) >> 0u) +#define SET_DEVICE_APE_CLK_POLICY_LAPM_APE_CLOCK_SWITCH(__val__) (((__val__) << 0u) & 0x1fu) +#define DEVICE_APE_CLK_POLICY_LAPM_APE_CLOCK_SWITCH_25_MHZ 0x11u +#define DEVICE_APE_CLK_POLICY_LAPM_APE_CLOCK_SWITCH_12_5_MHZ 0x13u +#define DEVICE_APE_CLK_POLICY_LAPM_APE_CLOCK_SWITCH_6_25_MHZ 0x15u +#define DEVICE_APE_CLK_POLICY_LAPM_APE_CLOCK_SWITCH_3_125_MHZ 0x17u +#define DEVICE_APE_CLK_POLICY_LAPM_APE_CLOCK_SWITCH_1_563_MHZ 0x19u + +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH_SHIFT 8u +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH_MASK 0x1f00u +#define GET_DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH(__reg__) (((__reg__) & 0x1f00) >> 8u) +#define SET_DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH(__val__) (((__val__) << 8u) & 0x1f00u) +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH_62_5_MHZ 0x0u +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH_25_MHZ 0x9u +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH_12_5_MHZ 0x13u +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH_6_25_MHZ 0x15u +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH_3_125_MHZ 0x17u +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH_1_563_MHZ 0x19u +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH_125_MHZ 0x1eu + +#define DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH_SHIFT 16u +#define DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH_MASK 0x1f0000u +#define GET_DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH(__reg__) (((__reg__) & 0x1f0000) >> 16u) +#define SET_DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH(__val__) (((__val__) << 16u) & 0x1f0000u) +#define DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH_62_5_MHZ 0x0u +#define DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH_25_MHZ 0x9u +#define DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH_12_5_MHZ 0x13u +#define DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH_6_25_MHZ 0x15u +#define DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH_3_125_MHZ 0x17u +#define DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH_1_563_MHZ 0x19u +#define DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH_125_MHZ 0x1eu + +#define DEVICE_APE_CLK_POLICY_FORCE_APE_HCLK_DISABLE_SHIFT 27u +#define DEVICE_APE_CLK_POLICY_FORCE_APE_HCLK_DISABLE_MASK 0x8000000u +#define GET_DEVICE_APE_CLK_POLICY_FORCE_APE_HCLK_DISABLE(__reg__) (((__reg__) & 0x8000000) >> 27u) +#define SET_DEVICE_APE_CLK_POLICY_FORCE_APE_HCLK_DISABLE(__val__) (((__val__) << 27u) & 0x8000000u) +#define DEVICE_APE_CLK_POLICY_FORCE_APE_FCLK_DISABLE_SHIFT 28u +#define DEVICE_APE_CLK_POLICY_FORCE_APE_FCLK_DISABLE_MASK 0x10000000u +#define GET_DEVICE_APE_CLK_POLICY_FORCE_APE_FCLK_DISABLE(__reg__) (((__reg__) & 0x10000000) >> 28u) +#define SET_DEVICE_APE_CLK_POLICY_FORCE_APE_FCLK_DISABLE(__val__) (((__val__) << 28u) & 0x10000000u) +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SPEED_OVERRIDE_ENABLE_SHIFT 29u +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SPEED_OVERRIDE_ENABLE_MASK 0x20000000u +#define GET_DEVICE_APE_CLK_POLICY_APE_CLOCK_SPEED_OVERRIDE_ENABLE(__reg__) (((__reg__) & 0x20000000) >> 29u) +#define SET_DEVICE_APE_CLK_POLICY_APE_CLOCK_SPEED_OVERRIDE_ENABLE(__val__) (((__val__) << 29u) & 0x20000000u) +#define DEVICE_APE_CLK_POLICY_APE_DEEP_SLEEP_MODE_ENABLE_SHIFT 30u +#define DEVICE_APE_CLK_POLICY_APE_DEEP_SLEEP_MODE_ENABLE_MASK 0x40000000u +#define GET_DEVICE_APE_CLK_POLICY_APE_DEEP_SLEEP_MODE_ENABLE(__reg__) (((__reg__) & 0x40000000) >> 30u) +#define SET_DEVICE_APE_CLK_POLICY_APE_DEEP_SLEEP_MODE_ENABLE(__val__) (((__val__) << 30u) & 0x40000000u) +#define DEVICE_APE_CLK_POLICY_APE_SLEEP_MODE_ENABLE_SHIFT 31u +#define DEVICE_APE_CLK_POLICY_APE_SLEEP_MODE_ENABLE_MASK 0x80000000u +#define GET_DEVICE_APE_CLK_POLICY_APE_SLEEP_MODE_ENABLE(__reg__) (((__reg__) & 0x80000000) >> 31u) +#define SET_DEVICE_APE_CLK_POLICY_APE_SLEEP_MODE_ENABLE(__val__) (((__val__) << 31u) & 0x80000000u) + +/** @brief Register definition for @ref DEVICE_t.ApeClkPolicy. */ +typedef register_container RegDEVICEApeClkPolicy_t { + /** @brief 32bit direct register access. */ + APE_DEVICE_H_uint32_t r32; + + BITFIELD_BEGIN(APE_DEVICE_H_uint32_t, bits) +#if defined(__LITTLE_ENDIAN__) + /** @brief Software Controlled APE Clock Speed Select inLink Aware Power mode */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, LAPMAPEClockSwitch, 0, 5) + /** @brief Padding */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, reserved_7_5, 5, 3) + /** @brief Software Controlled APE Clock Speed Select */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, APEClockSwitch, 8, 5) + /** @brief Padding */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, reserved_15_13, 13, 3) + /** @brief Software Controlled APE Clock Speed Select for Clock Override. */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, ClockOverrideAPEClockSwitch, 16, 5) + /** @brief Padding */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, reserved_26_21, 21, 6) + /** @brief */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, ForceAPEHCLKDisable, 27, 1) + /** @brief */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, ForceAPEFCLKDisable, 28, 1) + /** @brief */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, APEClockSpeedOverrideEnable, 29, 1) + /** @brief */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, APEDeepSleepmodeEnable, 30, 1) + /** @brief */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, APESleepmodeEnable, 31, 1) +#elif defined(__BIG_ENDIAN__) + /** @brief */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, APESleepmodeEnable, 31, 1) + /** @brief */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, APEDeepSleepmodeEnable, 30, 1) + /** @brief */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, APEClockSpeedOverrideEnable, 29, 1) + /** @brief */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, ForceAPEFCLKDisable, 28, 1) + /** @brief */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, ForceAPEHCLKDisable, 27, 1) + /** @brief Padding */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, reserved_26_21, 21, 6) + /** @brief Software Controlled APE Clock Speed Select for Clock Override. */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, ClockOverrideAPEClockSwitch, 16, 5) + /** @brief Padding */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, reserved_15_13, 13, 3) + /** @brief Software Controlled APE Clock Speed Select */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, APEClockSwitch, 8, 5) + /** @brief Padding */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, reserved_7_5, 5, 3) + /** @brief Software Controlled APE Clock Speed Select inLink Aware Power mode */ + BITFIELD_MEMBER(APE_DEVICE_H_uint32_t, LAPMAPEClockSwitch, 0, 5) +#else +#error Unknown Endian +#endif + BITFIELD_END(APE_DEVICE_H_uint32_t, bits) +#ifdef CXX_SIMULATOR + /** @brief Register name for use with the simulator. */ + const char* getName(void) { return "ApeClkPolicy"; } + + /** @brief Print register value. */ + void print(void) { r32.print(); } + + RegDEVICEApeClkPolicy_t() + { + /** @brief constructor for @ref DEVICE_t.ApeClkPolicy. */ + r32.setName("ApeClkPolicy"); + bits.LAPMAPEClockSwitch.setBaseRegister(&r32); + bits.LAPMAPEClockSwitch.setName("LAPMAPEClockSwitch"); + bits.LAPMAPEClockSwitch.addEnum("25 MHz", 0x11); + bits.LAPMAPEClockSwitch.addEnum("12.5 MHz", 0x13); + bits.LAPMAPEClockSwitch.addEnum("6.25 MHz", 0x15); + bits.LAPMAPEClockSwitch.addEnum("3.125 MHz", 0x17); + bits.LAPMAPEClockSwitch.addEnum("1.563 MHz", 0x19); + + bits.APEClockSwitch.setBaseRegister(&r32); + bits.APEClockSwitch.setName("APEClockSwitch"); + bits.APEClockSwitch.addEnum("62.5 MHz", 0x0); + bits.APEClockSwitch.addEnum("25 MHz", 0x9); + bits.APEClockSwitch.addEnum("12.5 MHz", 0x13); + bits.APEClockSwitch.addEnum("6.25 MHz", 0x15); + bits.APEClockSwitch.addEnum("3.125 MHz", 0x17); + bits.APEClockSwitch.addEnum("1.563 MHz", 0x19); + bits.APEClockSwitch.addEnum("125 MHz", 0x1e); + + bits.ClockOverrideAPEClockSwitch.setBaseRegister(&r32); + bits.ClockOverrideAPEClockSwitch.setName("ClockOverrideAPEClockSwitch"); + bits.ClockOverrideAPEClockSwitch.addEnum("62.5 MHz", 0x0); + bits.ClockOverrideAPEClockSwitch.addEnum("25 MHz", 0x9); + bits.ClockOverrideAPEClockSwitch.addEnum("12.5 MHz", 0x13); + bits.ClockOverrideAPEClockSwitch.addEnum("6.25 MHz", 0x15); + bits.ClockOverrideAPEClockSwitch.addEnum("3.125 MHz", 0x17); + bits.ClockOverrideAPEClockSwitch.addEnum("1.563 MHz", 0x19); + bits.ClockOverrideAPEClockSwitch.addEnum("125 MHz", 0x1e); + + bits.ForceAPEHCLKDisable.setBaseRegister(&r32); + bits.ForceAPEHCLKDisable.setName("ForceAPEHCLKDisable"); + bits.ForceAPEFCLKDisable.setBaseRegister(&r32); + bits.ForceAPEFCLKDisable.setName("ForceAPEFCLKDisable"); + bits.APEClockSpeedOverrideEnable.setBaseRegister(&r32); + bits.APEClockSpeedOverrideEnable.setName("APEClockSpeedOverrideEnable"); + bits.APEDeepSleepmodeEnable.setBaseRegister(&r32); + bits.APEDeepSleepmodeEnable.setName("APEDeepSleepmodeEnable"); + bits.APESleepmodeEnable.setBaseRegister(&r32); + bits.APESleepmodeEnable.setName("APESleepmodeEnable"); + } + RegDEVICEApeClkPolicy_t& operator=(const RegDEVICEApeClkPolicy_t& other) + { + r32 = other.r32; + return *this; + } +#endif /* CXX_SIMULATOR */ +} RegDEVICEApeClkPolicy_t; + #define REG_DEVICE_APE_SLEEP_STATE_CLOCK_POLICY ((volatile APE_DEVICE_H_uint32_t*)0xa0043620) /* */ #define DEVICE_APE_SLEEP_STATE_CLOCK_POLICY_APE_SLEEP_FCLK_SWITCH_SHIFT 0u #define DEVICE_APE_SLEEP_STATE_CLOCK_POLICY_APE_SLEEP_FCLK_SWITCH_MASK 0x1fu @@ -9355,7 +9525,10 @@ typedef struct DEVICE_t { RegDEVICELinkAwarePowerModeClockPolicy_t LinkAwarePowerModeClockPolicy; /** @brief Reserved bytes to pad out data structure. */ - APE_DEVICE_H_uint32_t reserved_13844[3]; + APE_DEVICE_H_uint32_t reserved_13844[2]; + + /** @brief */ + RegDEVICEApeClkPolicy_t ApeClkPolicy; /** @brief */ RegDEVICEApeSleepStateClockPolicy_t ApeSleepStateClockPolicy; @@ -9884,10 +10057,11 @@ typedef struct DEVICE_t { reserved_13832[i].setComponentOffset(0x3608 + (i * 4)); } LinkAwarePowerModeClockPolicy.r32.setComponentOffset(0x3610); - for(int i = 0; i < 3; i++) + for(int i = 0; i < 2; i++) { reserved_13844[i].setComponentOffset(0x3614 + (i * 4)); } + ApeClkPolicy.r32.setComponentOffset(0x361c); ApeSleepStateClockPolicy.r32.setComponentOffset(0x3620); ClockSpeedOverridePolicy.r32.setComponentOffset(0x3624); for(int i = 0; i < 1; i++) @@ -10246,10 +10420,11 @@ typedef struct DEVICE_t { reserved_13832[i].print(); } LinkAwarePowerModeClockPolicy.print(); - for(int i = 0; i < 3; i++) + for(int i = 0; i < 2; i++) { reserved_13844[i].print(); } + ApeClkPolicy.print(); ApeSleepStateClockPolicy.print(); ClockSpeedOverridePolicy.print(); for(int i = 0; i < 1; i++) diff --git a/include/APE_DEVICE1.h b/include/APE_DEVICE1.h index 166d4da..177364f 100644 --- a/include/APE_DEVICE1.h +++ b/include/APE_DEVICE1.h @@ -130,6 +130,7 @@ typedef uint32_t APE_DEVICE1_H_uint32_t; #define REG_DEVICE1_CPMU_CONTROL ((volatile APE_DEVICE1_H_uint32_t*)0xa0053600) /* */ #define REG_DEVICE1_NO_LINK_POWER_MODE_CLOCK_POLICY ((volatile APE_DEVICE1_H_uint32_t*)0xa0053604) /* */ #define REG_DEVICE1_LINK_AWARE_POWER_MODE_CLOCK_POLICY ((volatile APE_DEVICE1_H_uint32_t*)0xa0053610) /* */ +#define REG_DEVICE1_APE_CLK_POLICY ((volatile APE_DEVICE1_H_uint32_t*)0xa005361c) /* */ #define REG_DEVICE1_APE_SLEEP_STATE_CLOCK_POLICY ((volatile APE_DEVICE1_H_uint32_t*)0xa0053620) /* */ #define REG_DEVICE1_CLOCK_SPEED_OVERRIDE_POLICY ((volatile APE_DEVICE1_H_uint32_t*)0xa0053624) /* */ #define REG_DEVICE1_STATUS ((volatile APE_DEVICE1_H_uint32_t*)0xa005362c) /* */ diff --git a/include/APE_DEVICE2.h b/include/APE_DEVICE2.h index 83d32c0..8de1bf8 100644 --- a/include/APE_DEVICE2.h +++ b/include/APE_DEVICE2.h @@ -130,6 +130,7 @@ typedef uint32_t APE_DEVICE2_H_uint32_t; #define REG_DEVICE2_CPMU_CONTROL ((volatile APE_DEVICE2_H_uint32_t*)0xa0063600) /* */ #define REG_DEVICE2_NO_LINK_POWER_MODE_CLOCK_POLICY ((volatile APE_DEVICE2_H_uint32_t*)0xa0063604) /* */ #define REG_DEVICE2_LINK_AWARE_POWER_MODE_CLOCK_POLICY ((volatile APE_DEVICE2_H_uint32_t*)0xa0063610) /* */ +#define REG_DEVICE2_APE_CLK_POLICY ((volatile APE_DEVICE2_H_uint32_t*)0xa006361c) /* */ #define REG_DEVICE2_APE_SLEEP_STATE_CLOCK_POLICY ((volatile APE_DEVICE2_H_uint32_t*)0xa0063620) /* */ #define REG_DEVICE2_CLOCK_SPEED_OVERRIDE_POLICY ((volatile APE_DEVICE2_H_uint32_t*)0xa0063624) /* */ #define REG_DEVICE2_STATUS ((volatile APE_DEVICE2_H_uint32_t*)0xa006362c) /* */ diff --git a/include/APE_DEVICE3.h b/include/APE_DEVICE3.h index 96d560d..75b712f 100644 --- a/include/APE_DEVICE3.h +++ b/include/APE_DEVICE3.h @@ -130,6 +130,7 @@ typedef uint32_t APE_DEVICE3_H_uint32_t; #define REG_DEVICE3_CPMU_CONTROL ((volatile APE_DEVICE3_H_uint32_t*)0xa0073600) /* */ #define REG_DEVICE3_NO_LINK_POWER_MODE_CLOCK_POLICY ((volatile APE_DEVICE3_H_uint32_t*)0xa0073604) /* */ #define REG_DEVICE3_LINK_AWARE_POWER_MODE_CLOCK_POLICY ((volatile APE_DEVICE3_H_uint32_t*)0xa0073610) /* */ +#define REG_DEVICE3_APE_CLK_POLICY ((volatile APE_DEVICE3_H_uint32_t*)0xa007361c) /* */ #define REG_DEVICE3_APE_SLEEP_STATE_CLOCK_POLICY ((volatile APE_DEVICE3_H_uint32_t*)0xa0073620) /* */ #define REG_DEVICE3_CLOCK_SPEED_OVERRIDE_POLICY ((volatile APE_DEVICE3_H_uint32_t*)0xa0073624) /* */ #define REG_DEVICE3_STATUS ((volatile APE_DEVICE3_H_uint32_t*)0xa007362c) /* */ diff --git a/include/bcm5719_DEVICE.h b/include/bcm5719_DEVICE.h index e0b3d26..75b3241 100644 --- a/include/bcm5719_DEVICE.h +++ b/include/bcm5719_DEVICE.h @@ -3586,6 +3586,176 @@ typedef register_container RegDEVICELinkAwarePowerModeClockPolicy_t { #endif /* CXX_SIMULATOR */ } RegDEVICELinkAwarePowerModeClockPolicy_t; +#define REG_DEVICE_APE_CLK_POLICY ((volatile BCM5719_DEVICE_H_uint32_t*)0xc000361c) /* */ +#define DEVICE_APE_CLK_POLICY_LAPM_APE_CLOCK_SWITCH_SHIFT 0u +#define DEVICE_APE_CLK_POLICY_LAPM_APE_CLOCK_SWITCH_MASK 0x1fu +#define GET_DEVICE_APE_CLK_POLICY_LAPM_APE_CLOCK_SWITCH(__reg__) (((__reg__) & 0x1f) >> 0u) +#define SET_DEVICE_APE_CLK_POLICY_LAPM_APE_CLOCK_SWITCH(__val__) (((__val__) << 0u) & 0x1fu) +#define DEVICE_APE_CLK_POLICY_LAPM_APE_CLOCK_SWITCH_25_MHZ 0x11u +#define DEVICE_APE_CLK_POLICY_LAPM_APE_CLOCK_SWITCH_12_5_MHZ 0x13u +#define DEVICE_APE_CLK_POLICY_LAPM_APE_CLOCK_SWITCH_6_25_MHZ 0x15u +#define DEVICE_APE_CLK_POLICY_LAPM_APE_CLOCK_SWITCH_3_125_MHZ 0x17u +#define DEVICE_APE_CLK_POLICY_LAPM_APE_CLOCK_SWITCH_1_563_MHZ 0x19u + +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH_SHIFT 8u +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH_MASK 0x1f00u +#define GET_DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH(__reg__) (((__reg__) & 0x1f00) >> 8u) +#define SET_DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH(__val__) (((__val__) << 8u) & 0x1f00u) +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH_62_5_MHZ 0x0u +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH_25_MHZ 0x9u +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH_12_5_MHZ 0x13u +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH_6_25_MHZ 0x15u +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH_3_125_MHZ 0x17u +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH_1_563_MHZ 0x19u +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SWITCH_125_MHZ 0x1eu + +#define DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH_SHIFT 16u +#define DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH_MASK 0x1f0000u +#define GET_DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH(__reg__) (((__reg__) & 0x1f0000) >> 16u) +#define SET_DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH(__val__) (((__val__) << 16u) & 0x1f0000u) +#define DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH_62_5_MHZ 0x0u +#define DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH_25_MHZ 0x9u +#define DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH_12_5_MHZ 0x13u +#define DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH_6_25_MHZ 0x15u +#define DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH_3_125_MHZ 0x17u +#define DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH_1_563_MHZ 0x19u +#define DEVICE_APE_CLK_POLICY_CLOCK_OVERRIDE_APE_CLOCK_SWITCH_125_MHZ 0x1eu + +#define DEVICE_APE_CLK_POLICY_FORCE_APE_HCLK_DISABLE_SHIFT 27u +#define DEVICE_APE_CLK_POLICY_FORCE_APE_HCLK_DISABLE_MASK 0x8000000u +#define GET_DEVICE_APE_CLK_POLICY_FORCE_APE_HCLK_DISABLE(__reg__) (((__reg__) & 0x8000000) >> 27u) +#define SET_DEVICE_APE_CLK_POLICY_FORCE_APE_HCLK_DISABLE(__val__) (((__val__) << 27u) & 0x8000000u) +#define DEVICE_APE_CLK_POLICY_FORCE_APE_FCLK_DISABLE_SHIFT 28u +#define DEVICE_APE_CLK_POLICY_FORCE_APE_FCLK_DISABLE_MASK 0x10000000u +#define GET_DEVICE_APE_CLK_POLICY_FORCE_APE_FCLK_DISABLE(__reg__) (((__reg__) & 0x10000000) >> 28u) +#define SET_DEVICE_APE_CLK_POLICY_FORCE_APE_FCLK_DISABLE(__val__) (((__val__) << 28u) & 0x10000000u) +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SPEED_OVERRIDE_ENABLE_SHIFT 29u +#define DEVICE_APE_CLK_POLICY_APE_CLOCK_SPEED_OVERRIDE_ENABLE_MASK 0x20000000u +#define GET_DEVICE_APE_CLK_POLICY_APE_CLOCK_SPEED_OVERRIDE_ENABLE(__reg__) (((__reg__) & 0x20000000) >> 29u) +#define SET_DEVICE_APE_CLK_POLICY_APE_CLOCK_SPEED_OVERRIDE_ENABLE(__val__) (((__val__) << 29u) & 0x20000000u) +#define DEVICE_APE_CLK_POLICY_APE_DEEP_SLEEP_MODE_ENABLE_SHIFT 30u +#define DEVICE_APE_CLK_POLICY_APE_DEEP_SLEEP_MODE_ENABLE_MASK 0x40000000u +#define GET_DEVICE_APE_CLK_POLICY_APE_DEEP_SLEEP_MODE_ENABLE(__reg__) (((__reg__) & 0x40000000) >> 30u) +#define SET_DEVICE_APE_CLK_POLICY_APE_DEEP_SLEEP_MODE_ENABLE(__val__) (((__val__) << 30u) & 0x40000000u) +#define DEVICE_APE_CLK_POLICY_APE_SLEEP_MODE_ENABLE_SHIFT 31u +#define DEVICE_APE_CLK_POLICY_APE_SLEEP_MODE_ENABLE_MASK 0x80000000u +#define GET_DEVICE_APE_CLK_POLICY_APE_SLEEP_MODE_ENABLE(__reg__) (((__reg__) & 0x80000000) >> 31u) +#define SET_DEVICE_APE_CLK_POLICY_APE_SLEEP_MODE_ENABLE(__val__) (((__val__) << 31u) & 0x80000000u) + +/** @brief Register definition for @ref DEVICE_t.ApeClkPolicy. */ +typedef register_container RegDEVICEApeClkPolicy_t { + /** @brief 32bit direct register access. */ + BCM5719_DEVICE_H_uint32_t r32; + + BITFIELD_BEGIN(BCM5719_DEVICE_H_uint32_t, bits) +#if defined(__LITTLE_ENDIAN__) + /** @brief Software Controlled APE Clock Speed Select inLink Aware Power mode */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, LAPMAPEClockSwitch, 0, 5) + /** @brief Padding */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, reserved_7_5, 5, 3) + /** @brief Software Controlled APE Clock Speed Select */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, APEClockSwitch, 8, 5) + /** @brief Padding */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, reserved_15_13, 13, 3) + /** @brief Software Controlled APE Clock Speed Select for Clock Override. */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, ClockOverrideAPEClockSwitch, 16, 5) + /** @brief Padding */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, reserved_26_21, 21, 6) + /** @brief */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, ForceAPEHCLKDisable, 27, 1) + /** @brief */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, ForceAPEFCLKDisable, 28, 1) + /** @brief */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, APEClockSpeedOverrideEnable, 29, 1) + /** @brief */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, APEDeepSleepmodeEnable, 30, 1) + /** @brief */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, APESleepmodeEnable, 31, 1) +#elif defined(__BIG_ENDIAN__) + /** @brief */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, APESleepmodeEnable, 31, 1) + /** @brief */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, APEDeepSleepmodeEnable, 30, 1) + /** @brief */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, APEClockSpeedOverrideEnable, 29, 1) + /** @brief */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, ForceAPEFCLKDisable, 28, 1) + /** @brief */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, ForceAPEHCLKDisable, 27, 1) + /** @brief Padding */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, reserved_26_21, 21, 6) + /** @brief Software Controlled APE Clock Speed Select for Clock Override. */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, ClockOverrideAPEClockSwitch, 16, 5) + /** @brief Padding */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, reserved_15_13, 13, 3) + /** @brief Software Controlled APE Clock Speed Select */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, APEClockSwitch, 8, 5) + /** @brief Padding */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, reserved_7_5, 5, 3) + /** @brief Software Controlled APE Clock Speed Select inLink Aware Power mode */ + BITFIELD_MEMBER(BCM5719_DEVICE_H_uint32_t, LAPMAPEClockSwitch, 0, 5) +#else +#error Unknown Endian +#endif + BITFIELD_END(BCM5719_DEVICE_H_uint32_t, bits) +#ifdef CXX_SIMULATOR + /** @brief Register name for use with the simulator. */ + const char* getName(void) { return "ApeClkPolicy"; } + + /** @brief Print register value. */ + void print(void) { r32.print(); } + + RegDEVICEApeClkPolicy_t() + { + /** @brief constructor for @ref DEVICE_t.ApeClkPolicy. */ + r32.setName("ApeClkPolicy"); + bits.LAPMAPEClockSwitch.setBaseRegister(&r32); + bits.LAPMAPEClockSwitch.setName("LAPMAPEClockSwitch"); + bits.LAPMAPEClockSwitch.addEnum("25 MHz", 0x11); + bits.LAPMAPEClockSwitch.addEnum("12.5 MHz", 0x13); + bits.LAPMAPEClockSwitch.addEnum("6.25 MHz", 0x15); + bits.LAPMAPEClockSwitch.addEnum("3.125 MHz", 0x17); + bits.LAPMAPEClockSwitch.addEnum("1.563 MHz", 0x19); + + bits.APEClockSwitch.setBaseRegister(&r32); + bits.APEClockSwitch.setName("APEClockSwitch"); + bits.APEClockSwitch.addEnum("62.5 MHz", 0x0); + bits.APEClockSwitch.addEnum("25 MHz", 0x9); + bits.APEClockSwitch.addEnum("12.5 MHz", 0x13); + bits.APEClockSwitch.addEnum("6.25 MHz", 0x15); + bits.APEClockSwitch.addEnum("3.125 MHz", 0x17); + bits.APEClockSwitch.addEnum("1.563 MHz", 0x19); + bits.APEClockSwitch.addEnum("125 MHz", 0x1e); + + bits.ClockOverrideAPEClockSwitch.setBaseRegister(&r32); + bits.ClockOverrideAPEClockSwitch.setName("ClockOverrideAPEClockSwitch"); + bits.ClockOverrideAPEClockSwitch.addEnum("62.5 MHz", 0x0); + bits.ClockOverrideAPEClockSwitch.addEnum("25 MHz", 0x9); + bits.ClockOverrideAPEClockSwitch.addEnum("12.5 MHz", 0x13); + bits.ClockOverrideAPEClockSwitch.addEnum("6.25 MHz", 0x15); + bits.ClockOverrideAPEClockSwitch.addEnum("3.125 MHz", 0x17); + bits.ClockOverrideAPEClockSwitch.addEnum("1.563 MHz", 0x19); + bits.ClockOverrideAPEClockSwitch.addEnum("125 MHz", 0x1e); + + bits.ForceAPEHCLKDisable.setBaseRegister(&r32); + bits.ForceAPEHCLKDisable.setName("ForceAPEHCLKDisable"); + bits.ForceAPEFCLKDisable.setBaseRegister(&r32); + bits.ForceAPEFCLKDisable.setName("ForceAPEFCLKDisable"); + bits.APEClockSpeedOverrideEnable.setBaseRegister(&r32); + bits.APEClockSpeedOverrideEnable.setName("APEClockSpeedOverrideEnable"); + bits.APEDeepSleepmodeEnable.setBaseRegister(&r32); + bits.APEDeepSleepmodeEnable.setName("APEDeepSleepmodeEnable"); + bits.APESleepmodeEnable.setBaseRegister(&r32); + bits.APESleepmodeEnable.setName("APESleepmodeEnable"); + } + RegDEVICEApeClkPolicy_t& operator=(const RegDEVICEApeClkPolicy_t& other) + { + r32 = other.r32; + return *this; + } +#endif /* CXX_SIMULATOR */ +} RegDEVICEApeClkPolicy_t; + #define REG_DEVICE_APE_SLEEP_STATE_CLOCK_POLICY ((volatile BCM5719_DEVICE_H_uint32_t*)0xc0003620) /* */ #define DEVICE_APE_SLEEP_STATE_CLOCK_POLICY_APE_SLEEP_FCLK_SWITCH_SHIFT 0u #define DEVICE_APE_SLEEP_STATE_CLOCK_POLICY_APE_SLEEP_FCLK_SWITCH_MASK 0x1fu @@ -9355,7 +9525,10 @@ typedef struct DEVICE_t { RegDEVICELinkAwarePowerModeClockPolicy_t LinkAwarePowerModeClockPolicy; /** @brief Reserved bytes to pad out data structure. */ - BCM5719_DEVICE_H_uint32_t reserved_13844[3]; + BCM5719_DEVICE_H_uint32_t reserved_13844[2]; + + /** @brief */ + RegDEVICEApeClkPolicy_t ApeClkPolicy; /** @brief */ RegDEVICEApeSleepStateClockPolicy_t ApeSleepStateClockPolicy; @@ -9884,10 +10057,11 @@ typedef struct DEVICE_t { reserved_13832[i].setComponentOffset(0x3608 + (i * 4)); } LinkAwarePowerModeClockPolicy.r32.setComponentOffset(0x3610); - for(int i = 0; i < 3; i++) + for(int i = 0; i < 2; i++) { reserved_13844[i].setComponentOffset(0x3614 + (i * 4)); } + ApeClkPolicy.r32.setComponentOffset(0x361c); ApeSleepStateClockPolicy.r32.setComponentOffset(0x3620); ClockSpeedOverridePolicy.r32.setComponentOffset(0x3624); for(int i = 0; i < 1; i++) @@ -10246,10 +10420,11 @@ typedef struct DEVICE_t { reserved_13832[i].print(); } LinkAwarePowerModeClockPolicy.print(); - for(int i = 0; i < 3; i++) + for(int i = 0; i < 2; i++) { reserved_13844[i].print(); } + ApeClkPolicy.print(); ApeSleepStateClockPolicy.print(); ClockSpeedOverridePolicy.print(); for(int i = 0; i < 1; i++) diff --git a/ipxact/DEVICE.xml b/ipxact/DEVICE.xml index f47ea9a..cfa839b 100644 --- a/ipxact/DEVICE.xml +++ b/ipxact/DEVICE.xml @@ -1866,6 +1866,156 @@ </ipxact:field> </ipxact:register> <ipxact:register> + <ipxact:name>APE_CLK_POLICY</ipxact:name> + <ipxact:description></ipxact:description> + <ipxact:addressOffset>0x361C</ipxact:addressOffset> + <!-- LINK: registerDefinitionGroup: see 6.11.3, Register definition group --> + <ipxact:size>32</ipxact:size> + <ipxact:volatile>true</ipxact:volatile> + <ipxact:field> + <ipxact:name>LAPM APE Clock Switch</ipxact:name> + <ipxact:description>Software Controlled APE Clock Speed Select in +Link Aware Power mode</ipxact:description> + <ipxact:bitOffset>0</ipxact:bitOffset> + <ipxact:bitWidth>5</ipxact:bitWidth> + <ipxact:access>read-write</ipxact:access> + <ipxact:enumeratedValues> + <!-- LINK: enumeratedValue: see 6.11.10, Enumeration values --> + <ipxact:enumeratedValue> + <ipxact:name>25 MHz</ipxact:name> + <ipxact:value>17</ipxact:value> + </ipxact:enumeratedValue> + <ipxact:enumeratedValue> + <ipxact:name>12.5 MHz</ipxact:name> + <ipxact:value>19</ipxact:value> + </ipxact:enumeratedValue> + <ipxact:enumeratedValue> + <ipxact:name>6.25 MHz</ipxact:name> + <ipxact:value>21</ipxact:value> + </ipxact:enumeratedValue> + <ipxact:enumeratedValue> + <ipxact:name>3.125 MHz</ipxact:name> + <ipxact:value>23</ipxact:value> + </ipxact:enumeratedValue> + <ipxact:enumeratedValue> + <ipxact:name>1.563 MHz</ipxact:name> + <ipxact:value>25</ipxact:value> + </ipxact:enumeratedValue> + </ipxact:enumeratedValues> + </ipxact:field> + <ipxact:field> + <ipxact:name>APE Clock Switch</ipxact:name> + <ipxact:description>Software Controlled APE Clock Speed Select</ipxact:description> + <ipxact:bitOffset>8</ipxact:bitOffset> + <ipxact:bitWidth>5</ipxact:bitWidth> + <ipxact:access>read-write</ipxact:access> + <ipxact:enumeratedValues> + <!-- LINK: enumeratedValue: see 6.11.10, Enumeration values --> + <ipxact:enumeratedValue> + <ipxact:name>125 MHz</ipxact:name> + <ipxact:value>30</ipxact:value> + </ipxact:enumeratedValue> + <ipxact:enumeratedValue> + <ipxact:name>62.5 MHz</ipxact:name> + <ipxact:value>0</ipxact:value> + </ipxact:enumeratedValue> + <ipxact:enumeratedValue> + <ipxact:name>25 MHz</ipxact:name> + <ipxact:value>9</ipxact:value> + </ipxact:enumeratedValue> + <ipxact:enumeratedValue> + <ipxact:name>12.5 MHz</ipxact:name> + <ipxact:value>19</ipxact:value> + </ipxact:enumeratedValue> + <ipxact:enumeratedValue> + <ipxact:name>6.25 MHz</ipxact:name> + <ipxact:value>21</ipxact:value> + </ipxact:enumeratedValue> + <ipxact:enumeratedValue> + <ipxact:name>3.125 MHz</ipxact:name> + <ipxact:value>23</ipxact:value> + </ipxact:enumeratedValue> + <ipxact:enumeratedValue> + <ipxact:name>1.563 MHz</ipxact:name> + <ipxact:value>25</ipxact:value> + </ipxact:enumeratedValue> + </ipxact:enumeratedValues> + </ipxact:field> + <ipxact:field> + <ipxact:name>Clock Override APE Clock Switch</ipxact:name> + <ipxact:description>Software Controlled APE Clock Speed Select for Clock Override.</ipxact:description> + <ipxact:bitOffset>16</ipxact:bitOffset> + <ipxact:bitWidth>5</ipxact:bitWidth> + <ipxact:access>read-write</ipxact:access> + <ipxact:enumeratedValues> + <!-- LINK: enumeratedValue: see 6.11.10, Enumeration values --> + <ipxact:enumeratedValue> + <ipxact:name>125 MHz</ipxact:name> + <ipxact:value>30</ipxact:value> + </ipxact:enumeratedValue> + <ipxact:enumeratedValue> + <ipxact:name>62.5 MHz</ipxact:name> + <ipxact:value>0</ipxact:value> + </ipxact:enumeratedValue> + <ipxact:enumeratedValue> + <ipxact:name>25 MHz</ipxact:name> + <ipxact:value>9</ipxact:value> + </ipxact:enumeratedValue> + <ipxact:enumeratedValue> + <ipxact:name>12.5 MHz</ipxact:name> + <ipxact:value>19</ipxact:value> + </ipxact:enumeratedValue> + <ipxact:enumeratedValue> + <ipxact:name>6.25 MHz</ipxact:name> + <ipxact:value>21</ipxact:value> + </ipxact:enumeratedValue> + <ipxact:enumeratedValue> + <ipxact:name>3.125 MHz</ipxact:name> + <ipxact:value>23</ipxact:value> + </ipxact:enumeratedValue> + <ipxact:enumeratedValue> + <ipxact:name>1.563 MHz</ipxact:name> + <ipxact:value>25</ipxact:value> + </ipxact:enumeratedValue> + </ipxact:enumeratedValues> + </ipxact:field> + <ipxact:field> + <ipxact:name>Force APE HCLK Disable</ipxact:name> + <ipxact:description></ipxact:description> + <ipxact:bitOffset>27</ipxact:bitOffset> + <ipxact:bitWidth>1</ipxact:bitWidth> + <ipxact:access>read-write</ipxact:access> + </ipxact:field> + <ipxact:field> + <ipxact:name>Force APE FCLK Disable</ipxact:name> + <ipxact:description></ipxact:description> + <ipxact:bitOffset>28</ipxact:bitOffset> + <ipxact:bitWidth>1</ipxact:bitWidth> + <ipxact:access>read-write</ipxact:access> + </ipxact:field> + <ipxact:field> + <ipxact:name>APE Clock Speed Override Enable</ipxact:name> + <ipxact:description></ipxact:description> + <ipxact:bitOffset>29</ipxact:bitOffset> + <ipxact:bitWidth>1</ipxact:bitWidth> + <ipxact:access>read-write</ipxact:access> + </ipxact:field> + <ipxact:field> + <ipxact:name>APE Deep Sleep mode Enable</ipxact:name> + <ipxact:description></ipxact:description> + <ipxact:bitOffset>30</ipxact:bitOffset> + <ipxact:bitWidth>1</ipxact:bitWidth> + <ipxact:access>read-write</ipxact:access> + </ipxact:field> + <ipxact:field> + <ipxact:name>APE Sleep mode Enable</ipxact:name> + <ipxact:description></ipxact:description> + <ipxact:bitOffset>31</ipxact:bitOffset> + <ipxact:bitWidth>1</ipxact:bitWidth> + <ipxact:access>read-write</ipxact:access> + </ipxact:field> + </ipxact:register> + <ipxact:register> <ipxact:name>APE_SLEEP_STATE_CLOCK_POLICY</ipxact:name> <ipxact:description></ipxact:description> <ipxact:addressOffset>0x3620</ipxact:addressOffset> diff --git a/simulator/APE_DEVICE.cpp b/simulator/APE_DEVICE.cpp index 8d6318b..1244218 100644 --- a/simulator/APE_DEVICE.cpp +++ b/simulator/APE_DEVICE.cpp @@ -145,6 +145,8 @@ void init_APE_DEVICE(void) /** @brief Bitmap for @ref DEVICE_t.LinkAwarePowerModeClockPolicy. */ + /** @brief Bitmap for @ref DEVICE_t.ApeClkPolicy. */ + /** @brief Bitmap for @ref DEVICE_t.ApeSleepStateClockPolicy. */ /** @brief Bitmap for @ref DEVICE_t.ClockSpeedOverridePolicy. */ diff --git a/simulator/APE_DEVICE0.cpp b/simulator/APE_DEVICE0.cpp new file mode 100644 index 0000000..b6a3bd6 --- /dev/null +++ b/simulator/APE_DEVICE0.cpp @@ -0,0 +1,331 @@ +//////////////////////////////////////////////////////////////////////////////// +/// +/// @file APE_DEVICE.cpp +/// +/// @project ape +/// +/// @brief APE_DEVICE +/// +//////////////////////////////////////////////////////////////////////////////// +/// +//////////////////////////////////////////////////////////////////////////////// +/// +/// @copyright Copyright (c) 2018, Evan Lojewski +/// @cond +/// +/// All rights reserved. +/// +/// Redistribution and use in source and binary forms, with or without +/// modification, are permitted provided that the following conditions are met: +/// 1. Redistributions of source code must retain the above copyright notice, +/// this list of conditions and the following disclaimer. +/// 2. Redistributions in binary form must reproduce the above copyright notice, +/// this list of conditions and the following disclaimer in the documentation +/// and/or other materials provided with the distribution. +/// 3. Neither the name of the <organization> nor the +/// names of its contributors may be used to endorse or promote products +/// derived from this software without specific prior written permission. +/// +//////////////////////////////////////////////////////////////////////////////// +/// +/// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +/// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +/// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +/// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +/// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +/// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +/// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +/// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +/// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +/// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +/// POSSIBILITY OF SUCH DAMAGE. +/// @endcond +//////////////////////////////////////////////////////////////////////////////// + +#include <APE_DEVICE.h> + +DEVICE_t DEVICE0; + +void init_APE_DEVICE0(void) +{ + /** @brief Component Registers for @ref DEVICE. */ + /** @brief Bitmap for @ref DEVICE_t.MiscellaneousHostControl. */ + + /** @brief Bitmap for @ref DEVICE_t.PciState. */ + + /** @brief Bitmap for @ref DEVICE_t.RegisterBase. */ + + /** @brief Bitmap for @ref DEVICE_t.MemoryBase. */ + + /** @brief Bitmap for @ref DEVICE_t.RegisterData. */ + + /** @brief Bitmap for @ref DEVICE_t.UndiReceiveReturnRingConsumerIndex. */ + + /** @brief Bitmap for @ref DEVICE_t.UndiReceiveReturnRingConsumerIndexLow. */ + + /** @brief Bitmap for @ref DEVICE_t.LinkStatusControl. */ + + /** @brief Bitmap for @ref DEVICE_t.ApeMemoryBase. */ + + /** @brief Bitmap for @ref DEVICE_t.ApeMemoryData. */ + + /** @brief Bitmap for @ref DEVICE_t.160. */ + + /** @brief Bitmap for @ref DEVICE_t.EmacMode. */ + + /** @brief Bitmap for @ref DEVICE_t.EmacStatus. */ + + /** @brief Bitmap for @ref DEVICE_t.EmacEvent. */ + + /** @brief Bitmap for @ref DEVICE_t.LedControl. */ + + /** @brief Bitmap for @ref DEVICE_t.EmacMacAddresses0High. */ + + /** @brief Bitmap for @ref DEVICE_t.EmacMacAddresses0Low. */ + + /** @brief Bitmap for @ref DEVICE_t.EmacMacAddresses1High. */ + + /** @brief Bitmap for @ref DEVICE_t.EmacMacAddresses1Low. */ + + /** @brief Bitmap for @ref DEVICE_t.EmacMacAddresses2High. */ + + /** @brief Bitmap for @ref DEVICE_t.EmacMacAddresses2Low. */ + + /** @brief Bitmap for @ref DEVICE_t.EmacMacAddresses3High. */ + + /** @brief Bitmap for @ref DEVICE_t.EmacMacAddresses3Low. */ + + /** @brief Bitmap for @ref DEVICE_t.WolPatternPointer. */ + + /** @brief Bitmap for @ref DEVICE_t.WolPatternCfg. */ + + /** @brief Bitmap for @ref DEVICE_t.438. */ + + /** @brief Bitmap for @ref DEVICE_t.MtuSize. */ + + /** @brief Bitmap for @ref DEVICE_t.MiiCommunication. */ + + /** @brief Bitmap for @ref DEVICE_t.MiiMode. */ + + /** @brief Bitmap for @ref DEVICE_t.TransmitMacMode. */ + + /** @brief Bitmap for @ref DEVICE_t.TransmitMacStatus. */ + + /** @brief Bitmap for @ref DEVICE_t.ReceiveMacMode. */ + + /** @brief Bitmap for @ref DEVICE_t.ReceiveMacStatus. */ + + /** @brief Bitmap for @ref DEVICE_t.PerfectMatch1High. */ + + /** @brief Bitmap for @ref DEVICE_t.PerfectMatch1Low. */ + + /** @brief Bitmap for @ref DEVICE_t.PerfectMatch2High. */ + + /** @brief Bitmap for @ref DEVICE_t.PerfectMatch2Low. */ + + /** @brief Bitmap for @ref DEVICE_t.PerfectMatch3High. */ + + /** @brief Bitmap for @ref DEVICE_t.PerfectMatch3Low. */ + + /** @brief Bitmap for @ref DEVICE_t.PerfectMatch4High. */ + + /** @brief Bitmap for @ref DEVICE_t.PerfectMatch4Low. */ + + /** @brief Bitmap for @ref DEVICE_t.SgmiiStatus. */ + + /** @brief Bitmap for @ref DEVICE_t.CpmuControl. */ + + /** @brief Bitmap for @ref DEVICE_t.NoLinkPowerModeClockPolicy. */ + + /** @brief Bitmap for @ref DEVICE_t.LinkAwarePowerModeClockPolicy. */ + + /** @brief Bitmap for @ref DEVICE_t.ClockSpeedOverridePolicy. */ + + /** @brief Bitmap for @ref DEVICE_t.Status. */ + + /** @brief Bitmap for @ref DEVICE_t.ClockStatus. */ + + /** @brief Bitmap for @ref DEVICE_t.GphyControlStatus. */ + + /** @brief Bitmap for @ref DEVICE_t.ChipId. */ + + /** @brief Bitmap for @ref DEVICE_t.MutexRequest. */ + + /** @brief Bitmap for @ref DEVICE_t.MutexGrant. */ + + /** @brief Bitmap for @ref DEVICE_t.GphyStrap. */ + + /** @brief Bitmap for @ref DEVICE_t.FlashClockControlPolicy. */ + + /** @brief Bitmap for @ref DEVICE_t.TopLevelMiscellaneousControl1. */ + + /** @brief Bitmap for @ref DEVICE_t.EeeMode. */ + + /** @brief Bitmap for @ref DEVICE_t.EeeLinkIdleControl. */ + + /** @brief Bitmap for @ref DEVICE_t.EeeControl. */ + + /** @brief Bitmap for @ref DEVICE_t.GlobalMutexRequest. */ + + /** @brief Bitmap for @ref DEVICE_t.GlobalMutexGrant. */ + + /** @brief Bitmap for @ref DEVICE_t.TemperatureMonitorControl. */ + + /** @brief Bitmap for @ref DEVICE_t.MemoryArbiterMode. */ + + /** @brief Bitmap for @ref DEVICE_t.BufferManagerMode. */ + + /** @brief Bitmap for @ref DEVICE_t.LsoNonlsoBdReadDmaCorruptionEnableControl. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscMode. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscStatus. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscProgramCounter. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscCurrentInstruction. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscHardwareBreakpoint. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister0. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister1. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister2. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister3. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister4. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister5. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister6. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister7. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister8. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister9. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister10. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister11. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister12. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister13. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister14. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister15. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister16. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister17. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister18. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister19. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister20. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister21. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister22. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister23. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister24. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister25. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister26. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister27. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister28. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister29. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister30. */ + + /** @brief Bitmap for @ref DEVICE_t.RxRiscRegister31. */ + + /** @brief Bitmap for @ref DEVICE_t.6408. */ + + /** @brief Bitmap for @ref DEVICE_t.PciPowerConsumptionInfo. */ + + /** @brief Bitmap for @ref DEVICE_t.PciPowerDissipatedInfo. */ + + /** @brief Bitmap for @ref DEVICE_t.PciVpdRequest. */ + + /** @brief Bitmap for @ref DEVICE_t.PciVpdResponse. */ + + /** @brief Bitmap for @ref DEVICE_t.PciVendorDeviceId. */ + + /** @brief Bitmap for @ref DEVICE_t.PciSubsystemId. */ + + /** @brief Bitmap for @ref DEVICE_t.PciClassCodeRevision. */ + + /** @brief Bitmap for @ref DEVICE_t.64c0. */ + + /** @brief Bitmap for @ref DEVICE_t.64c4. */ + + /** @brief Bitmap for @ref DEVICE_t.64c8. */ + + /** @brief Bitmap for @ref DEVICE_t.64dc. */ + + /** @brief Bitmap for @ref DEVICE_t.PciSerialNumberLow. */ + + /** @brief Bitmap for @ref DEVICE_t.PciSerialNumberHigh. */ + + /** @brief Bitmap for @ref DEVICE_t.PciPowerBudget0. */ + + /** @brief Bitmap for @ref DEVICE_t.PciPowerBudget1. */ + + /** @brief Bitmap for @ref DEVICE_t.PciPowerBudget2. */ + + /** @brief Bitmap for @ref DEVICE_t.PciPowerBudget3. */ + + /** @brief Bitmap for @ref DEVICE_t.PciPowerBudget4. */ + + /** @brief Bitmap for @ref DEVICE_t.PciPowerBudget5. */ + + /** @brief Bitmap for @ref DEVICE_t.PciPowerBudget6. */ + + /** @brief Bitmap for @ref DEVICE_t.PciPowerBudget7. */ + + /** @brief Bitmap for @ref DEVICE_t.6530. */ + + /** @brief Bitmap for @ref DEVICE_t.6550. */ + + /** @brief Bitmap for @ref DEVICE_t.65f4. */ + + /** @brief Bitmap for @ref DEVICE_t.GrcModeControl. */ + + /** @brief Bitmap for @ref DEVICE_t.MiscellaneousConfig. */ + + /** @brief Bitmap for @ref DEVICE_t.MiscellaneousLocalControl. */ + + /** @brief Bitmap for @ref DEVICE_t.Timer. */ + + /** @brief Bitmap for @ref DEVICE_t.RxCpuEvent. */ + + /** @brief Bitmap for @ref DEVICE_t.6838. */ + + /** @brief Bitmap for @ref DEVICE_t.MdiControl. */ + + /** @brief Bitmap for @ref DEVICE_t.RxCpuEventEnable. */ + + /** @brief Bitmap for @ref DEVICE_t.FastBootProgramCounter. */ + + /** @brief Bitmap for @ref DEVICE_t.ExpansionRomAddr. */ + + /** @brief Bitmap for @ref DEVICE_t.68f0. */ + + /** @brief Bitmap for @ref DEVICE_t.EavRefClockControl. */ + + /** @brief Bitmap for @ref DEVICE_t.7c04. */ + + +} diff --git a/simulator/APE_DEVICE1.cpp b/simulator/APE_DEVICE1.cpp index 13b1873..3c8a7c6 100644 --- a/simulator/APE_DEVICE1.cpp +++ b/simulator/APE_DEVICE1.cpp @@ -145,6 +145,8 @@ void init_APE_DEVICE1(void) /** @brief Bitmap for @ref DEVICE1_t.LinkAwarePowerModeClockPolicy. */ + /** @brief Bitmap for @ref DEVICE1_t.ApeClkPolicy. */ + /** @brief Bitmap for @ref DEVICE1_t.ApeSleepStateClockPolicy. */ /** @brief Bitmap for @ref DEVICE1_t.ClockSpeedOverridePolicy. */ diff --git a/simulator/APE_DEVICE1_sim.cpp b/simulator/APE_DEVICE1_sim.cpp index 21256d1..9111d89 100644 --- a/simulator/APE_DEVICE1_sim.cpp +++ b/simulator/APE_DEVICE1_sim.cpp @@ -280,6 +280,10 @@ void init_APE_DEVICE1_sim(void *arg0) DEVICE1.LinkAwarePowerModeClockPolicy.r32.installReadCallback(loader_read_mem, (uint8_t *)base); DEVICE1.LinkAwarePowerModeClockPolicy.r32.installWriteCallback(loader_write_mem, (uint8_t *)base); + /** @brief Bitmap for @ref DEVICE1_t.ApeClkPolicy. */ + DEVICE1.ApeClkPolicy.r32.installReadCallback(loader_read_mem, (uint8_t *)base); + DEVICE1.ApeClkPolicy.r32.installWriteCallback(loader_write_mem, (uint8_t *)base); + /** @brief Bitmap for @ref DEVICE1_t.ApeSleepStateClockPolicy. */ DEVICE1.ApeSleepStateClockPolicy.r32.installReadCallback(loader_read_mem, (uint8_t *)base); DEVICE1.ApeSleepStateClockPolicy.r32.installWriteCallback(loader_write_mem, (uint8_t *)base); diff --git a/simulator/APE_DEVICE2.cpp b/simulator/APE_DEVICE2.cpp index 34786f9..647c430 100644 --- a/simulator/APE_DEVICE2.cpp +++ b/simulator/APE_DEVICE2.cpp @@ -145,6 +145,8 @@ void init_APE_DEVICE2(void) /** @brief Bitmap for @ref DEVICE2_t.LinkAwarePowerModeClockPolicy. */ + /** @brief Bitmap for @ref DEVICE2_t.ApeClkPolicy. */ + /** @brief Bitmap for @ref DEVICE2_t.ApeSleepStateClockPolicy. */ /** @brief Bitmap for @ref DEVICE2_t.ClockSpeedOverridePolicy. */ diff --git a/simulator/APE_DEVICE2_sim.cpp b/simulator/APE_DEVICE2_sim.cpp index 68e137c..681e1b6 100644 --- a/simulator/APE_DEVICE2_sim.cpp +++ b/simulator/APE_DEVICE2_sim.cpp @@ -280,6 +280,10 @@ void init_APE_DEVICE2_sim(void *arg0) DEVICE2.LinkAwarePowerModeClockPolicy.r32.installReadCallback(loader_read_mem, (uint8_t *)base); DEVICE2.LinkAwarePowerModeClockPolicy.r32.installWriteCallback(loader_write_mem, (uint8_t *)base); + /** @brief Bitmap for @ref DEVICE2_t.ApeClkPolicy. */ + DEVICE2.ApeClkPolicy.r32.installReadCallback(loader_read_mem, (uint8_t *)base); + DEVICE2.ApeClkPolicy.r32.installWriteCallback(loader_write_mem, (uint8_t *)base); + /** @brief Bitmap for @ref DEVICE2_t.ApeSleepStateClockPolicy. */ DEVICE2.ApeSleepStateClockPolicy.r32.installReadCallback(loader_read_mem, (uint8_t *)base); DEVICE2.ApeSleepStateClockPolicy.r32.installWriteCallback(loader_write_mem, (uint8_t *)base); diff --git a/simulator/APE_DEVICE3.cpp b/simulator/APE_DEVICE3.cpp index 1835503..fcd0638 100644 --- a/simulator/APE_DEVICE3.cpp +++ b/simulator/APE_DEVICE3.cpp @@ -145,6 +145,8 @@ void init_APE_DEVICE3(void) /** @brief Bitmap for @ref DEVICE3_t.LinkAwarePowerModeClockPolicy. */ + /** @brief Bitmap for @ref DEVICE3_t.ApeClkPolicy. */ + /** @brief Bitmap for @ref DEVICE3_t.ApeSleepStateClockPolicy. */ /** @brief Bitmap for @ref DEVICE3_t.ClockSpeedOverridePolicy. */ diff --git a/simulator/APE_DEVICE3_sim.cpp b/simulator/APE_DEVICE3_sim.cpp index 28d9492..fd8fec1 100644 --- a/simulator/APE_DEVICE3_sim.cpp +++ b/simulator/APE_DEVICE3_sim.cpp @@ -280,6 +280,10 @@ void init_APE_DEVICE3_sim(void *arg0) DEVICE3.LinkAwarePowerModeClockPolicy.r32.installReadCallback(loader_read_mem, (uint8_t *)base); DEVICE3.LinkAwarePowerModeClockPolicy.r32.installWriteCallback(loader_write_mem, (uint8_t *)base); + /** @brief Bitmap for @ref DEVICE3_t.ApeClkPolicy. */ + DEVICE3.ApeClkPolicy.r32.installReadCallback(loader_read_mem, (uint8_t *)base); + DEVICE3.ApeClkPolicy.r32.installWriteCallback(loader_write_mem, (uint8_t *)base); + /** @brief Bitmap for @ref DEVICE3_t.ApeSleepStateClockPolicy. */ DEVICE3.ApeSleepStateClockPolicy.r32.installReadCallback(loader_read_mem, (uint8_t *)base); DEVICE3.ApeSleepStateClockPolicy.r32.installWriteCallback(loader_write_mem, (uint8_t *)base); diff --git a/simulator/APE_DEVICE_sim.cpp b/simulator/APE_DEVICE_sim.cpp index bbc715c..dea9965 100644 --- a/simulator/APE_DEVICE_sim.cpp +++ b/simulator/APE_DEVICE_sim.cpp @@ -280,6 +280,10 @@ void init_APE_DEVICE_sim(void *arg0) DEVICE.LinkAwarePowerModeClockPolicy.r32.installReadCallback(loader_read_mem, (uint8_t *)base); DEVICE.LinkAwarePowerModeClockPolicy.r32.installWriteCallback(loader_write_mem, (uint8_t *)base); + /** @brief Bitmap for @ref DEVICE_t.ApeClkPolicy. */ + DEVICE.ApeClkPolicy.r32.installReadCallback(loader_read_mem, (uint8_t *)base); + DEVICE.ApeClkPolicy.r32.installWriteCallback(loader_write_mem, (uint8_t *)base); + /** @brief Bitmap for @ref DEVICE_t.ApeSleepStateClockPolicy. */ DEVICE.ApeSleepStateClockPolicy.r32.installReadCallback(loader_read_mem, (uint8_t *)base); DEVICE.ApeSleepStateClockPolicy.r32.installWriteCallback(loader_write_mem, (uint8_t *)base); diff --git a/simulator/bcm5719_DEVICE.cpp b/simulator/bcm5719_DEVICE.cpp index 9f5f0c1..0f646cc 100644 --- a/simulator/bcm5719_DEVICE.cpp +++ b/simulator/bcm5719_DEVICE.cpp @@ -145,6 +145,8 @@ void init_bcm5719_DEVICE(void) /** @brief Bitmap for @ref DEVICE_t.LinkAwarePowerModeClockPolicy. */ + /** @brief Bitmap for @ref DEVICE_t.ApeClkPolicy. */ + /** @brief Bitmap for @ref DEVICE_t.ApeSleepStateClockPolicy. */ /** @brief Bitmap for @ref DEVICE_t.ClockSpeedOverridePolicy. */ diff --git a/simulator/bcm5719_DEVICE_sim.cpp b/simulator/bcm5719_DEVICE_sim.cpp index e23bb24..24ca2d3 100644 --- a/simulator/bcm5719_DEVICE_sim.cpp +++ b/simulator/bcm5719_DEVICE_sim.cpp @@ -353,11 +353,15 @@ void init_bcm5719_DEVICE_sim(void *base) DEVICE.LinkAwarePowerModeClockPolicy.r32.installReadCallback(read_from_ram, (uint8_t *)base); DEVICE.LinkAwarePowerModeClockPolicy.r32.installWriteCallback(write_to_ram, (uint8_t *)base); - for(int i = 0; i < 3; i++) + for(int i = 0; i < 2; i++) { DEVICE.reserved_13844[i].installReadCallback(read_from_ram, (uint8_t *)base); DEVICE.reserved_13844[i].installWriteCallback(write_to_ram, (uint8_t *)base); } + /** @brief Bitmap for @ref DEVICE_t.ApeClkPolicy. */ + DEVICE.ApeClkPolicy.r32.installReadCallback(read_from_ram, (uint8_t *)base); + DEVICE.ApeClkPolicy.r32.installWriteCallback(write_to_ram, (uint8_t *)base); + /** @brief Bitmap for @ref DEVICE_t.ApeSleepStateClockPolicy. */ DEVICE.ApeSleepStateClockPolicy.r32.installReadCallback(read_from_ram, (uint8_t *)base); DEVICE.ApeSleepStateClockPolicy.r32.installWriteCallback(write_to_ram, (uint8_t *)base); |