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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s
declare <8 x double> @llvm.experimental.constrained.fadd.v8f64(<8 x double>, <8 x double>, metadata, metadata)
declare <16 x float> @llvm.experimental.constrained.fadd.v16f32(<16 x float>, <16 x float>, metadata, metadata)
declare <8 x double> @llvm.experimental.constrained.fsub.v8f64(<8 x double>, <8 x double>, metadata, metadata)
declare <16 x float> @llvm.experimental.constrained.fsub.v16f32(<16 x float>, <16 x float>, metadata, metadata)
declare <8 x double> @llvm.experimental.constrained.fmul.v8f64(<8 x double>, <8 x double>, metadata, metadata)
declare <16 x float> @llvm.experimental.constrained.fmul.v16f32(<16 x float>, <16 x float>, metadata, metadata)
declare <8 x double> @llvm.experimental.constrained.fdiv.v8f64(<8 x double>, <8 x double>, metadata, metadata)
declare <16 x float> @llvm.experimental.constrained.fdiv.v16f32(<16 x float>, <16 x float>, metadata, metadata)
define <8 x double> @f1(<8 x double> %a, <8 x double> %b) #0 {
; CHECK-LABEL: f1:
; CHECK: # %bb.0:
; CHECK-NEXT: vaddpd %zmm1, %zmm0, %zmm0
; CHECK-NEXT: ret{{[l|q]}}
%ret = call <8 x double> @llvm.experimental.constrained.fadd.v8f64(<8 x double> %a, <8 x double> %b,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
ret <8 x double> %ret
}
define <16 x float> @f2(<16 x float> %a, <16 x float> %b) #0 {
; CHECK-LABEL: f2:
; CHECK: # %bb.0:
; CHECK-NEXT: vaddps %zmm1, %zmm0, %zmm0
; CHECK-NEXT: ret{{[l|q]}}
%ret = call <16 x float> @llvm.experimental.constrained.fadd.v16f32(<16 x float> %a, <16 x float> %b,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
ret <16 x float> %ret
}
define <8 x double> @f3(<8 x double> %a, <8 x double> %b) #0 {
; CHECK-LABEL: f3:
; CHECK: # %bb.0:
; CHECK-NEXT: vsubpd %zmm1, %zmm0, %zmm0
; CHECK-NEXT: ret{{[l|q]}}
%ret = call <8 x double> @llvm.experimental.constrained.fsub.v8f64(<8 x double> %a, <8 x double> %b,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
ret <8 x double> %ret
}
define <16 x float> @f4(<16 x float> %a, <16 x float> %b) #0 {
; CHECK-LABEL: f4:
; CHECK: # %bb.0:
; CHECK-NEXT: vsubps %zmm1, %zmm0, %zmm0
; CHECK-NEXT: ret{{[l|q]}}
%ret = call <16 x float> @llvm.experimental.constrained.fsub.v16f32(<16 x float> %a, <16 x float> %b,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
ret <16 x float> %ret
}
define <8 x double> @f5(<8 x double> %a, <8 x double> %b) #0 {
; CHECK-LABEL: f5:
; CHECK: # %bb.0:
; CHECK-NEXT: vmulpd %zmm1, %zmm0, %zmm0
; CHECK-NEXT: ret{{[l|q]}}
%ret = call <8 x double> @llvm.experimental.constrained.fmul.v8f64(<8 x double> %a, <8 x double> %b,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
ret <8 x double> %ret
}
define <16 x float> @f6(<16 x float> %a, <16 x float> %b) #0 {
; CHECK-LABEL: f6:
; CHECK: # %bb.0:
; CHECK-NEXT: vmulps %zmm1, %zmm0, %zmm0
; CHECK-NEXT: ret{{[l|q]}}
%ret = call <16 x float> @llvm.experimental.constrained.fmul.v16f32(<16 x float> %a, <16 x float> %b,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
ret <16 x float> %ret
}
define <8 x double> @f7(<8 x double> %a, <8 x double> %b) #0 {
; CHECK-LABEL: f7:
; CHECK: # %bb.0:
; CHECK-NEXT: vdivpd %zmm1, %zmm0, %zmm0
; CHECK-NEXT: ret{{[l|q]}}
%ret = call <8 x double> @llvm.experimental.constrained.fdiv.v8f64(<8 x double> %a, <8 x double> %b,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
ret <8 x double> %ret
}
define <16 x float> @f8(<16 x float> %a, <16 x float> %b) #0 {
; CHECK-LABEL: f8:
; CHECK: # %bb.0:
; CHECK-NEXT: vdivps %zmm1, %zmm0, %zmm0
; CHECK-NEXT: ret{{[l|q]}}
%ret = call <16 x float> @llvm.experimental.constrained.fdiv.v16f32(<16 x float> %a, <16 x float> %b,
metadata !"round.dynamic",
metadata !"fpexcept.strict") #0
ret <16 x float> %ret
}
attributes #0 = { strictfp }
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