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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
define <2 x double> @signbits_sext_v2i64_sitofp_v2f64(i32 %a0, i32 %a1) nounwind {
; X32-LABEL: signbits_sext_v2i64_sitofp_v2f64:
; X32: # BB#0:
; X32-NEXT: pushl %ebp
; X32-NEXT: movl %esp, %ebp
; X32-NEXT: andl $-8, %esp
; X32-NEXT: subl $32, %esp
; X32-NEXT: movl 8(%ebp), %eax
; X32-NEXT: movl 12(%ebp), %ecx
; X32-NEXT: vmovd %eax, %xmm0
; X32-NEXT: sarl $31, %eax
; X32-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
; X32-NEXT: vmovq %xmm0, {{[0-9]+}}(%esp)
; X32-NEXT: vmovd %ecx, %xmm0
; X32-NEXT: sarl $31, %ecx
; X32-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0
; X32-NEXT: vmovq %xmm0, {{[0-9]+}}(%esp)
; X32-NEXT: fildll {{[0-9]+}}(%esp)
; X32-NEXT: fstpl {{[0-9]+}}(%esp)
; X32-NEXT: fildll {{[0-9]+}}(%esp)
; X32-NEXT: fstpl (%esp)
; X32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; X32-NEXT: vmovhpd {{.*#+}} xmm0 = xmm0[0],mem[0]
; X32-NEXT: movl %ebp, %esp
; X32-NEXT: popl %ebp
; X32-NEXT: retl
;
; X64-LABEL: signbits_sext_v2i64_sitofp_v2f64:
; X64: # BB#0:
; X64-NEXT: vcvtsi2sdl %esi, %xmm0, %xmm0
; X64-NEXT: vcvtsi2sdl %edi, %xmm1, %xmm1
; X64-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; X64-NEXT: retq
%1 = sext i32 %a0 to i64
%2 = sext i32 %a1 to i64
%3 = insertelement <2 x i64> undef, i64 %1, i32 0
%4 = insertelement <2 x i64> %3, i64 %2, i32 1
%5 = sitofp <2 x i64> %4 to <2 x double>
ret <2 x double> %5
}
define <4 x float> @signbits_sext_v4i64_sitofp_v4f32(i8 signext %a0, i16 signext %a1, i32 %a2, i32 %a3) nounwind {
; X32-LABEL: signbits_sext_v4i64_sitofp_v4f32:
; X32: # BB#0:
; X32-NEXT: pushl %ebp
; X32-NEXT: movl %esp, %ebp
; X32-NEXT: pushl %esi
; X32-NEXT: andl $-8, %esp
; X32-NEXT: subl $56, %esp
; X32-NEXT: movsbl 8(%ebp), %eax
; X32-NEXT: movswl 12(%ebp), %ecx
; X32-NEXT: movl 16(%ebp), %edx
; X32-NEXT: movl 20(%ebp), %esi
; X32-NEXT: vmovd %eax, %xmm0
; X32-NEXT: sarl $31, %eax
; X32-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
; X32-NEXT: vmovq %xmm0, {{[0-9]+}}(%esp)
; X32-NEXT: vmovd %ecx, %xmm0
; X32-NEXT: sarl $31, %ecx
; X32-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0
; X32-NEXT: vmovq %xmm0, {{[0-9]+}}(%esp)
; X32-NEXT: vmovd %edx, %xmm0
; X32-NEXT: sarl $31, %edx
; X32-NEXT: vpinsrd $1, %edx, %xmm0, %xmm0
; X32-NEXT: vmovq %xmm0, {{[0-9]+}}(%esp)
; X32-NEXT: vmovd %esi, %xmm0
; X32-NEXT: sarl $31, %esi
; X32-NEXT: vpinsrd $1, %esi, %xmm0, %xmm0
; X32-NEXT: vmovq %xmm0, {{[0-9]+}}(%esp)
; X32-NEXT: fildll {{[0-9]+}}(%esp)
; X32-NEXT: fstps {{[0-9]+}}(%esp)
; X32-NEXT: fildll {{[0-9]+}}(%esp)
; X32-NEXT: fstps {{[0-9]+}}(%esp)
; X32-NEXT: fildll {{[0-9]+}}(%esp)
; X32-NEXT: fstps {{[0-9]+}}(%esp)
; X32-NEXT: fildll {{[0-9]+}}(%esp)
; X32-NEXT: fstps (%esp)
; X32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; X32-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2,3]
; X32-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
; X32-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
; X32-NEXT: leal -4(%ebp), %esp
; X32-NEXT: popl %esi
; X32-NEXT: popl %ebp
; X32-NEXT: retl
;
; X64-LABEL: signbits_sext_v4i64_sitofp_v4f32:
; X64: # BB#0:
; X64-NEXT: vmovd %edi, %xmm0
; X64-NEXT: vpinsrd $1, %esi, %xmm0, %xmm0
; X64-NEXT: vpinsrd $2, %edx, %xmm0, %xmm0
; X64-NEXT: vpinsrd $3, %ecx, %xmm0, %xmm0
; X64-NEXT: vcvtdq2ps %xmm0, %xmm0
; X64-NEXT: retq
%1 = sext i8 %a0 to i64
%2 = sext i16 %a1 to i64
%3 = sext i32 %a2 to i64
%4 = sext i32 %a3 to i64
%5 = insertelement <4 x i64> undef, i64 %1, i32 0
%6 = insertelement <4 x i64> %5, i64 %2, i32 1
%7 = insertelement <4 x i64> %6, i64 %3, i32 2
%8 = insertelement <4 x i64> %7, i64 %4, i32 3
%9 = sitofp <4 x i64> %8 to <4 x float>
ret <4 x float> %9
}
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