summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/X86/avx512-fsel.ll
blob: a9b8914ee1fe619a06b6422472ccf9956b558f2a (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -O0 -mattr=+avx512f < %s | FileCheck %s

target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.11.0"

define i32 @test(float %a, float %b)  {
; CHECK-LABEL: test:
; CHECK:       ## BB#0:
; CHECK-NEXT:    pushq %rax
; CHECK-NEXT:  Lcfi0:
; CHECK-NEXT:    .cfi_def_cfa_offset 16
; CHECK-NEXT:    vucomiss %xmm1, %xmm0
; CHECK-NEXT:    setp %al
; CHECK-NEXT:    setne %cl
; CHECK-NEXT:    setnp %dl
; CHECK-NEXT:    sete %sil
; CHECK-NEXT:    andb %dl, %sil
; CHECK-NEXT:    ## implicit-def: %EDI
; CHECK-NEXT:    movb %sil, %dil
; CHECK-NEXT:    andl $1, %edi
; CHECK-NEXT:    kmovw %edi, %k0
; CHECK-NEXT:    orb %al, %cl
; CHECK-NEXT:    ## implicit-def: %EDI
; CHECK-NEXT:    movb %cl, %dil
; CHECK-NEXT:    andl $1, %edi
; CHECK-NEXT:    kmovw %edi, %k1
; CHECK-NEXT:    kmovw %k1, %edi
; CHECK-NEXT:    movb %dil, %al
; CHECK-NEXT:    testb $1, %al
; CHECK-NEXT:    kmovw %k0, {{[0-9]+}}(%rsp) ## 2-byte Spill
; CHECK-NEXT:    jne LBB0_1
; CHECK-NEXT:    jmp LBB0_2
; CHECK-NEXT:  LBB0_1: ## %L_0
; CHECK-NEXT:    callq ___assert_rtn
; CHECK-NEXT:  LBB0_2: ## %L_1
; CHECK-NEXT:    xorl %eax, %eax
; CHECK-NEXT:    popq %rcx
; CHECK-NEXT:    retq
  %x10 = fcmp oeq float %a, %b
  %x11 = xor i1 %x10, true
  br i1 %x11, label %L_0, label %L_1

L_0:                                     ; preds = %2
  call void @__assert_rtn()
  unreachable
                                                  ; No predecessors!
L_1:                                     ; preds = %2
  ret i32 0
}

; Function Attrs: noreturn
declare void @__assert_rtn()

OpenPOWER on IntegriCloud