summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/Mips/GlobalISel/legalizer/ceil_and_floor.mir
blob: f7e39f3885b3b5de04599b2e2a0b24fe9f1dc964 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64
--- |

  define void @ceil_f32() {entry: ret void}
  define void @ceil_f64() {entry: ret void}
  define void @floor_f32() {entry: ret void}
  define void @floor_f64() {entry: ret void}

...
---
name:            ceil_f32
alignment:       2
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $f12

    ; FP32-LABEL: name: ceil_f32
    ; FP32: liveins: $f12
    ; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
    ; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
    ; FP32: $f12 = COPY [[COPY]](s32)
    ; FP32: JAL &ceilf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12, implicit-def $f0
    ; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $f0
    ; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
    ; FP32: $f0 = COPY [[COPY1]](s32)
    ; FP32: RetRA implicit $f0
    ; FP64-LABEL: name: ceil_f32
    ; FP64: liveins: $f12
    ; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
    ; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
    ; FP64: $f12 = COPY [[COPY]](s32)
    ; FP64: JAL &ceilf, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $f12, implicit-def $f0
    ; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $f0
    ; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
    ; FP64: $f0 = COPY [[COPY1]](s32)
    ; FP64: RetRA implicit $f0
    %0:_(s32) = COPY $f12
    %1:_(s32) = G_FCEIL %0
    $f0 = COPY %1(s32)
    RetRA implicit $f0

...
---
name:            ceil_f64
alignment:       2
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $d6

    ; FP32-LABEL: name: ceil_f64
    ; FP32: liveins: $d6
    ; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
    ; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
    ; FP32: $d6 = COPY [[COPY]](s64)
    ; FP32: JAL &ceil, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6, implicit-def $d0
    ; FP32: [[COPY1:%[0-9]+]]:_(s64) = COPY $d0
    ; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
    ; FP32: $d0 = COPY [[COPY1]](s64)
    ; FP32: RetRA implicit $d0
    ; FP64-LABEL: name: ceil_f64
    ; FP64: liveins: $d6
    ; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
    ; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
    ; FP64: $d12_64 = COPY [[COPY]](s64)
    ; FP64: JAL &ceil, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $d12_64, implicit-def $d0_64
    ; FP64: [[COPY1:%[0-9]+]]:_(s64) = COPY $d0_64
    ; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
    ; FP64: $d0 = COPY [[COPY1]](s64)
    ; FP64: RetRA implicit $d0
    %0:_(s64) = COPY $d6
    %1:_(s64) = G_FCEIL %0
    $d0 = COPY %1(s64)
    RetRA implicit $d0

...
---
name:            floor_f32
alignment:       2
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $f12

    ; FP32-LABEL: name: floor_f32
    ; FP32: liveins: $f12
    ; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
    ; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
    ; FP32: $f12 = COPY [[COPY]](s32)
    ; FP32: JAL &floorf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12, implicit-def $f0
    ; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $f0
    ; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
    ; FP32: $f0 = COPY [[COPY1]](s32)
    ; FP32: RetRA implicit $f0
    ; FP64-LABEL: name: floor_f32
    ; FP64: liveins: $f12
    ; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
    ; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
    ; FP64: $f12 = COPY [[COPY]](s32)
    ; FP64: JAL &floorf, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $f12, implicit-def $f0
    ; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $f0
    ; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
    ; FP64: $f0 = COPY [[COPY1]](s32)
    ; FP64: RetRA implicit $f0
    %0:_(s32) = COPY $f12
    %1:_(s32) = G_FFLOOR %0
    $f0 = COPY %1(s32)
    RetRA implicit $f0

...
---
name:            floor_f64
alignment:       2
tracksRegLiveness: true
body:             |
  bb.1.entry:
    liveins: $d6

    ; FP32-LABEL: name: floor_f64
    ; FP32: liveins: $d6
    ; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
    ; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
    ; FP32: $d6 = COPY [[COPY]](s64)
    ; FP32: JAL &floor, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6, implicit-def $d0
    ; FP32: [[COPY1:%[0-9]+]]:_(s64) = COPY $d0
    ; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
    ; FP32: $d0 = COPY [[COPY1]](s64)
    ; FP32: RetRA implicit $d0
    ; FP64-LABEL: name: floor_f64
    ; FP64: liveins: $d6
    ; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
    ; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
    ; FP64: $d12_64 = COPY [[COPY]](s64)
    ; FP64: JAL &floor, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $d12_64, implicit-def $d0_64
    ; FP64: [[COPY1:%[0-9]+]]:_(s64) = COPY $d0_64
    ; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
    ; FP64: $d0 = COPY [[COPY1]](s64)
    ; FP64: RetRA implicit $d0
    %0:_(s64) = COPY $d6
    %1:_(s64) = G_FFLOOR %0
    $d0 = COPY %1(s64)
    RetRA implicit $d0

...
OpenPOWER on IntegriCloud