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|
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -relocation-model=pic -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
--- |
@val = global i32 0
@val_with_local_linkage = internal global i32 1
declare i32 @f(i32, i32)
define internal void @f_with_local_linkage() {entry: ret void}
define void @call_global() {entry: ret void}
define void @call_global_with_local_linkage() {entry: ret void}
define void @ret_global_int() {entry: ret void}
define void @ret_global_int_with_local_linkage() {entry: ret void}
...
---
name: f_with_local_linkage
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a1
; MIPS32-LABEL: name: f_with_local_linkage
; MIPS32: liveins: $a0, $a1
; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
; MIPS32: [[ADDu:%[0-9]+]]:gpr32 = ADDu [[COPY1]], [[COPY]]
; MIPS32: $v0 = COPY [[ADDu]]
; MIPS32: RetRA implicit $v0
%0:gprb(s32) = COPY $a0
%1:gprb(s32) = COPY $a1
%2:gprb(s32) = G_ADD %1, %0
$v0 = COPY %2(s32)
RetRA implicit $v0
...
---
name: call_global
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a1, $t9, $v0
; MIPS32-LABEL: name: call_global
; MIPS32: liveins: $a0, $a1, $t9, $v0, $t9, $v0
; MIPS32: [[ADDu:%[0-9]+]]:gpr32 = ADDu $v0, $t9
; MIPS32: [[ADDu1:%[0-9]+]]:gpr32 = ADDu $v0, $t9
; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[ADDu]], target-flags(mips-got-call) @f :: (load 4 from got)
; MIPS32: $a0 = COPY [[COPY]]
; MIPS32: $a1 = COPY [[COPY1]]
; MIPS32: $gp = COPY [[ADDu1]]
; MIPS32: JALRPseudo [[LW]], csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $gp, implicit-def $v0
; MIPS32: [[COPY2:%[0-9]+]]:gpr32 = COPY $v0
; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; MIPS32: $v0 = COPY [[COPY2]]
; MIPS32: RetRA implicit $v0
%4:gpr32 = ADDu $v0, $t9
%0:gprb(s32) = COPY $a0
%1:gprb(s32) = COPY $a1
ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
%3:gpr32(p0) = G_GLOBAL_VALUE target-flags(mips-got-call) @f
$a0 = COPY %0(s32)
$a1 = COPY %1(s32)
$gp = COPY %4
JALRPseudo %3(p0), csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $gp, implicit-def $v0
%2:gprb(s32) = COPY $v0
ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
$v0 = COPY %2(s32)
RetRA implicit $v0
...
---
name: call_global_with_local_linkage
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a1, $t9, $v0
; MIPS32-LABEL: name: call_global_with_local_linkage
; MIPS32: liveins: $a0, $a1, $t9, $v0, $t9, $v0
; MIPS32: [[ADDu:%[0-9]+]]:gpr32 = ADDu $v0, $t9
; MIPS32: [[ADDu1:%[0-9]+]]:gpr32 = ADDu $v0, $t9
; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[ADDu]], target-flags(mips-got) @f_with_local_linkage :: (load 4 from got)
; MIPS32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu [[LW]], target-flags(mips-abs-lo) @f_with_local_linkage
; MIPS32: $a0 = COPY [[COPY]]
; MIPS32: $a1 = COPY [[COPY1]]
; MIPS32: $gp = COPY [[ADDu1]]
; MIPS32: JALRPseudo [[ADDiu]], csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $gp, implicit-def $v0
; MIPS32: [[COPY2:%[0-9]+]]:gpr32 = COPY $v0
; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; MIPS32: $v0 = COPY [[COPY2]]
; MIPS32: RetRA implicit $v0
%4:gpr32 = ADDu $v0, $t9
%0:gprb(s32) = COPY $a0
%1:gprb(s32) = COPY $a1
ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
%3:gpr32(p0) = G_GLOBAL_VALUE @f_with_local_linkage
$a0 = COPY %0(s32)
$a1 = COPY %1(s32)
$gp = COPY %4
JALRPseudo %3(p0), csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $gp, implicit-def $v0
%2:gprb(s32) = COPY $v0
ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
$v0 = COPY %2(s32)
RetRA implicit $v0
...
---
name: ret_global_int
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: ret_global_int
; MIPS32: liveins: $t9, $v0
; MIPS32: [[ADDu:%[0-9]+]]:gpr32 = ADDu $v0, $t9
; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[ADDu]], target-flags(mips-got) @val :: (load 4 from got)
; MIPS32: [[LW1:%[0-9]+]]:gpr32 = LW [[LW]], 0 :: (load 4 from @val)
; MIPS32: $v0 = COPY [[LW1]]
; MIPS32: RetRA implicit $v0
%1:gprb(p0) = G_GLOBAL_VALUE @val
%0:gprb(s32) = G_LOAD %1(p0) :: (load 4 from @val)
$v0 = COPY %0(s32)
RetRA implicit $v0
...
---
name: ret_global_int_with_local_linkage
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: ret_global_int_with_local_linkage
; MIPS32: liveins: $t9, $v0
; MIPS32: [[ADDu:%[0-9]+]]:gpr32 = ADDu $v0, $t9
; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[ADDu]], target-flags(mips-got) @val_with_local_linkage :: (load 4 from got)
; MIPS32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu [[LW]], target-flags(mips-abs-lo) @val_with_local_linkage
; MIPS32: [[LW1:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (load 4 from @val_with_local_linkage)
; MIPS32: $v0 = COPY [[LW1]]
; MIPS32: RetRA implicit $v0
%1:gprb(p0) = G_GLOBAL_VALUE @val_with_local_linkage
%0:gprb(s32) = G_LOAD %1(p0) :: (load 4 from @val_with_local_linkage)
$v0 = COPY %0(s32)
RetRA implicit $v0
...
|
