llvm/test/CodeGen/MIR/X86/null-register-operands.mir


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# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
# This test ensures that the MIR parser parses null register operands correctly.

--- |

  define i32 @deref(i32* %p) {
  entry:
    %a = load i32, i32* %p
    ret i32 %a
  }

...
---
# CHECK: name: deref
name:            deref
body: |
  bb.0.entry:
    ; CHECK:      %eax = MOV32rm %rdi, 1, %noreg, 0, %noreg
    ; CHECK-NEXT: RETQ %eax
    %eax = MOV32rm %rdi, 1, _, 0, %noreg
    RETQ %eax
...