llvm/test/CodeGen/MIR/Hexagon/parse-lane-masks.mir


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# RUN: llc -march=hexagon -run-pass none -o - %s | FileCheck %s
# Check that the MIR parser can parse lane masks in block liveins.

# CHECK-LABEL: name: foo
# CHECK: bb.0:
# CHECK: liveins: %d0:0x00000002, %d1, %d2:0x00000010

--- |
  define void @foo() {
    ret void
  }
...

---
name: foo
tracksRegLiveness: true

body: |
  bb.0:
    liveins: %d0:0x00002, %d1, %d2:16
    A2_nop
...