llvm/test/CodeGen/Hexagon/vect/vect-mul-v4i8.ll


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; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s
; CHECK: vmpybu
; CHECK: vtrunehb

define <4 x i8> @t_i4x8(<4 x i8> %a, <4 x i8> %b) nounwind {
entry:
	%0 = mul <4 x i8> %a, %b
	ret <4 x i8> %0
}