summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/AVR/pseudo/expand-lddw-dst-src-same.mir
blob: 1fe7ce381483d5086fc7c85cbe2c53a8a201d9f5 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s

# This test ensures that the pseudo expander can correctly handle the case
# where we are expanding a 16-bit LDD instruction where the source and
# destination registers are the same.
#
# The instruction itself is earlyclobber and so ISel will never produce an
# instruction like this, but the stack slot loading can and will.

--- |
  target triple = "avr--"
  define void @test_lddw() {
  entry:
    ret void
  }
...

---
name:            test_lddw
registers:
  - { id: 0, class: _ }
body: |
  ; CHECK-LABEL: bb.0.entry
  bb.0.entry:

    ; CHECK-NEXT: early-clobber %r0 = LDDRdPtrQ %r29r28, 1
    ; CHECK-NEXT: PUSHRr %r0, implicit-def %sp, implicit %sp
    ; CHECK-NEXT: early-clobber %r0 = LDDRdPtrQ %r29r28, 2
    ; CHECK-NEXT: MOVRdRr %r29, %r0
    ; CHECK-NEXT: POPRd %r28, implicit-def %sp, implicit %sp

    early-clobber %r29r28 = LDDWRdYQ %r29r28, 1
...
OpenPOWER on IntegriCloud