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path: root/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-ext-legalizer.mir
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck %s

---
name: test_sext_trunc_i64_i32_i64
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; CHECK-LABEL: name: test_sext_trunc_i64_i32_i64
    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
    ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY [[COPY]](s64)
    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
    ; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY1]], [[C]](s32)
    ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C]](s32)
    ; CHECK: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[COPY2]](s32)
    ; CHECK: $vgpr0_vgpr1 = COPY [[ASHR]](s64)
    %0:_(s64) = COPY $vgpr0_vgpr1
    %1:_(s32) = G_TRUNC %0
    %2:_(s64) = G_SEXT %1
    $vgpr0_vgpr1 = COPY %2
...

---
name: test_zext_trunc_i64_i32_i64
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; CHECK-LABEL: name: test_zext_trunc_i64_i32_i64
    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
    ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295
    ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY [[COPY]](s64)
    ; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]
    ; CHECK: $vgpr0_vgpr1 = COPY [[AND]](s64)
    %0:_(s64) = COPY $vgpr0_vgpr1
    %1:_(s32) = G_TRUNC %0
    %2:_(s64) = G_ZEXT %1
    $vgpr0_vgpr1 = COPY %2
...
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