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* [mlir] NFC: Rename index_t to index_typeRainer Orth2020-03-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | mlir currently fails to build on Solaris: /vol/llvm/src/llvm-project/dist/mlir/lib/Conversion/VectorToLoops/ConvertVectorToLoops.cpp:78:20: error: reference to 'index_t' is ambiguous IndexHandle zero(index_t(0)), one(index_t(1)); ^ /usr/include/sys/types.h:103:16: note: candidate found by name lookup is 'index_t' typedef short index_t; ^ /vol/llvm/src/llvm-project/dist/mlir/include/mlir/EDSC/Builders.h:27:8: note: candidate found by name lookup is 'mlir::edsc::index_t' struct index_t { ^ and many more. Given that POSIX reserves all identifiers ending in `_t` 2.2.2 The Name Space <https://pubs.opengroup.org/onlinepubs/9699919799/functions/V2_chap02.html>, it seems quite unwise to use such identifiers in user code, even more so without a distinguished prefix. The following patch fixes this by renaming `index_t` to `index_type`. cases. Tested on `amd64-pc-solaris2.11` and `sparcv9-sun-solaris2.11`. Differential Revision: https://reviews.llvm.org/D72619 (cherry picked from commit 002ec79f979b9da9dedafe7ea036e00c90a9fbb7)
* Revert "[mlir] Create a gpu.module operation for the GPU Dialect."Benjamin Kramer2020-01-167-75/+79
| | | | | | | This reverts commit 4624a1e8ac8a3f69cc887403b976f538f587744a. Causing problems downstream. (cherry picked from commit 0133cc60e4e230ee2c176c23eff5aa2f4ee17a75)
* [mlir][spirv] Properly support SPIR-V conversion targetLei Zhang2020-01-142-13/+14
| | | | | | | | | | | | | | | | This commit defines a new SPIR-V dialect attribute for specifying a SPIR-V target environment. It is a dictionary attribute containing the SPIR-V version, supported extension list, and allowed capability list. A SPIRVConversionTarget subclass is created to take in the target environment and sets proper dynmaically legal ops by querying the op availability interface of SPIR-V ops to make sure they are available in the specified target environment. All existing conversions targeting SPIR-V is changed to use this SPIRVConversionTarget. It probes whether the input IR has a `spv.target_env` attribute, otherwise, it uses the default target environment: SPIR-V 1.0 with Shader capability and no extra extensions. Differential Revision: https://reviews.llvm.org/D72256
* Make helper functions static or move them into anonymous namespaces. NFC.Benjamin Kramer2020-01-144-21/+34
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* [mlir] Create a gpu.module operation for the GPU Dialect.Tres Popp2020-01-147-79/+75
| | | | | | | | | | | | | | | | | Summary: This is based on the use of code constantly checking for an attribute on a model and instead represents the distinct operaion with a different op. Instead, this op can be used to provide better filtering. Reviewers: herhut, mravishankar, antiagainst, rriddle Reviewed By: herhut, antiagainst, rriddle Subscribers: liufengdb, aartbik, jholewinski, mgorny, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, csigg, arpith-jacob, mgester, lucyrfox, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72336
* Unbreak the mlir build after 202ab273e6eca134b69882f100c666fcd3affbcfBenjamin Kramer2020-01-132-2/+2
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* [mlir] Added missing GPU lowering ops.Julian Gross2020-01-132-2/+16
| | | | | | | | | | | Summary: This diff adds missing GPU lowering ops to MLIR. Reviewers: herhut, pifon2a, ftynse Tags: #pre-merge_beta_testing, #llvm Differential Revision: https://reviews.llvm.org/D72439
* [mlir] NFC: Remove Value::operator* and Value::operator-> now that Value is ↵River Riddle2020-01-1110-67/+66
| | | | | | | | | | properly value-typed. Summary: These were temporary methods used to simplify the transition. Reviewed By: antiagainst Differential Revision: https://reviews.llvm.org/D72548
* [mlir] add a missing dependency for Linalg conversionEric Schweitz2020-01-091-0/+1
| | | | | | | We were seeing some occasional build failures that would come and go. It appeared to be this missing dependence. Differential Revision: https://reviews.llvm.org/D72419
* [mlir][VectorOps] Implement insert_strided_slice conversionNicolas Vasilache2020-01-091-41/+174
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This diff implements the progressive lowering of insert_strided_slice. Two cases appear: 1. when the source and dest vectors have different ranks, extract the dest subvector at the proper offset and reduce to case 2. 2. when they have the same rank N: a. if the source and dest type are the same, the insertion is trivial: just forward the source b. otherwise, iterate over all N-1 D subvectors and create an extract/insert_strided_slice/insert replacement, reducing the problem to vecotrs of the same N-1 rank. This combines properly with the other conversion patterns to lower all the way to LLVM. Reviewers: ftynse, rriddle, AlexEichenberger, andydavis1, tetuante, nicolasvasilache Reviewed By: andydavis1 Subscribers: merge_guards_bot, mehdi_amini, jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72317
* [mlir][VectorOps] Implement strided_slice conversionNicolas Vasilache2020-01-091-3/+98
| | | | | | | | | | | | | | | | | | | | | Summary: This diff implements the progressive lowering of strided_slice to either: 1. extractelement + insertelement for the 1-D case 2. extract + optional strided_slice + insert for the n-D case. This combines properly with the other conversion patterns to lower all the way to LLVM. Appropriate tests are added. Reviewers: ftynse, rriddle, AlexEichenberger, andydavis1, tetuante Reviewed By: andydavis1 Subscribers: merge_guards_bot, mehdi_amini, jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72310
* [mlir][Linalg] Lower linalg.reshape to LLVM for the static caseNicolas Vasilache2020-01-081-2/+50
| | | | | | | | | | | | | | | | | | | | | | Summary: This diff adds lowering of the linalg.reshape op to LLVM. A new descriptor is created with fields initialized as follows: 1. allocatedPTr, alignedPtr and offset are copied from the source descriptor 2. sizes are copied from the static destination shape 3. strides are copied from the static strides collected with `getStridesAndOffset` Only the static case in which the target view conforms to strided memref semantics is supported. Other cases are left for future work and will be added on a per-need basis. Reviewers: ftynse, mravishankar Subscribers: mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72316
* [mlir][spirv] Add lowering for std.fpext, std.fptrunc, std.sitofp.Denis Khalikov2020-01-071-0/+8
| | | | Differential Revision: https://reviews.llvm.org/D72137
* Revert "[mlir][spirv] Add lowering for std.fpext, std.fptrunc, std.sitofp."Lei Zhang2020-01-071-8/+0
| | | | | This reverts commit 7e7f849a6d94f77f1a29630419acb7226051f4b6 because it recorded the wrong commit author.
* [mlir][spirv] Add lowering for std cmp ops.Denis Khalikov2020-01-071-4/+55
| | | | Differential Revision: https://reviews.llvm.org/D72296
* [mlir][spirv] Add lowering for standard bit opsDenis Khalikov2020-01-071-0/+8
| | | | Differential Revision: https://reviews.llvm.org/D72205
* [mlir][spirv] Add lowering for std.fpext, std.fptrunc, std.sitofp.Lei Zhang2020-01-071-0/+8
| | | | Differential Revision: https://reviews.llvm.org/D72137
* [mlir][Linalg] Extend generic ops to allow tensorsNicolas Vasilache2020-01-021-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This diff adds support to allow `linalg.generic` and `linalg.indexed_generic` to take tensor input and output arguments. The subset of output tensor operand types must appear verbatim in the result types after an arrow. The parser, printer and verifier are extended to accomodate this behavior. The Linalg operations now support variadic ranked tensor return values. This extension exhibited issues with the current handling of NativeCall in RewriterGen.cpp. As a consequence, an explicit cast to `SmallVector<Value, 4>` is added in the proper place to support the new behavior (better suggestions are welcome). Relevant cleanups and name uniformization are applied. Relevant invalid and roundtrip test are added. Reviewers: mehdi_amini, rriddle, jpienaar, antiagainst, ftynse Subscribers: burmako, shauheen, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72022
* [mlir] Fix -Wrange-loo-analysis warningsFangrui Song2020-01-011-2/+2
| | | | | | | | | | | | for (const auto &x : llvm::zip(..., ...)) -> for (auto x : llvm::zip(..., ...)) The return type of zip() is a wrapper that wraps a tuple of references. > warning: loop variable 'p' is always a copy because the range of type 'detail::zippy<detail::zip_shortest, ArrayRef<long> &, ArrayRef<long> &>' does not return a reference [-Wrange-loop-analysis]
* [mlir] Fix the wrong computation of dynamic strides for lowering AllocOp to LLVMTung Le Duc2019-12-281-4/+5
| | | | | Leftover change from before the MLIR merge, reviewed at accepted at https://github.com/tensorflow/mlir/pull/338.
* [mlir] Convert std.and/std.or ops to spv.LogicalAnd/spv.LogicalOrMaheshRavishankar2019-12-271-7/+9
| | | | | | | | | The conversion from std.and/std.or to spv.LogicalAnd/spv.LogicalOr is only valid for boolean (i1) types. Modify BinaryOpPattern in StandardToSPIRV.td to allow limiting the type of the operands for which the pattern is applied. Differential Revision: https://reviews.llvm.org/D71881
* Refactor the way that pass options are specified.River Riddle2019-12-231-16/+10
| | | | | | | | | This change refactors pass options to be more similar to how statistics are modeled. More specifically, the options are specified directly on the pass instead of in a separate options class. (Note that the behavior and specification for pass pipelines remains the same.) This brings about several benefits: * The specification of options is much simpler * The round-trip format of a pass can be generated automatically * This gives a somewhat deeper integration with "configuring" a pass, which we could potentially expose to users in the future. PiperOrigin-RevId: 286953824
* NFC: Replace ValuePtr with Value and remove it now that Value is value-typed.River Riddle2019-12-2315-562/+535
| | | | | | ValuePtr was a temporary typedef during the transition to a value-typed Value. PiperOrigin-RevId: 286945714
* Change the `notifyRootUpdated` API to be transaction based.River Riddle2019-12-231-7/+6
| | | | | | This means that in-place, or root, updates need to use explicit calls to `startRootUpdate`, `finalizeRootUpdate`, and `cancelRootUpdate`. The major benefit of this change is that it enables in-place updates in DialectConversion, which simplifies the FuncOp pattern for example. The major downside to this is that the cases that *may* modify an operation in-place will need an explicit cancel on the failure branches(assuming that they started an update before attempting the transformation). PiperOrigin-RevId: 286933674
* Adjust License.txt file to use the LLVM licenseMehdi Amini2019-12-2320-260/+80
| | | | PiperOrigin-RevId: 286906740
* NFC: Introduce new ValuePtr/ValueRef typedefs to simplify the transition to ↵River Riddle2019-12-2215-542/+557
| | | | | | | | | | Value being value-typed. This is an initial step to refactoring the representation of OpResult as proposed in: https://groups.google.com/a/tensorflow.org/g/mlir/c/XXzzKhqqF_0/m/v6bKb08WCgAJ This change will make it much simpler to incrementally transition all of the existing code to use value-typed semantics. PiperOrigin-RevId: 286844725
* Add integer bit-shift operations to the standard dialect.Manuel Freiberger2019-12-224-14/+33
| | | | | | | | | | | | | | | | | | | Rename the 'shlis' operation in the standard dialect to 'shift_left'. Add tests for this operation (these have been missing so far) and add a lowering to the 'shl' operation in the LLVM dialect. Add also 'shift_right_signed' (lowered to LLVM's 'ashr') and 'shift_right_unsigned' (lowered to 'lshr'). The original plan was to name these operations 'shift.left', 'shift.right.signed' and 'shift.right.unsigned'. This works if the operations are prefixed with 'std.' in MLIR assembly. Unfortunately during import the short form is ambigous with operations from a hypothetical 'shift' dialect. The best solution seems to omit dots in standard operations for now. Closes tensorflow/mlir#226 PiperOrigin-RevId: 286803388
* [VectorOps] unify vector dialect "subscripts"Aart Bik2019-12-201-4/+4
| | | | PiperOrigin-RevId: 286650682
* Add gpu.shuffle op.Christian Sigg2019-12-201-2/+60
| | | | | | | | This will allow us to lower most of gpu.all_reduce (when all_reduce doesn't exist in the target dialect) within the GPU dialect, and only do target-specific lowering for the shuffle op. PiperOrigin-RevId: 286548256
* Move the specializations of VectorTransferRewriter::matchAndRewrite back ↵River Riddle2019-12-181-80/+80
| | | | | | | | into the anonymous namespace. This appeases the GCC bug related to specializations in a different namespace. PiperOrigin-RevId: 286234667
* Added LLVM ops and lowering phases from standard dialect for FAbs, FCeil, ↵Marcel Koester2019-12-181-0/+21
| | | | | | | | | | | Cos, FNeg, CopySign. Added test cases for the newly added LLVM operations and lowering features. Closes tensorflow/mlir#300 COPYBARA_INTEGRATE_REVIEW=https://github.com/tensorflow/mlir/pull/300 from dfki-jugr:std_to_llvm da6168bbc1a369ae2e99ad3881fdddd82f075dd4 PiperOrigin-RevId: 286231169
* [VectorOps] Add vector.print definition, with lowering supportAart Bik2019-12-181-2/+124
| | | | | | | | | | | | | | | | Examples: vector.print %f : f32 vector.print %x : vector<4xf32> vector.print %y : vector<3x4xf32> vector.print %z : vector<2x3x4xf32> LLVM lowering replaces these with fully unrolled calls into a small runtime support library that provides some basic printing operations (single value, opening closing bracket, comma, newline). PiperOrigin-RevId: 286230325
* NFC: Cleanup non-conforming usages of namespaces.River Riddle2019-12-182-13/+13
| | | | | | | * Fixes use of anonymous namespace for static methods. * Uses explicit qualifiers(mlir::) instead of wrapping the definition with the namespace. PiperOrigin-RevId: 286222654
* Introduce prefetch op: affine -> std -> llvm intrinsicUday Bondhugula2019-12-182-8/+65
| | | | | | | | | | | | | | | | | | | Introduce affine.prefetch: op to prefetch using a multi-dimensional subscript on a memref; similar to affine.load but has no effect on semantics, but only on performance. Provide lowering through std.prefetch, llvm.prefetch and map to llvm's prefetch instrinsic. All attributes reflected through the lowering - locality hint, rw, and instr/data cache. affine.prefetch %0[%i, %j + 5], false, 3, true : memref<400x400xi32> Signed-off-by: Uday Bondhugula <uday@polymagelabs.com> Closes tensorflow/mlir#225 COPYBARA_INTEGRATE_REVIEW=https://github.com/tensorflow/mlir/pull/225 from bondhugula:prefetch 4c3b4e93bc64d9a5719504e6d6e1657818a2ead0 PiperOrigin-RevId: 286212997
* NFC: Remove unnecessary 'llvm::' prefix from uses of llvm symbols declared ↵River Riddle2019-12-184-18/+16
| | | | | | | | in `mlir` namespace. Aside from being cleaner, this also makes the codebase more consistent. PiperOrigin-RevId: 286206974
* Harden the requirements to memory attribution types in gpu.funcAlex Zinenko2019-12-181-2/+25
| | | | | | | | | | When memory attributions are present in `gpu.func`, require that they are of memref type and live in memoryspaces 3 and 5 for workgroup and private memory attributions, respectively. Adapt the conversion from the GPU dialect to the NVVM dialect to drop the private memory space from attributions as NVVM is able to model them as local `llvm.alloca`s in the default memory space. PiperOrigin-RevId: 286161763
* NFC: Use TypeSwitch to simplify existing code.River Riddle2019-12-171-19/+14
| | | | PiperOrigin-RevId: 286066371
* Make it possible to override the lowering of MemRef to the LLVM dialect. NFC.Alex Zinenko2019-12-171-12/+25
| | | | | | | | | | | | | The lowering of MemRef types to the LLVM dialect is connected to the underlying runtime representation of structured memory buffers. It has changed several times in the past and reached the current state of a LLVM structured-typed descriptor containing two pointers and all sizes. In several reported use cases, a different, often simpler, lowering scheme is required. For example, lowering statically-shaped memrefs to bare LLVM pointers to simplify aliasing annotation. Split the pattern population functions into those include memref-related operations and the remaining ones. Users are expected to extend TypeConverter::convertType to handle the memref types differently. PiperOrigin-RevId: 286030610
* StdToLLVM conversion: drop getMemRefElementType utility functionAlex Zinenko2019-12-171-12/+1
| | | | | | | | This function has become redundant with MemRefDescriptor::getElementType and is no longer necessary. Use the MemRefDescriptor pervasively to concentrate descriptor-related logic in one place and drop the utility function. PiperOrigin-RevId: 286024168
* Add atomic operations to SPIR-V dialect.Mahesh Ravishankar2019-12-161-2/+3
| | | | | | | Some changes to the dialect generation script to allow specification of different base class to derive from in ODS. PiperOrigin-RevId: 285859230
* Plug gpu.func into the GPU lowering pipelinesAlex Zinenko2019-12-162-13/+119
| | | | | | | | | | | | | | This updates the lowering pipelines from the GPU dialect to lower-level dialects (NVVM, SPIRV) to use the recently introduced gpu.func operation instead of a standard function annotated with an attribute. In particular, the kernel outlining is updated to produce gpu.func instead of std.func and the individual conversions are updated to consume gpu.funcs and disallow standard funcs after legalization, if necessary. The attribute "gpu.kernel" is preserved in the generic syntax, but can also be used with the custom syntax on gpu.funcs. The special kind of function for GPU allows one to use additional features such as memory attribution. PiperOrigin-RevId: 285822272
* Make "LowerToCFG" an operation passAlex Zinenko2019-12-161-5/+5
| | | | | | | | | The conversion from the Loops dialect to the Standard dialect, also known as loop-to-cfg lowering, has been historically a function pass. It can be required on non-Standard function Ops, in particular the recently introduced GPU functions. Make the conversion an operation pass instead of a function pass. PiperOrigin-RevId: 285814560
* [VectorOps] Add [insert/extract]element definition together with lowering to ↵Aart Bik2019-12-161-1/+52
| | | | | | | | | | | | | | LLVM Similar to insert/extract vector instructions but (1) work on 1-D vectors only (2) allow for a dynamic index %c3 = constant 3 : index %0 = vector.insertelement %arg0, %arg1[%c : index] : vector<4xf32> %1 = vector.extractelement %arg0[%c3 : index] : vector<4xf32> PiperOrigin-RevId: 285792205
* Make memref promotion during std->LLVM lowering the default calling conventionAlex Zinenko2019-12-161-29/+17
| | | | | | | | | | | | | | | During the conversion from the standard dialect to the LLVM dialect, memref-typed arguments are promoted from registers to memory and passed into functions by pointer. This had been introduced into the lowering to work around the abesnce of calling convention modeling in MLIR to enable better interoperability with LLVM IR generated from C, and has been exerciced for several months. Make this promotion the default calling covention when converting to the LLVM dialect. This adds the documentation, simplifies the code and makes the conversion consistent across function operations and function types used in other places, e.g. in high-order functions or attributes, which would not follow the same rule previously. PiperOrigin-RevId: 285751280
* Add a layer of EDSC for linalg.GenericOpNicolas Vasilache2019-12-131-3/+4
| | | | | | | | This will be evolved into a simple programming model for custom ops and custom layers in followup CLs. This CL also deletes the obsolete tablegen's reference-impl.td that was using EDSCs. PiperOrigin-RevId: 285459545
* Fix maskAndClamp in gpu.all_reduce.Christian Sigg2019-12-131-2/+5
| | | | | | The clamp value determines the returned predicate. Previously, the clamp value was fixed to 31 and the predicate was therefore always true. This is incorrect for partial warp reductions, but went unnoticed because the returned values happened to be zero (but it could be anything). PiperOrigin-RevId: 285343160
* [VectorOps] Add lowering of vector.shuffle to LLVM IRAart Bik2019-12-121-55/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | For example, a shuffle %1 = vector.shuffle %arg0, %arg1 [0 : i32, 1 : i32] : vector<2xf32>, vector<2xf32> becomes a direct LLVM shuffle 0 = llvm.shufflevector %arg0, %arg1 [0 : i32, 1 : i32] : !llvm<"<2 x float>">, !llvm<"<2 x float>"> but %1 = vector.shuffle %a, %b[1 : i32, 0 : i32, 2: i32] : vector<1x4xf32>, vector<2x4xf32> becomes the more elaborate (note the index permutation that drives argument selection for the extract operations) %0 = llvm.mlir.undef : !llvm<"[3 x <4 x float>]"> %1 = llvm.extractvalue %arg1[0] : !llvm<"[2 x <4 x float>]"> %2 = llvm.insertvalue %1, %0[0] : !llvm<"[3 x <4 x float>]"> %3 = llvm.extractvalue %arg0[0] : !llvm<"[1 x <4 x float>]"> %4 = llvm.insertvalue %3, %2[1] : !llvm<"[3 x <4 x float>]"> %5 = llvm.extractvalue %arg1[1] : !llvm<"[2 x <4 x float>]"> %6 = llvm.insertvalue %5, %4[2] : !llvm<"[3 x <4 x float>]"> PiperOrigin-RevId: 285268164
* Retire !linalg.buffer type - NFCNicolas Vasilache2019-12-121-18/+3
| | | | | | This type is not used anymore now that Linalg view and subview have graduated to std and that alignment is supported on alloc. PiperOrigin-RevId: 285213424
* Added lowering of `std.tanh` to llvm function call to `tanh` and `tanhf`.Ehsan Toosi2019-12-121-0/+51
| | | | | | | Closes tensorflow/mlir#312 COPYBARA_INTEGRATE_REVIEW=https://github.com/tensorflow/mlir/pull/312 from dfki-ehna:tanh 9e89b072ff91ff390ad739501745114feb3ac856 PiperOrigin-RevId: 285205674
* Automated rollback of commit f68ac464d818629e0fe10c23b44ac782d64a12d2Christian Sigg2019-12-121-2/+2
| | | | PiperOrigin-RevId: 285162061
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