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path: root/mlir/lib/Analysis/LoopAnalysis.cpp
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* Begin the process of fully removing OperationInst. This patch cleans up refer...River Riddle2019-03-291-26/+19
* Fold the functionality of OperationInst into Instruction. OperationInst still...River Riddle2019-03-291-1/+1
* Define the AffineForOp and replace ForInst with it. This patch is largely mec...River Riddle2019-03-291-35/+40
* Address Performance issue in NestedMatcherNicolas Vasilache2019-03-291-5/+9
* Recommit: Define a AffineOps dialect as well as an AffineIfOp operation. Repl...River Riddle2019-03-291-0/+11
* Automated rollback of changelist 231318632.Nicolas Vasilache2019-03-291-11/+0
* Define a AffineOps dialect as well as an AffineIfOp operation. Replace all in...River Riddle2019-03-291-0/+11
* Change AffineApplyOp to produce a single result, simplifying the code thatChris Lattner2019-03-291-11/+1
* Change the ForInst induction variable to be a block argument of the body inst...River Riddle2019-03-291-3/+5
* Cleanup resource management and rename recursive matchersNicolas Vasilache2019-03-291-1/+1
* Standardize naming of statements -> instructions, revisting the code base to beChris Lattner2019-03-291-51/+50
* Rename BasicBlock and StmtBlock to Block, and make a pass cleaning it up. I ...Chris Lattner2019-03-291-3/+3
* Rename BBArgument -> BlockArgument, Op::getOperation -> Op::getInst(),Chris Lattner2019-03-291-2/+2
* Merge Operation into OperationInst and standardize nomenclature aroundChris Lattner2019-03-291-7/+7
* Merge SSAValue, CFGValue, and MLValue together into a single Value class, whichChris Lattner2019-03-291-11/+11
* LoopAnalysis: isContiguousAccess fail gracefullyAlex Zinenko2019-03-291-3/+6
* Refactor ForStmt: having it contain a StmtBlock instead of subclassingChris Lattner2019-03-291-4/+5
* Extract vector_transfer_* Ops into a SuperVectorDialect.Alex Zinenko2019-03-291-1/+1
* [MLIR] Remove NYI assertions in LoopAnalysis.cppNicolas Vasilache2019-03-291-9/+18
* [MLIR] Add support for permutation_mapNicolas Vasilache2019-03-291-38/+67
* [MLIR] Add VectorTransferOpsNicolas Vasilache2019-03-291-1/+2
* [MLIR][VectorAnalysis] Add a VectorAnalysis and standalone testsNicolas Vasilache2019-03-291-3/+2
* [MLIR] Support for vectorizing operations.Nicolas Vasilache2019-03-291-0/+15
* [MLIR] Make upper bound implementation exclusiveNicolas Vasilache2019-03-291-4/+4
* [MLIR] Extend vectorization to 2+-D patternsNicolas Vasilache2019-03-291-8/+30
* Implement value type abstraction for types.River Riddle2019-03-291-8/+8
* [MLIR] Implement 1-D vectorization for fastest varying load/storesNicolas Vasilache2019-03-291-32/+58
* Add getMemRefType() accessors to LoadOp/StoreOp.Uday Bondhugula2019-03-291-1/+1
* Rename Operation::getAs to Operation::dyn_castFeng Liu2019-03-291-3/+3
* Generalize / improve DMA transfer overlap; nested and multiple DMA support; r...Uday Bondhugula2019-03-291-3/+34
* [MLIR] Basic infrastructure for vectorization testNicolas Vasilache2019-03-291-0/+84
* [MLIR] AffineMap value typeNicolas Vasilache2019-03-291-7/+7
* [MLIR] Sketch AffineExpr value typeNicolas Vasilache2019-03-291-4/+4
* [MLIR] AffineExpr final cleanupsNicolas Vasilache2019-03-291-6/+6
* [MLIR] Cleanup AffineExprNicolas Vasilache2019-03-291-3/+3
* [MLIR] Value types for AffineXXXExprNicolas Vasilache2019-03-291-3/+6
* [MLIR] Templated AffineExprBaseRefNicolas Vasilache2019-03-291-8/+7
* [MLIR] Remove uses of AffineExpr* outside of IRNicolas Vasilache2019-03-291-17/+14
* Fix MLIR's floordiv, ceildiv, and mod for constant inputs (for negative lhs's)Uday Bondhugula2019-03-291-4/+3
* Change loop step to be a positive integral constantUday Bondhugula2019-03-291-3/+2
* Extend loop unroll/unroll-and-jam to affine bounds + refactor related code.Uday Bondhugula2019-03-291-20/+10
* Extend getConstantTripCount to deal with a larger subset of loop bounds; make...Uday Bondhugula2019-03-291-0/+128
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