summaryrefslogtreecommitdiffstats
path: root/llvm
Commit message (Collapse)AuthorAgeFilesLines
...
* Fix test failures caused by my so_reg refactoring.Owen Anderson2011-07-221-2/+2
| | | | llvm-svn: 135785
* ARM assembly parsing and encoding for SMC instruction.Jim Grosbach2011-07-223-3/+12
| | | | llvm-svn: 135782
* Clean up a few more comments.Jim Grosbach2011-07-221-5/+5
| | | | | | | These instruction definitions are for the assembler, too, not just the disassembler. llvm-svn: 135781
* ARM encoding and assembly parsing tests.Jim Grosbach2011-07-221-0/+47
| | | | | | Add tests for SHADD8, SHADD16, SHASX, SHSUB8, and SHSUB16. llvm-svn: 135780
* Tidy up.Jim Grosbach2011-07-221-2/+1
| | | | llvm-svn: 135779
* Thumb assembly support for SETEND instruction.Jim Grosbach2011-07-222-16/+11
| | | | llvm-svn: 135778
* Tidy up.Jim Grosbach2011-07-221-1/+1
| | | | llvm-svn: 135777
* ARM assembly parsing and encoding for SETEND instruction.Jim Grosbach2011-07-224-6/+78
| | | | | | | Add parsing and diagnostics for malformed inputs. Tests for diagnostics and for correct encodings. llvm-svn: 135776
* ARM assembly parsing and encoding tests for SEL instruction.Jim Grosbach2011-07-221-0/+10
| | | | llvm-svn: 135772
* Tidy up.Jim Grosbach2011-07-221-6/+2
| | | | llvm-svn: 135771
* Remove unused variables.Benjamin Kramer2011-07-221-4/+0
| | | | llvm-svn: 135768
* Fix more MSVC warnings caused by a cases I missed when convertingJay Foad2011-07-222-2/+2
| | | | | | ConstantExpr::getGetElementPtr to use ArrayRef. llvm-svn: 135762
* Convert IRBuilder::CreateGEP and IRBuilder::CreateInBoundsGEP to useJay Foad2011-07-229-54/+42
| | | | | | ArrayRef. llvm-svn: 135761
* Move TargetRegistry.cpp from lib/Support to lib/Target where it belongs.Chandler Carruth2011-07-224-17/+17
| | | | | | | | | | | | | | The header file was already properly located. The previous need for it in Support had to do with the version string printing which was fixed in r135757. Also update build dependencies where libraries that needed the functionality of the Target library (in the form of the TargetRegistry) were picking it up via Support. This is pretty pervasive, essentially every TargetInfo library (ARMInfo, etc) uses TargetRegistry, making it depend on Target. All of these were previously just sneaking by. llvm-svn: 135760
* Update the CMake library dependencies. These shifts are the result ofChandler Carruth2011-07-221-3/+3
| | | | | | | | | Evan's recent refactorings (I believe). Specifically, MCDisassembler no longer depends on Target, and ARMDisassembler no longer depends on CodeGen. The added dependencies from ARMAsmParser to ARMDesc looks correct based on header file inclusion. llvm-svn: 135759
* Fix an MSVC warning, caused by a case I missed when convertingJay Foad2011-07-221-1/+1
| | | | | | ConstantExpr::getGetElementPtr to use ArrayRef. llvm-svn: 135758
* Move the registered target printing in version strings completely out ofChandler Carruth2011-07-224-7/+13
| | | | | | | | | | | | | | | | | the Support library. Now its part of the TargetRegistry, and the three commands that care about this explicitly register this extra bit of version information. The set of commands which care was computed by intersecting those which use the Support library's version string printing and those that initialize all the registered targets in a way that produces a meaningful list. The only odd ball out is that 'clang -cc1as -version' no longer prints the registered targets. I don't think anyone is really interested in that (especially as the fact that llvm-mc does so is under a FIXME), but if someone really does want this back I'll happily apply the same patch there. llvm-svn: 135757
* Move the logic for printing the registered targets into a staticChandler Carruth2011-07-223-26/+39
| | | | | | | function on the TargetRegistry. Also clean it up and use the modern LLVM utility libraries available instead of rolling a few things manually. llvm-svn: 135756
* Add an extension point to the CommandLine library where clients canChandler Carruth2011-07-222-3/+31
| | | | | | | | | | | | register extra version information to be printed. This is designed to allow those tools which link in various targets to also print those registered targets under --version. Currently this printing logic is embedded into the Support library directly; a huge layering violation. This is the first step to hoisting it out into the tools without adding lots of duplicated code. llvm-svn: 135755
* lib/Support/Triple.cpp: Recognize "-march=ppc32" to llc properly, as quick hack.NAKAMURA Takumi2011-07-221-0/+2
| | | | | FIXME: There is an inconsistency. llvm::Triple does not understand "ppc32" and PowerPC/TargetInfo holds "ppc32". llvm-svn: 135745
* Some LangRef tweaks, per Dan's comments.Eli Friedman2011-07-221-13/+16
| | | | llvm-svn: 135744
* Allow getBlockFreq to return 0.Jakub Staszak2011-07-225-20/+19
| | | | llvm-svn: 135742
* GCC complains about the angle of this line.Benjamin Kramer2011-07-221-1/+1
| | | | | | Remove the escaped newline. llvm-svn: 135739
* Revert patch which broke some IfConversion tests.Jakub Staszak2011-07-221-10/+29
| | | | llvm-svn: 135738
* Teach tblgen to emit MCRegisterClasses.Benjamin Kramer2011-07-224-8/+92
| | | | | | - This currently introduces more instances of the static DenseSet dtor, but that should be fixable. llvm-svn: 135735
* Fix typo in #include which revealed in the case-sensitive filesystem.Jakub Staszak2011-07-221-1/+1
| | | | llvm-svn: 135734
* Remove the 128-bit special handling from SCALAR_TO_VECTOR. This isn'tBruno Cardoso Lopes2011-07-221-18/+0
| | | | | | | | the way to go. Doing this here will prevent several node matches later, and would have to force looking all the way through several VINSERTF128/VEXTRACTF128 chains to optimize simple things. llvm-svn: 135730
* -Inspected a AVX code block added by someone in early Feb. This was never usedBruno Cardoso Lopes2011-07-224-78/+27
| | | | | | | | | | | | | | | | and was actually very wrong, fix it and make it simpler. Also remove the ConcatVectors function, which is unused now. - Fix a introduction of useless nodes in r126664 and r126264. The VUNPCKL* should never be introduced cause we don't want duplicate nodes for 128 AVX and non-AVX modes, the actual instruction difference only exists during isel, but not for target specific DAG nodes. We only introduce V* target nodes when there is no 128-bit version already there. - Fix a fragile test and make it more useful. llvm-svn: 135729
* Although we already support this, add testcases for consistencyBruno Cardoso Lopes2011-07-221-0/+21
| | | | llvm-svn: 135728
* Add a DAGCombine for transforming 128->256 casts into a simpleBruno Cardoso Lopes2011-07-222-7/+87
| | | | | | vxorps + vinsertf128 pair of instructions llvm-svn: 135727
* Introduce a new function to lower 256-bit vectors which are notBruno Cardoso Lopes2011-07-221-0/+14
| | | | | | | direclty supported and should be promoted and handled by smaller shuffles llvm-svn: 135726
* Rename function to be more specific and be more strict about its usageBruno Cardoso Lopes2011-07-221-6/+9
| | | | llvm-svn: 135725
* Use MachineBranchProbabilityInfo instead of MachineLoopInfo in IfConversion.Jakub Staszak2011-07-211-29/+10
| | | | llvm-svn: 135724
* Get rid of the extraneous GPR operand on so_reg_imm operands, which in turn ↵Owen Anderson2011-07-2113-104/+267
| | | | | | necessitates a lot of changes to related bits. llvm-svn: 135722
* Fix MergeInVectorType to check for vector types with the same allocDan Gohman2011-07-212-0/+33
| | | | | | | size but different element types, so that it filters out the cases that CreateShuffleVectorCast doesn't handle. This fixes rdar://9786827. llvm-svn: 135721
* ARM Asm parser range checking for [0,31] immediates.Jim Grosbach2011-07-212-0/+14
| | | | llvm-svn: 135719
* ARM parsing and encoding tests for SBC instruction.Jim Grosbach2011-07-212-3/+53
| | | | llvm-svn: 135718
* Initialize DenseSets lazily.Benjamin Kramer2011-07-211-1/+1
| | | | llvm-svn: 135717
* ARM testcases for SADD/SASX parsing and encoding.Jim Grosbach2011-07-211-0/+23
| | | | llvm-svn: 135715
* Add missing getAnalysisUsage in MachineBlockFrequency.Jakub Staszak2011-07-211-0/+1
| | | | llvm-svn: 135714
* ARM assembly parsing support for RSC instruction.Jim Grosbach2011-07-213-3/+65
| | | | | | | Add two-operand instruction aliases. Add parsing and encoding tests for variants of the instruction. llvm-svn: 135713
* ARM assembly parsing support for RSB instruction.Jim Grosbach2011-07-213-3/+71
| | | | | | | Add two-operand instruction aliases. Add parsing and encoding tests for variants of the instruction. llvm-svn: 135712
* ARM parsing and encoding tests for RBIT, REV, REV16 and REVSH.Jim Grosbach2011-07-211-0/+28
| | | | llvm-svn: 135710
* ARM parsing and encodings tests for saturating arithmetic insns.Jim Grosbach2011-07-212-12/+60
| | | | llvm-svn: 135709
* Tidy up.Jim Grosbach2011-07-211-2/+0
| | | | llvm-svn: 135706
* Update generated CPP code with the new API on CallInst::Create and ↵Nicolas Geoffray2011-07-211-5/+2
| | | | | | ConstantExpr::getGetElementPtr. llvm-svn: 135704
* ARM assembly parsing POP/PUSH mnemonics.Jim Grosbach2011-07-212-0/+35
| | | | | | | | Aliases for LDM/STM. The single-register versions should encode to LDR/STR with writeback, but we don't (yet) get that correct. Neither does Darwin's system assembler, though, so that's not a deal-breaker of a limitation. llvm-svn: 135702
* Fix CMake buildOscar Fuentes2011-07-211-0/+1
| | | | llvm-svn: 135698
* Add tests for ARM PKH assembly parsing.Jim Grosbach2011-07-212-0/+48
| | | | llvm-svn: 135696
* Split up the ARM so_reg ComplexPattern into so_reg_reg and so_reg_imm, ↵Owen Anderson2011-07-217-67/+331
| | | | | | allowing us to distinguish the encodings that use shifted registers from those that use shifted immediates. This is necessary to allow the fixed-length decoder to distinguish things like BICS vs LDRH. llvm-svn: 135693
OpenPOWER on IntegriCloud