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* ShiftAmt might equal to zero. Handle this situation.Zhou Sheng2007-03-141-7/+9
| | | | llvm-svn: 35094
* Enable KnownZero/One.clear().Zhou Sheng2007-03-141-2/+2
| | | | llvm-svn: 35093
* New test.Evan Cheng2007-03-131-0/+47
| | | | llvm-svn: 35091
* This got better.Evan Cheng2007-03-131-43/+44
| | | | llvm-svn: 35090
* Try schedule def + use closer whne Sethi-Ullman numbers are the same.Evan Cheng2007-03-131-6/+38
| | | | | | | | | | | | | | | | | | | | | e.g. t1 = op t2, c1 t3 = op t4, c2 and the following instructions are both ready. t2 = op c3 t4 = op c4 Then schedule t2 = op first. i.e. t4 = op c4 t2 = op c3 t1 = op t2, c1 t3 = op t4, c2 This creates more short live intervals which work better with the register allocator. llvm-svn: 35089
* AM2 can match 2^n +/- 1. e.g. ldr r3, [r2, r2, lsl #2]Evan Cheng2007-03-131-0/+23
| | | | llvm-svn: 35088
* Zero is always a legal AM immediate.Evan Cheng2007-03-131-0/+3
| | | | llvm-svn: 35087
* Correct type info for isLegalAddressImmediate() check.Evan Cheng2007-03-131-12/+18
| | | | llvm-svn: 35086
* Test support for arrays with non-zero first index.Duncan Sands2007-03-132-0/+16
| | | | llvm-svn: 35084
* Stack and register alignment of call arguments in the ELF ABINicolas Geoffray2007-03-131-6/+52
| | | | llvm-svn: 35083
* ifdef out some dead code.Chris Lattner2007-03-131-2/+8
| | | | | | Fix PR1244 and Transforms/InstCombine/2007-03-13-CompareMerge.ll llvm-svn: 35082
* testcase for PR1244Chris Lattner2007-03-131-0/+9
| | | | llvm-svn: 35081
* For expression likeZhou Sheng2007-03-131-3/+3
| | | | | | | | "APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth)", to handle ShiftAmt == BitWidth situation, use zextOrCopy() instead of zext(). llvm-svn: 35080
* Add zextOrCopy() into APInt for convenience.Zhou Sheng2007-03-131-0/+9
| | | | llvm-svn: 35079
* In APInt version ComputeMaskedBits():Zhou Sheng2007-03-131-15/+28
| | | | | | | 1. Ensure VTy, KnownOne and KnownZero have same bitwidth. 2. Make code more efficient. llvm-svn: 35078
* Implement getTargetLowering() or else LSR won't be using ARM specific hooks.Evan Cheng2007-03-132-1/+8
| | | | llvm-svn: 35077
* More flexible TargetLowering LSR hooks for testing whether an immediate is a ↵Evan Cheng2007-03-121-3/+13
| | | | | | legal target address immediate or scale. llvm-svn: 35076
* Updated TargetLowering LSR addressing mode hooks for ARM and Thumb.Evan Cheng2007-03-122-8/+88
| | | | llvm-svn: 35075
* More flexible TargetLowering LSR hooks for testing whether an immediate is a ↵Evan Cheng2007-03-122-5/+10
| | | | | | legal target address immediate or scale. llvm-svn: 35074
* More flexible TargetLowering LSR hooks for testing whether an immediate isEvan Cheng2007-03-122-16/+33
| | | | | | a legal target address immediate or scale. llvm-svn: 35073
* Use new TargetLowering addressing modes hooks.Evan Cheng2007-03-121-20/+18
| | | | llvm-svn: 35072
* More flexible TargetLowering LSR hooks for testing whether an immediate isEvan Cheng2007-03-121-20/+10
| | | | | | a legal target address immediate or scale. llvm-svn: 35071
* Stupid bug: SSE2 supports v2i64 add / sub.Evan Cheng2007-03-121-0/+2
| | | | llvm-svn: 35070
* Revert the last patch as it violates the conditions of sext/zext.Reid Spencer2007-03-121-4/+0
| | | | llvm-svn: 35068
* Unbreak C++ build.Jeff Cohen2007-03-121-0/+1
| | | | llvm-svn: 35067
* Unbreak VC++ build. Do not use identifiers starting with _ as they are ↵Jeff Cohen2007-03-121-3/+3
| | | | | | | | reserved and can collide with system defined names. Windows defines _BB, for example. llvm-svn: 35066
* For APInt::z/sext(width), if width == BitWidth, just return *this.Zhou Sheng2007-03-121-0/+4
| | | | llvm-svn: 35065
* Add an APInt version of SimplifyDemandedBits.Reid Spencer2007-03-121-1/+524
| | | | | | Patch by Zhou Sheng. llvm-svn: 35064
* Add an APInt version of ShrinkDemandedConstant.Reid Spencer2007-03-121-0/+24
| | | | | | Patch by Zhou Sheng. llvm-svn: 35063
* Avoid to assert on "(KnownZero & KnownOne) == 0".Zhou Sheng2007-03-121-1/+1
| | | | llvm-svn: 35062
* In function ComputeMaskedBits():Zhou Sheng2007-03-121-6/+6
| | | | | | | | 1. Replace getSignedMinValue() with getSignBit() for better code readability. 2. Replace APIntOps::shl() with operator<<= for convenience. 3. Make APInt construction more effective. llvm-svn: 35060
* Add getSignBit() and operator<<= into APInt for convenience.Zhou Sheng2007-03-111-0/+23
| | | | llvm-svn: 35059
* Add value ranges. Currently inefficient in both execution time andNick Lewycky2007-03-101-219/+397
| | | | | | optimization power. llvm-svn: 35058
* Use range tests in LowerSwitch, where possibleAnton Korobeynikov2007-03-102-31/+164
| | | | llvm-svn: 35057
* Add getter methods for the extremes of a ConstantRange.Nick Lewycky2007-03-102-0/+84
| | | | llvm-svn: 35056
* Adding more arithmetic operators to MMX. This is an almost exact copy ofBill Wendling2007-03-104-15/+94
| | | | | | the addition. Please let me know if you have suggestions. llvm-svn: 35055
* Remove dead comments.Devang Patel2007-03-091-3/+0
| | | | llvm-svn: 35053
* Avoid recursion. Use iterative algorithm for RenamePass().Devang Patel2007-03-091-4/+31
| | | | llvm-svn: 35052
* Increment iterator now because IVUseShouldUsePostIncValue may removeDevang Patel2007-03-091-2/+6
| | | | | | User from the list of I users. llvm-svn: 35051
* Regenerate.Reid Spencer2007-03-092-2/+2
| | | | llvm-svn: 35050
* Minor stuff.Evan Cheng2007-03-091-0/+4
| | | | llvm-svn: 35049
* Add comments about LSR / ARM.Evan Cheng2007-03-091-0/+4
| | | | llvm-svn: 35048
* Unfinished work and ideas related to register scavenger.Evan Cheng2007-03-091-0/+14
| | | | llvm-svn: 35047
* For PR1245:Reid Spencer2007-03-091-1/+1
| | | | | | | Account for the sign bit when computing the number of bits required for a negative integer literal constant. llvm-svn: 35046
* apply comments from review of last patchDale Johannesen2007-03-091-2/+2
| | | | llvm-svn: 35045
* Add some observations from CoreGraphics benchmark. Remove registerDale Johannesen2007-03-091-47/+47
| | | | | | scavenging todo item, since it is now implemented. llvm-svn: 35044
* Unbreak mingw32 buildAnton Korobeynikov2007-03-091-0/+8
| | | | llvm-svn: 35042
* If a virtual register is already marked alive in this block, that means it isEvan Cheng2007-03-091-1/+6
| | | | | | alive in one of the successor block. Do not add it to the kill list. llvm-svn: 35041
* Print preds / succs BB numbers.Evan Cheng2007-03-091-2/+2
| | | | llvm-svn: 35040
* Avoid variable shadowing.Evan Cheng2007-03-091-2/+2
| | | | llvm-svn: 35039
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