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* Remove an unused private field added r227405 to fix a Clang warning.Chandler Carruth2015-01-291-2/+1
| | | | llvm-svn: 227415
* [LPM] Try again to appease powerpc64 in its self host. I've been unableChandler Carruth2015-01-291-3/+4
| | | | | | | | | | | | | | | to get a powerpc64 host so that I can reproduce and test this, but it only impacts that platform so trying the only other realistic option. According to Ulrich, who debugged this initially, initial-exec is likely to be sufficient for our needs and not subject to this bug. Will watch the build bots to see. If this doesn't work, I'll be forced to cut a really ugly pthread-based approach into the primary user (our stack trace printing) as that user cannot use the ThreadLocal implementation due to lifetime issues. llvm-svn: 227414
* [LPM] Fix an "obvious" typo from r227411. Really sorry for the noise.Chandler Carruth2015-01-291-1/+1
| | | | | | Too many cases to compile everything quickly. llvm-svn: 227412
* [LPM] Clean up the use of TLS in pretty stack trace and disable itChandler Carruth2015-01-292-20/+37
| | | | | | | | | | | | | | | | | | | | | entirely when threads are not enabled. This should allow anyone who needs to bootstrap or cope with a host loader without TLS support to limp along without threading support. There is still some bug in the PPC TLS stuff that is not worked around. I'm getting access to a machine to reproduce and debug this further. There is some chance that I'll have to add a terrible workaround for PPC. There is also some problem with iOS, but I have no ability to really evaluate what the issue is there. I'm leaving it to folks maintaining that platform to suggest a path forward -- personally I don't see any useful path forward that supports threading in LLVM but does so without support for *very basic* TLS. Note that we don't need more than some pointers, and we don't need constructors, destructors, or any of the other fanciness which remains widely unimplemented. llvm-svn: 227411
* Remove unused variableReid Kleckner2015-01-291-2/+0
| | | | llvm-svn: 227408
* Add a Windows EH preparation pass that zaps resumesReid Kleckner2015-01-298-3/+199
| | | | | | | | | | | | | | | | | | | If the personality is not a recognized MSVC personality function, this pass delegates to the dwarf EH preparation pass. This chaining supports people on *-windows-itanium or *-windows-gnu targets. Currently this recognizes some personalities used by MSVC and turns resume instructions into traps to avoid link errors. Even if cleanups are not used in the source program, LLVM requires the frontend to emit a code path that resumes unwinding after an exception. Clang does this, and we get unreachable resume instructions. PR20300 covers cleaning up these unreachable calls to resume. Reviewers: majnemer Differential Revision: http://reviews.llvm.org/D7216 llvm-svn: 227405
* Remove getSubtargetImpl from AArch64ISelLowering and cache theEric Christopher2015-01-293-13/+10
| | | | | | | correct subtarget by passing it in during the constructor as TargetLowering is Subtarget specific. llvm-svn: 227402
* Remove getSubtargetImpl from ARMISelLowering and cache theEric Christopher2015-01-293-33/+22
| | | | | | | correct subtarget by passing it in during the constructor as TargetLowering is Subtarget specific. llvm-svn: 227401
* Small cleanup in ARMFastISel initialization.Eric Christopher2015-01-291-5/+4
| | | | llvm-svn: 227400
* Migrate ARM except for TTI, AsmPrinter, and frame loweringEric Christopher2015-01-2912-113/+70
| | | | | | away from getSubtargetImpl. llvm-svn: 227399
* Add nullptr checks for TargetSelectionDAGInfo in SelectionDAG.Manuel Jacob2015-01-281-13/+19
| | | | | | TSI is not guaranteed be non-null in SelectionDAG. llvm-svn: 227397
* [fuzzer] add option -save_minimized_corpusKostya Serebryany2015-01-285-4/+27
| | | | llvm-svn: 227395
* [LPM] Fix the PPC attribute to be spelled 'global-dynamic'. This shouldChandler Carruth2015-01-281-2/+2
| | | | | | let the build bot make finish compiling stage2. llvm-svn: 227391
* Teach SplitBlockPredecessors how to handle landingpad blocks.Philip Reames2015-01-286-48/+39
| | | | | | | | | | Patch by: Igor Laevsky <igor@azulsystems.com> "Currently SplitBlockPredecessors generates incorrect code in case if basic block we are going to split has a landingpad. Also seems like it is fairly common case among it's users to conditionally call either SplitBlockPredecessors or SplitLandingPadPredecessors. Because of this I think it is reasonable to add this condition directly into SplitBlockPredecessors." Differential Revision: http://reviews.llvm.org/D7157 llvm-svn: 227390
* Add lit-style tests for the Fuzzer libraryKostya Serebryany2015-01-286-2/+64
| | | | | | | | | | | | | | | | Summary: Add test targets and the lit-style runner. Test Plan: Run the tests on bot. Reviewers: samsonov Reviewed By: samsonov Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D7217 llvm-svn: 227389
* fix typos; NFCSanjay Patel2015-01-282-2/+2
| | | | llvm-svn: 227386
* Build fix for Visual Studio. NFC.Chris Bieneman2015-01-281-5/+2
| | | | llvm-svn: 227385
* [dsymutil] Gather the DIE tree child->parent relationships.Frederic Riss2015-01-281-0/+62
| | | | | | | | | | The libDebugInfo DIE parsing doesn't store these relationships, we have to recompute them. This commit introduces the CompileUnit bookkeeping class to store this data. It will be expanded with more fields in the future. No tests as this produces no visible output. llvm-svn: 227382
* Add DWARFUnit::getNumDIEs() and getDIEIndex()Frederic Riss2015-01-281-0/+20
| | | | | | | | | | | Parsed DIEs are stored in a vector and that makes it easy to get their indices. Having easy access to a DIE's index makes it possible to use arrays or vectors to efficiently store/access DIE related information. There's no test for that new functionality (I don't see how to test it standalone), but it'll be used in a subsequent dsymutil commit. llvm-svn: 227381
* [Hexagon] Updating several V5 intrinsics and adding FP tests.Colin LeMahieu2015-01-288-425/+1011
| | | | llvm-svn: 227379
* Spelling fixes. NFC.Simon Pilgrim2015-01-281-4/+4
| | | | llvm-svn: 227376
* Line endings fix. NFC.Simon Pilgrim2015-01-281-786/+786
| | | | llvm-svn: 227374
* [mips][microMIPS] Implement SWM and LWM aliasesZoran Jovanovic2015-01-283-0/+69
| | | | | | Differential Revision: http://reviews.llvm.org/D5820 llvm-svn: 227373
* [fuzzer] instructions for building/running clang-format-fuzzerKostya Serebryany2015-01-281-1/+9
| | | | llvm-svn: 227357
* invert check for less indentation; use local vars to reduce duplication; NFCSanjay Patel2015-01-281-19/+20
| | | | llvm-svn: 227355
* [Hexagon] Updating many V4 intrinsic patterns. Adding missing instruction ↵Colin LeMahieu2015-01-284-252/+83
| | | | | | and deleting unused classes. llvm-svn: 227353
* [LPM] Try to work around a bug with local-dynamic TLS on PowerPC 64.Chandler Carruth2015-01-281-5/+18
| | | | | | | | | | | | | | | | Sadly, this precludes optimizing it down to initial-exec or local-exec when statically linking, and in general makes the code slower on PPC 64, but there's nothing else for it until we can arrange to produce the correct bits for the linker. Lots of thanks to Ulirch for tracking this down and Bill for working on the long-term fix to LLVM so that we can relegate this to old host clang versions. I'll be watching the PPC build bots to make sure this effectively revives them. llvm-svn: 227352
* Remove gc.root's performCustomLoweringPhilip Reames2015-01-289-510/+489
| | | | | | | | | | | | | | This is a refactoring to restructure the single user of performCustomLowering as a specific lowering pass and remove the custom lowering hook entirely. Before this change, the LowerIntrinsics pass (note to self: rename!) was essentially acting as a pass manager, but without being structured in terms of passes. Instead, it proxied calls to a set of GCStrategies internally. This adds a lot of conceptual complexity (i.e. GCStrategies are stateful!) for very little benefit. Since there's been interest in keeping the ShadowStackGC working, I extracting it's custom lowering pass into a dedicated pass and just added that to the pass order. It will only run for functions which opt-in to that gc. I wasn't able to find an easy way to preserve the runtime registration of custom lowering functionality. Given that no user of this exists that I'm aware of, I made the choice to just remove that. If someone really cares, we can look at restoring it via dynamic pass registration in the future. Note that despite the large diff, none of the lowering code actual changes. I added the framing needed to make it a pass and rename the class, but that's it. Differential Revision: http://reviews.llvm.org/D7218 llvm-svn: 227351
* Moving AddLiteralOption's declaration higher up in the header to make gcc happy.Chris Bieneman2015-01-281-9/+12
| | | | llvm-svn: 227348
* [Hexagon] Adding XTYPE/MPY intrinsic tests and some missing multiply ↵Colin LeMahieu2015-01-286-6/+1195
| | | | | | instructions. llvm-svn: 227347
* Refactoring llvm command line parsing and option registration.Chris Bieneman2015-01-283-193/+184
| | | | | | | | | | | | | | | | | | | | | Summary: The primary goal of this patch is to remove the need for MarkOptionsChanged(). That goal is accomplished by having addOption and removeOption properly sort the options. This patch puts the new add and remove functionality on a CommandLineParser class that is a placeholder. Some of the functionality in this class will need to be merged into the OptionRegistry, and other bits can hopefully be in a better abstraction. This patch also removes the RegisteredOptionList global, and the need for cl::Option objects to be linked list nodes. The changes in CommandLineTest.cpp are required because these changes shift when we validate that options are not duplicated. Before this change duplicate options were only found during certain cl API calls (like cl::ParseCommandLine). With this change duplicate options are found during option construction. Reviewers: dexonsmith, chandlerc, pete Reviewed By: pete Subscribers: pete, majnemer, llvm-commits Differential Revision: http://reviews.llvm.org/D7132 llvm-svn: 227345
* Assume code ownership for the PS4 to ensure patches get reviewed, per the ↵Alex Rosenberg2015-01-281-0/+4
| | | | | | Developer Policy. llvm-svn: 227340
* Fix build breakage caused by memory leaks in llvm-c-testBjorn Steinbrink2015-01-281-0/+4
| | | | | | I accidently introduced those in r227319. llvm-svn: 227339
* [Hexagon] Deleting a lot of old variants of intrinsics and updating references.Colin LeMahieu2015-01-286-240/+81
| | | | llvm-svn: 227338
* [dsymutil] Add DwarfLinker class.Frederic Riss2015-01-285-4/+113
| | | | | | | | It's an empty shell for now. It's main method just opens the debug map objects and parses their Dwarf info. Test that we at least do that correctly. llvm-svn: 227337
* [Hexagon] Converting XTYPE/BIT intrinsic patterns and adding tests.Colin LeMahieu2015-01-283-34/+472
| | | | llvm-svn: 227335
* use SDValue methods directly instead of getNode()->* ; NFCISanjay Patel2015-01-281-10/+10
| | | | llvm-svn: 227334
* Simplify code. NFC.Rafael Espindola2015-01-281-3/+1
| | | | llvm-svn: 227333
* [Hexagon] Replacing XTYPE/SHIFT intrinsic patternss. Adding tests and ↵Colin LeMahieu2015-01-287-194/+864
| | | | | | missing instructions with tests. llvm-svn: 227330
* [mips][microMIPS] Implement LWGP instructionJozef Kolek2015-01-2810-1/+112
| | | | | | Differential Revision: http://reviews.llvm.org/D6650 llvm-svn: 227325
* [Hexagon] Replacing intrinsics for halfword adds and max/min word/dword.Colin LeMahieu2015-01-282-82/+55
| | | | llvm-svn: 227322
* [Hexagon] Replacing old intrinsic tests with organized versions that match ↵Colin LeMahieu2015-01-2811-2293/+265
| | | | | | the reference manual. llvm-svn: 227321
* Fix LLVMSetMetadata and LLVMAddNamedMetadataOperand for single value MDNodesBjorn Steinbrink2015-01-287-4/+70
| | | | | | | | | | | | | Summary: MetadataAsValue uses a canonical format that strips the MDNode if it contains only a single constant value. This triggers an assertion when trying to cast the value to a MDNode. Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D7165 llvm-svn: 227319
* [ELFYAML] Provide explicit value for relocation addendums in the testSimon Atanasyan2015-01-281-0/+4
| | | | | | | | | | | | The `Addend` is an optional field of the `Relocation` YAML record. But we do not provide its default value while reading it from a YAML file and so it might keep uninitialized. I am going to fix the code by a separate commit. We might either make this field mandatory (at least for .rela sections) or specify 0 as a default value explicitly. llvm-svn: 227318
* [x32] Change the condition from bitness to LP64 for TCRETURNdi64. Michael Kuperstein2015-01-281-2/+2
| | | | | | TCRETURNmi64, which was mistakenly changed in r227307 will wait for another day. llvm-svn: 227317
* R600: Move DataLayout to AMDGPUTargetMachineTom Stellard2015-01-2819-46/+47
| | | | | | | | This is a follow up to r227113. It is now required to use the amdgcn target for SI and newer GPUs. llvm-svn: 227316
* R600: Use a Southern Islands GPU as the default for the amdgcn targetTom Stellard2015-01-282-3/+7
| | | | llvm-svn: 227314
* Correct the AggressiveAntiDepBreaker's handling of subregisters defining ↵Hal Finkel2015-01-281-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | super registers As the AggressiveAntiDepBreaker iterated backward through a scheduling region, we must leave super registers live through subregister definitions so that all relevant subregister definitions are renamed together. The problem was that we were also discarding sub-register use locations as the sub-registers are redefined. The result is that we'd rename the super register along with some, but not all, subregister definitions. R0_D = {R0_L, R1_L} R0_L = {R0_S, R1_S} %R0_L<def> = TRLi9 16, pred:8, pred:%noreg %R1_L<def> = LSRLrr %R1_L<kill>, %R0_S, pred:8, pred:%noreg %R0_L<def> = LSRLrr %R2_L, %R0_S, pred:8, pred:%noreg, %R0_L<imp-use,kill> %R1_L<def> = ANDLri %R1_L<kill>, 2047, pred:8, pred:%noreg %R0_L<def> = ANDLri %R0_L<kill>, 2047, pred:8, pred:%noreg %R4_D<def> = ASRDrr %R0_D<kill>, %R6_S Anti: %R4_D<def> = ASRDrr %R0_D<kill>, %R6_S Def Groups: R4_D=g213->g215(via R4_S)->g214(via R4_L)->g216(via R5_S)->g216(via R4_L)->g217(via R5_L) Use Groups: R0_D=g0->g218(last-use) R1_L->g219(last-use) R6_S=g204->g220(last-use) Anti: %R0_L<def> = ANDLri %R0_L<kill>, 2047, pred:8, pred:%noreg Def Groups: R0_L=g208->g209(via R0_S)->g218(via R0_D)->g210(via R1_S)->g210(via R0_D) Antidep reg: R0_L (real dependency) Use Groups: R0_L=g210->g224(last-use) R0_S->g225(last-use) R1_S->g226(last-use) Anti: %R1_L<def> = ANDLri %R1_L<kill>, 2047, pred:8, pred:%noreg Def Groups: R1_L=g219->g210(via R0_D) Antidep reg: R1_L (real dependency) Use Groups: R1_L=g210->g229(last-use) Anti: %R0_L<def> = LSRLrr %R2_L, %R0_S, pred:8, pred:%noreg, %R0_L<imp-use,kill> Def Groups: R0_L=g224->g225(via R0_S)->g210(via R0_D)->g226(via R1_S)->g226(via R0_D) Antidep reg: R0_L Use Groups: R2_L=g192 R0_S=g226->g230(last-use) R0_L=g226->g231(last-use) R1_S->g232(last-use) Anti: %R1_L<def> = LSRLrr %R1_L<kill>, %R0_S, pred:8, pred:%noreg Def Groups: R1_L=g229->g226(via R0_D) Antidep reg: R1_L Use Groups: R1_L=g226->g233(last-use) R0_S=g230 Anti: %R0_L<def> = TRLi9 16, pred:8, pred:%noreg Def Groups: R0_L=g231->g230(via R0_S)->g226(via R0_D)->g232(via R1_S)->g232(via R0_D) Antidep reg: R0_L Rename Candidates for Group g232: R0_D: elcInt64Regs :: R0_D R1_D R2_D R3_D R4_D R5_D R8_D R9_D R10_D R11_D R12_D R13_D R14_D R15_D R16_D R17_D R18_D R19_D R20_D R21_D R22_D R23_D R24_D R25_D R0_L: elcIntRegs :: R0_L R1_L R2_L R3_L R4_L R5_L R8_L R9_L R10_L R11_L R12_L R13_L R14_L R15_L R16_L R17_L R18_L R19_L R20_L R21_L R22_L R23_L R24_L R25_L R0_S: elcShrtRegs elcShrtRegs :: R0_S R1_S R2_S R3_S R4_S R5_S R8_S R9_S R10_S R11_S R12_S R13_S R14_S R15_S R16_S R17_S R18_S R19_S R20_S R21_S R22_S R23_S R24_S R25_S Find Registers: [R12_D: R12_D R12_L R12_S] Breaking anti-dependence edge on R0_L: R0_D->R12_D(1 refs) R0_L->R12_L(2 refs) R0_S->R12_S(2 refs) Use Groups: ... %R12_L<def> = TRLi9 16, pred:8, pred:%noreg %R1_L<def> = LSRLrr %R1_L<kill>, %R12_S, pred:8, pred:%noreg %R0_L<def> = LSRLrr %R2_L<kill>, %R12_S, pred:8, pred:%noreg, %R12_L<imp-use> %R1_L<def> = ANDLri %R1_L<kill>, 2047, pred:8, pred:%noreg %R0_L<def> = ANDLri %R0_L<kill>, 2047, pred:8, pred:%noreg %R4_D<def> = ASRDrr %R12_D<kill>, %R6_S With this change, we now produce: Anti: %R4_D<def> = ASRDrr %R0_D<kill>, %R6_S Def Groups: R4_D=g213->g215(via R4_S)->g214(via R4_L)->g216(via R5_S)->g216(via R4_L)->g217(via R5_L) Use Groups: R0_D=g0->g218(last-use) R1_L->g219(last-use) R6_S=g204->g220(last-use) Anti: %R0_L<def> = ANDLri %R0_L<kill>, 2047, pred:8, pred:%noreg Def Groups: R0_L=g208->g209(via R0_S)->g218(via R0_D)->g210(via R1_S)->g210(via R0_D) Antidep reg: R0_L (real dependency) Use Groups: R0_L=g210 Anti: %R1_L<def> = ANDLri %R1_L<kill>, 2047, pred:8, pred:%noreg Def Groups: R1_L=g219->g210(via R0_D) Antidep reg: R1_L (real dependency) Use Groups: R1_L=g210 Anti: %R0_L<def> = LSRLrr %R2_L, %R0_S, pred:8, pred:%noreg, %R0_L<imp-use,kill> Def Groups: R0_L=g210->g210(via R0_D)->g210(via R0_D) Antidep reg: R0_L Use Groups: R2_L=g192 R0_S=g210 R0_L=g210 Anti: %R1_L<def> = LSRLrr %R1_L<kill>, %R0_S, pred:8, pred:%noreg Def Groups: R1_L=g210->g210(via R0_D) Antidep reg: R1_L Use Groups: R1_L=g210 R0_S=g210 Anti: %R0_L<def> = TRLi9 16, pred:8, pred:%noreg Def Groups: R0_L=g210->g210(via R0_D)->g210(via R0_D) Antidep reg: R0_L Rename Candidates for Group g210: R0_D: elcInt64Regs :: R0_D R1_D R2_D R3_D R4_D R5_D R8_D R9_D R10_D R11_D R12_D R13_D R14_D R15_D R16_D R17_D R18_D R19_D R20_D R21_D R22_D R23_D R24_D R25_D R0_L: elcIntRegs elcIntAIRegs elcIntRegs elcIntRegs elcIntRegs elcIntRegs :: R0_L R1_L R2_L R3_L R4_L R5_L R8_L R9_L R10_L R11_L R12_L R13_L R14_L R15_L R16_L R17_L R18_L R19_L R20_L R21_L R22_L R23_L R24_L R25_L R1_L: elcIntRegs elcIntRegs elcIntRegs elcIntRegs elcIntRegs :: R0_L R1_L R2_L R3_L R4_L R5_L R8_L R9_L R10_L R11_L R12_L R13_L R14_L R15_L R16_L R17_L R18_L R19_L R20_L R21_L R22_L R23_L R24_L R25_L R0_S: elcShrtRegs elcShrtRegs :: R0_S R1_S R2_S R3_S R4_S R5_S R8_S R9_S R10_S R11_S R12_S R13_S R14_S R15_S R16_S R17_S R18_S R19_S R20_S R21_S R22_S R23_S R24_S R25_S Find Registers: [R12_D: R12_D R12_L R13_L R12_S] Breaking anti-dependence edge on R0_L: R0_D->R12_D(1 refs) R0_L->R12_L(7 refs) R1_L->R13_L(5 refs) R0_S->R12_S(2 refs) Use Groups: ... %R12_L<def> = TRLi9 16, pred:8, pred:%noreg %R13_L<def> = LSRLrr %R13_L<kill>, %R12_S, pred:8, pred:%noreg %R12_L<def> = LSRLrr %R2_L<kill>, %R12_S<kill>, pred:8, pred:%noreg, %R12_L<imp-use,kill> %R13_L<def> = ANDLri %R13_L<kill>, 2047, pred:8, pred:%noreg %R12_L<def> = ANDLri %R12_L<kill>, 2047, pred:8, pred:%noreg %R4_D<def> = ASRDrr %R12_D, %R6_S, %R12_L<imp-def>, %R12_S<imp-def>, %R13_S<imp-def> As demonstrated by this example, this is also somewhat unfortunate, because there is actually no need to rename the super register in this case (it is fully covered by later subregister definitions), but we don't seem to track enough information here to exploit that either. Thanks to Daniil Troshkov for reporting the issue. The debug outputs in this commit message are from Daniil. llvm-svn: 227311
* [X86] Reduce some 32-bit imuls into lea + shlMichael Kuperstein2015-01-284-29/+115
| | | | | | | | Reduce integer multiplication by a constant of the form k*2^c, where k is in {3,5,9} into a lea + shl. Previously it was only done for imulq on 64-bit platforms, but it makes sense for imull and 32-bit as well. Differential Revision: http://reviews.llvm.org/D7196 llvm-svn: 227308
* [x32] Enable sibcall optimization on x32. Michael Kuperstein2015-01-283-6/+86
| | | | | | | | This includes two things: 1) Fix TCRETURNdi and TCRETURN64di patterns to check the right thing (LP64 as opposed to target bitness). 2) Allow LEA64_32 in MatchingStackOffset. llvm-svn: 227307
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