summaryrefslogtreecommitdiffstats
path: root/llvm
Commit message (Collapse)AuthorAgeFilesLines
* Revert changes to LTO test case since llvm-lto can't handle textual IR inputsDavid Blaikie2015-04-241-1/+2
| | | | llvm-svn: 235738
* Skip extra LLVM IR assemble/disassemble steps in some testsDavid Blaikie2015-04-242-4/+2
| | | | llvm-svn: 235736
* [opaque pointer type] bitcode: add explicit callee type to invoke instructionsDavid Blaikie2015-04-245-18/+33
| | | | llvm-svn: 235735
* Fix LoopInterchange/reductions.ll test for debug buildsAndrew Kaylor2015-04-241-2/+2
| | | | llvm-svn: 235734
* Teach AArch64\lit.local.cfg the new triple names windows-gnu and windows-msvc.Yaron Keren2015-04-241-1/+1
| | | | | | Tests were failing when built with -DLLVM_DEFAULT_TARGET_TRIPLE=i686-pc-windows-gnu. llvm-svn: 235733
* [CMake] Fix for PR 23328: LLVM_OPTIMIZED_TABLEGEN brokenChris Bieneman2015-04-241-3/+4
| | | | | | | | | | | | In CMake dependencies can be filenames or targets, and targets can't be filenames. The Ninja generator handles filename dependencies because it generates targets for every output file from a command. For example: add_custom_command(OUTPUT foo.txt COMMAND touch foo.txt) With the Ninja generator this generates a target foo.txt, but with the Makefile generator it doesn't. This is probably because Ninja explicitly requires these hard dependency ties, and Make just behaves oddly in general. To fix this we need to make the tablegen actions depend on a target rather than a filename. llvm-svn: 235732
* Linker: Update -override testcase to check callersDuncan P. N. Exon Smith2015-04-241-11/+13
| | | | | | | | Check that `@main` is calling `@foo2` (the renamed internal function), not the `@foo` with external linkage that's been pulled in from the override file. llvm-svn: 235730
* Switch lowering: fix APInt overflow causing infinite loop / OOMHans Wennborg2015-04-242-1/+65
| | | | llvm-svn: 235729
* [WinEH] Split the landingpad BB instead of cloning itReid Kleckner2015-04-247-29/+17
| | | | | | | This means we don't have to RAUW the landingpad instruction and landingpad BB, which is a nice win. llvm-svn: 235725
* Fix typo in comment.Diego Novillo2015-04-241-1/+1
| | | | llvm-svn: 235723
* Use the cleaner syntx value initialization to zero initialize POD structs.Yaron Keren2015-04-241-6/+3
| | | | | | Suggestion from David Blaikie! llvm-svn: 235721
* Silence clang warning: private field 'data_' is not used.Yaron Keren2015-04-242-0/+4
| | | | llvm-svn: 235720
* Silence clang warning: missing field 'Dr0' initializer.Yaron Keren2015-04-241-1/+2
| | | | llvm-svn: 235719
* [mips][FastISel] Specify which types we handle for integer extension.Vasileios Kalintiris2015-04-241-0/+7
| | | | | | | | | | | | | | | | | | Summary: Perform integer extension only when the destination type is one of i8, i16 & i32 and when the source type is i1, i8 or i16. For other combinations we fall back to SelectionDAG. This fixes the test MultiSource/Benchmarks/7zip that was failing in our out-of-tree MIPS buildbots. Reviewers: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9243 llvm-svn: 235718
* Removing dead code; NFC. This code was triggering a C4718 warning (recursive ↵Aaron Ballman2015-04-241-18/+0
| | | | | | call has no side effects, deleting) with MSVC. llvm-svn: 235717
* [BitcodeReader] Fix asserts when we read a non-vector type for ↵Filipe Cabecinhas2015-04-245-2/+18
| | | | | | | | | | insert/extract/shuffle Added some additional checking for vector types + tests. Bug found with AFL fuzz. llvm-svn: 235710
* Correct extractelement constant foldingPawel Bylica2015-04-242-3/+10
| | | | | | | | | | | | | | | | Summary: Constant folding of extractelement with out-of-bound index produces undef also for indexes bigger than 64bit (instead of crash assert failure as before) Test Plan: Unit tests included. Reviewers: majnemer Reviewed By: majnemer Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9225 llvm-svn: 235700
* Fix APInt long division algorithmPawel Bylica2015-04-242-201/+75
| | | | | | | | | | | | | | | | Summary: This patch fixes step D4 of Knuth's division algorithm implementation. Negative sign of the step result was not always detected due to incorrect "borrow" handling. Test Plan: Unit test that reveals the bug included. Reviewers: chandlerc, yaron.keren Reviewed By: yaron.keren Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9196 llvm-svn: 235699
* [TableGen] Don't leak Expanders and Operators in SetTheory.Craig Topper2015-04-244-27/+28
| | | | llvm-svn: 235697
* [TableGen] Fix all remaining memory leaks of Init and RecTy objects.Craig Topper2015-04-242-35/+39
| | | | llvm-svn: 235696
* Resurrect r235688Jingyue Wu2015-04-244-1/+53
| | | | | | | | We should skip vector types which are not SCEVable. test/CodeGen/NVPTX/sched2.ll passes llvm-svn: 235695
* Revert r235688Jingyue Wu2015-04-243-51/+0
| | | | | | Seems breaking builds llvm-svn: 235690
* [NVPTX] Emits "generic()" depending on the original address spaceJingyue Wu2015-04-243-8/+20
| | | | | | | | | | | | | | | | | | Summary: Fixes a bug in the NVPTX codegen. The code used to miss necessary "generic()" on aggregates of addrspacecasts. Test Plan: addrspacecast-gvar.ll Reviewers: eliben, jholewinski Reviewed By: jholewinski Subscribers: jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D9130 llvm-svn: 235689
* [NVPTX] enable NaryReassociate in NVPTXJingyue Wu2015-04-243-0/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: We run NaryReassociate right after SLSR because SLSR enables many opportunities for NaryReassociate. For example, in nary-slsr.ll foo((a + b) + c); foo((a + b * 2) + c); foo((a + b * 3) + c); // 2 muls and 6 adds after SLSR: ab = a + b; foo(ab + c); ab2 = ab + b; foo(ab2 + c); ab3 = ab2 + b; foo(ab3 + c); // 6 adds after NaryReassociate: abc = (a + b) + c; foo(abc); ab2c = abc + b; foo(ab2c); ab3c = ab2c + b; foo(ab3c); // 4 adds Test Plan: nary-slsr.ll Reviewers: jholewinski, eliben Reviewed By: eliben Subscribers: jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D9066 llvm-svn: 235688
* R600/SI: Fix verifier error when producing v_madmk_f32Matt Arsenault2015-04-242-0/+27
| | | | | | Copy the kill flags when swapping the operands. llvm-svn: 235687
* Improve isTriviallyReMaterializable() documentation.Matthias Braun2015-04-241-9/+12
| | | | | | | | | | This should make it clear under which narrow circumstances implicit physreg uses are okay when rematerializing and prevent people from accidentally allowing too much when overriding isReallyTriviallyReMaterializable() even with the weaker assert in the RegisterCoalescer. llvm-svn: 235679
* R600/RegisterCoalescer: Enable more rematerialization/add missing testcaseMatthias Braun2015-04-242-2/+59
| | | | | | | This enables the rematerialization of some R600 MOV instructions in the RegisterCoalescer and adds a testcase for r235668. llvm-svn: 235675
* Fix a couple of typos in comments.Michael Zolotukhin2015-04-241-3/+3
| | | | llvm-svn: 235674
* RegisterCoalescer: implicit phsreg uses are fine when rematerializingMatthias Braun2015-04-241-2/+2
| | | | | | | The target hooks should have already checked them. This change is necessary to enable the remateriailzation on R600. llvm-svn: 235673
* Revert accidentally committed "MC: Allow targets to stop symbol name quoting"Matt Arsenault2015-04-235-17/+5
| | | | llvm-svn: 235672
* R600/SI: Special case v_mov_b32 as really rematerializableMatt Arsenault2015-04-232-0/+17
| | | | | | | This should be fixed to properly understand all rematerializable instructions while ignoring implicit reads of exec. llvm-svn: 235671
* MC: Allow targets to stop symbol name quotingMatt Arsenault2015-04-235-5/+17
| | | | | | | | | Currently symbol names are printed in quotes if it contains something outside of the arbitrary set of characters that isAcceptableChar tests for. On somem targets, it is never OK to print a symbol name in quotes so allow targets to opt out of this behavior. llvm-svn: 235670
* RegisterCoalescer: Avoid unnecessary register class widening for some ↵Matthias Braun2015-04-231-3/+25
| | | | | | | | | | | rematerializations I couldn't provide a testcase as none of the public targets has wide register classes with alot of subregisters and at the same time an instruction which "ReMaterializable" and "AsCheapAsAMove" (could probably be added for R600). llvm-svn: 235668
* Re-commit "[SEH] Remove the old __C_specific_handler code now that ↵Reid Kleckner2015-04-2317-313/+12
| | | | | | | | | | WinEHPrepare works" This reverts commit r235617. r235649 should have addressed the problems. llvm-svn: 235667
* Fix modules build post-r235612.Richard Smith2015-04-231-0/+5
| | | | llvm-svn: 235666
* [PowerPC] Support register name prefixes for vector registersHal Finkel2015-04-233-1/+14
| | | | | | | Match binutils by supporting the optional register name prefix for new vector registers ("vs" for VSX registers and "q" for QPX registers). llvm-svn: 235665
* [PowerPC] Use sync inst alias when printingHal Finkel2015-04-236-17/+15
| | | | | | | So long as the choice between printing msync and sync is not ambiguous, we can print 'sync 0' and just 'sync'. llvm-svn: 235663
* R600: Correctly lower CONCAT_VECTOR nodes with more than 2 operandsTom Stellard2015-04-232-4/+13
| | | | llvm-svn: 235662
* Fix comment for NoCommonBits.Michael Zolotukhin2015-04-231-1/+2
| | | | | | | Maybe there is a better wording, but at least it should be technically correct now. llvm-svn: 235660
* [PowerPC] Add asm/disasm support for dcbt with hintHal Finkel2015-04-239-11/+200
| | | | | | | | | | | | | | | | | | Add assembler/disassembler support for dcbt/dcbtst (and aliases) with the hint field specified (non-zero). Unforunately, the syntax for this instruction is special in that it differs for server vs. embedded cores: dcbt ra, rb, th [server] dcbt th, ra, rb [embedded] where th can be omitted when it is 0. dcbtst is the same. Thus we need to play games in the parser and the printer to flip the operands around on the embedded cores. We'll use the server syntax as the default (binutils currently uses the embedded form by default, but IBM is changing that). We also stop marking dcbtst as having unmodeled side effects (this is not necessary, it is just a hint like dcbt -- noticed by inspection, so no separate test case). llvm-svn: 235657
* [WinEH] Ignore filter clauses while mapping landing pad blocks.Andrew Kaylor2015-04-232-0/+27
| | | | llvm-svn: 235656
* Remove trivial assert to fix NDEBUG Werror buildsReid Kleckner2015-04-231-2/+0
| | | | llvm-svn: 235652
* Recommit r235458: [opaque pointer type] Avoid using ↵David Blaikie2015-04-238-46/+117
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PointerType::getElementType for a few cases of CallInst (reverted in r235533) Original commit message: "Calls to llvm::Value::mutateType are becoming extra-sensitive now that instructions have extra type information that will not be derived from operands or result type (alloca, gep, load, call/invoke, etc... ). The special-handling for mutateType will get more complicated as this work continues - it might be worth making mutateType virtual & pushing the complexity down into the classes that need special handling. But with only two significant uses of mutateType (vectorization and linking) this seems OK for now. Totally open to ideas/suggestions/improvements, of course. With this, and a bunch of exceptions, we can roundtrip an indirect call site through bitcode and IR. (a direct call site is actually trickier... I haven't figured out how to deal with the IR deserializer's lazy construction of Function/GlobalVariable decl's based on the type of the entity which means looking through the "pointer to T" type referring to the global)" The remapping done in ValueMapper for LTO was insufficient as the types weren't correctly mapped (though I was using the post-mapped operands, some of those operands might not have been mapped yet so the type wouldn't be post-mapped yet). Instead use the pre-mapped type and explicitly map all the types. llvm-svn: 235651
* [WinEH] Replace more lpad value uses with undefReid Kleckner2015-04-232-9/+87
| | | | | | | | | | | | | | | | | | | | | We were asserting on code like this: extern "C" unsigned long _exception_code(); void might_crash(unsigned long); void foo() { __try { might_crash(0); } __except(1) { might_crash(_exception_code()); } } Gtest and many other libraries get the exception code from the __except block. What's supposed to happen here is that EAX is live into the __except block, and it contains the exception code. Eventually we'll represent that as a use of the landingpad ehptr value, but for now we can replace it with undef. llvm-svn: 235649
* [MachineCopyPropagation] Handle undef flags conservatively so that we do notQuentin Colombet2015-04-232-1/+49
| | | | | | | | | | | | | | | | | | | | | remove copies that are useful after breaking some hardware dependencies. In other words, handle this kind of situations conservatively by assuming reg2 is redefined by the undef flag. reg1 = copy reg2 = inst reg2<undef> reg2 = copy reg1 Copy propagation used to remove the last copy. This is incorrect because the undef flag on reg2 in inst, allows next passes to put whatever trashed value in reg2 that may help. In practice we end up with this code: reg1 = copy reg2 reg2 = 0 = inst reg2<undef> reg2 = copy reg1 This fixes PR21743. llvm-svn: 235647
* Unbreak buildKrzysztof Parzyszek2015-04-231-1/+1
| | | | llvm-svn: 235646
* [Hexagon] Minor cleanup in HexagonFrameLoweringKrzysztof Parzyszek2015-04-231-6/+2
| | | | llvm-svn: 235645
* R600/SI: Fix indirect addressing with a negative constant offsetTom Stellard2015-04-232-16/+127
| | | | | | | | | | | When the base register index of the vector plus the constant offset was less than zero, we were passing the wrong base register to the indirect addressing instruction. In this case, we need to set the base register to v0 and then add the computed (negative) index to m0. llvm-svn: 235641
* Thumb2: When applying branch optimizations, visit branches in reverse order.Peter Collingbourne2015-04-232-2/+61
| | | | | | | | | | | | The order in which branches appear in ImmBranches is approximately their order within the function body. By visiting later branches first, we reduce the distance between earlier forward branches and their targets, making it more likely that the cbn?z optimization, which can only apply to forward branches, will succeed for those earlier branches. Differential Revision: http://reviews.llvm.org/D9185 llvm-svn: 235640
* ARM: When re-creating a branch via InsertBranch, preserve CPSR flags.Peter Collingbourne2015-04-233-5/+6
| | | | | | | | | | | | | In particular, this preserves the kill flag, which allows the Thumb2 cbn?z optimization to be applied in cases where a branch has been re-created after the live variables analysis pass, e.g. by the machine block placement pass. This appears to be low risk; a number of other targets seem to already be doing something similar, e.g. AArch64, PowerPC. Differential Revision: http://reviews.llvm.org/D9184 llvm-svn: 235639
OpenPOWER on IntegriCloud