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| author | Hal Finkel <hfinkel@anl.gov> | 2015-04-23 23:16:22 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2015-04-23 23:16:22 +0000 |
| commit | 4dc8fcc224aafb3394908618241dbf1b9a27a0c0 (patch) | |
| tree | ddf3ff2f65a98fb77b40ace2cc1e7307a59e1a06 /llvm | |
| parent | 66242d6c5e6a99ed81339d166b0bac7cfbdf1975 (diff) | |
| download | bcm5719-llvm-4dc8fcc224aafb3394908618241dbf1b9a27a0c0.tar.gz bcm5719-llvm-4dc8fcc224aafb3394908618241dbf1b9a27a0c0.zip | |
[PowerPC] Support register name prefixes for vector registers
Match binutils by supporting the optional register name prefix for new vector
registers ("vs" for VSX registers and "q" for QPX registers).
llvm-svn: 235665
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 8 | ||||
| -rw-r--r-- | llvm/test/MC/PowerPC/qpx.s | 3 | ||||
| -rw-r--r-- | llvm/test/MC/PowerPC/vsx.s | 4 |
3 files changed, 14 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp index 9492e1d3f66..b6f10e61079 100644 --- a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp +++ b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp @@ -1219,10 +1219,18 @@ MatchRegisterName(const AsmToken &Tok, unsigned &RegNo, int64_t &IntVal) { !Name.substr(1).getAsInteger(10, IntVal) && IntVal < 32) { RegNo = FRegs[IntVal]; return false; + } else if (Name.startswith_lower("vs") && + !Name.substr(2).getAsInteger(10, IntVal) && IntVal < 64) { + RegNo = VSRegs[IntVal]; + return false; } else if (Name.startswith_lower("v") && !Name.substr(1).getAsInteger(10, IntVal) && IntVal < 32) { RegNo = VRegs[IntVal]; return false; + } else if (Name.startswith_lower("q") && + !Name.substr(1).getAsInteger(10, IntVal) && IntVal < 32) { + RegNo = QFRegs[IntVal]; + return false; } else if (Name.startswith_lower("cr") && !Name.substr(2).getAsInteger(10, IntVal) && IntVal < 8) { RegNo = CRRegs[IntVal]; diff --git a/llvm/test/MC/PowerPC/qpx.s b/llvm/test/MC/PowerPC/qpx.s index 0ada78b1b03..a1fb2090f8f 100644 --- a/llvm/test/MC/PowerPC/qpx.s +++ b/llvm/test/MC/PowerPC/qpx.s @@ -1,6 +1,7 @@ # RUN: llvm-mc -triple powerpc64-bgq-linux --show-encoding %s | FileCheck %s -# FIXME: print qvflogical aliases. +# CHECK: qvfabs 3, 5 # encoding: [0x10,0x60,0x2a,0x10] + qvfabs %q3, %q5 # CHECK: qvfabs 3, 5 # encoding: [0x10,0x60,0x2a,0x10] qvfabs 3, 5 diff --git a/llvm/test/MC/PowerPC/vsx.s b/llvm/test/MC/PowerPC/vsx.s index f0b82c66189..f723a3ebc1a 100644 --- a/llvm/test/MC/PowerPC/vsx.s +++ b/llvm/test/MC/PowerPC/vsx.s @@ -1,6 +1,10 @@ # RUN: llvm-mc -triple powerpc64-unknown-linux-gnu --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s # RUN: llvm-mc -triple powerpc64le-unknown-linux-gnu --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s +# CHECK-BE: xxswapd 7, 63 # encoding: [0xf0,0xff,0xfa,0x56] +# CHECK-LE: xxswapd 7, 63 # encoding: [0x56,0xfa,0xff,0xf0] + xxswapd %vs7, %vs63 + # CHECK-BE: lxsdx 39, 5, 31 # encoding: [0x7c,0xe5,0xfc,0x99] # CHECK-LE: lxsdx 39, 5, 31 # encoding: [0x99,0xfc,0xe5,0x7c] lxsdx 39, 5, 31 |
