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* [X86][IR] Merge together some very similar AutoUpgrade handling. NFCCraig Topper2017-02-181-24/+16
| | | | llvm-svn: 295562
* AMDGPU: Fix assembler subtarget predicate for gfx9Matt Arsenault2017-02-183-1/+13
| | | | | | This was accepting GFX9 instructions on VI. llvm-svn: 295557
* AMDGPU: Fix disassembly of aperture registersMatt Arsenault2017-02-182-0/+18
| | | | llvm-svn: 295555
* AMDGPU: Merge initial gfx9 supportMatt Arsenault2017-02-1824-60/+578
| | | | llvm-svn: 295554
* [InstCombine] add tests for trunc(insertelement); NFCSanjay Patel2017-02-181-0/+56
| | | | llvm-svn: 295553
* Refactor instruction simplification code in visitors. NFC.Easwaran Raman2017-02-181-88/+67
| | | | | | | | | | | | | | Several visitors check if operands to the instruction are constants, either as it is or after looking up SimplifiedValues, check if the result is a constant and update the SimplifiedValues map. This refactoring splits it into a common function that does the checking of whether the operands are constants and updating of the SimplifiedValues table, and an instruction specific part that is implemented by each instruction visitor as a lambda and passed to the common function. Differential revision: https://reviews.llvm.org/D30104 llvm-svn: 295552
* [InstCombine] update trunc(shuffle) tests to reflect IR reality; NFCSanjay Patel2017-02-181-9/+40
| | | | | | | | We're ok shrinking splats, but not shuffles in general. See https://reviews.llvm.org/D30123 for discussion. llvm-svn: 295547
* opt-viewer: Fix syntax highlightingBrian Cain2017-02-181-9/+18
| | | | | | | | | | | | | | | Syntax highlighting has been done line-at-a-time. Done this way, the lexer resets the context at each line, distorting the formatting. This change will render the whole file at once and feed the highlighted text line-at-a-time to be wrapped by the SourceFileRenderer. Leading/trailing newlines were being ignored by Pygments but since each line was rendered in its own row, it didn't matter. This bug was masked by the line-at-a-time algorithm. So now we need to add "stripnl=False" to the CppLexer to change its behavior to match the expectation. llvm-svn: 295546
* [AVX-512] Remove 128/256-bit masked fp max/min intrinsics. Upgrade them to ↵Craig Topper2017-02-185-60/+211
| | | | | | legacy unmasked intrinsics and select instructions. llvm-svn: 295543
* Add default OptLevel value for createSimpleLoopUnrollPass to fix the build ↵Dehao Chen2017-02-181-1/+1
| | | | | | break introduced by r295538. (NFC) llvm-svn: 295542
* AMDGPU/R600: Assert on infinite loop in EmitClauseMarkersJan Vesely2017-02-182-3/+33
| | | | | | Differential Revision: https://reviews.llvm.org/D29792 llvm-svn: 295539
* Increases full-unroll threshold.Dehao Chen2017-02-186-41/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The default threshold for fully unroll is too conservative. This patch doubles the full-unroll threshold This change will affect the following speccpu2006 benchmarks (performance numbers were collected from Intel Sandybridge): Performance: 403 0.11% 433 0.51% 445 0.48% 447 3.50% 453 1.49% 464 0.75% Code size: 403 0.56% 433 0.96% 445 2.16% 447 2.96% 453 0.94% 464 8.02% The compiler time overhead is similar with code size. Reviewers: davidxl, mkuper, mzolotukhin, hfinkel, chandlerc Reviewed By: hfinkel, chandlerc Subscribers: mehdi_amini, zzheng, efriedma, haicheng, hfinkel, llvm-commits Differential Revision: https://reviews.llvm.org/D28368 llvm-svn: 295538
* [IR/Verifier] Don't visit DISubprograms more than needed.Davide Italiano2017-02-182-2/+17
| | | | | | | | | | | | | Before this patch we happened to visit twice, one when scanning MDNodes and the other one while visiting the function. Remove the explicit call to visitDISubprogram there, so we don't emit the same error twice in case the verifier fail and we save some time when running it. Thanks to Justin Bogner for the report and Adrian for the quick review! PR: 31995 llvm-svn: 295537
* [AVR] Set UseIntegratedAssemblerDylan McKay2017-02-181-0/+1
| | | | llvm-svn: 295535
* OptDiag: Allow constructing DiagnosticLocation from DISubprogramsJustin Bogner2017-02-183-3/+11
| | | | | | | | This avoids creating a DILocation just to represent a line number, since creating Metadata is expensive. Creating a DiagnosticLocation directly is much cheaper. llvm-svn: 295531
* Remove the is_trivially_copyable check entirely.Zachary Turner2017-02-182-13/+0
| | | | | | | | | This is still breaking builds because some compilers think this type is not trivially copyable even when it should be. Reverting this static_assert until I have time to investigate. llvm-svn: 295529
* Use llvm workaround for missing is_trivially_copyable.Zachary Turner2017-02-182-6/+9
| | | | | | | some versions of GCC don't have this, so LLVM provides a workaround. llvm-svn: 295526
* Don't assume little endian in StreamReader / StreamWriter.Zachary Turner2017-02-1821-187/+144
| | | | | | | In an effort to generalize this so it can be used by more than just PDB code, we shouldn't assume little endian. llvm-svn: 295525
* machine-region-info.mir: Slightly simplify test, -mtripleMatthias Braun2017-02-181-16/+13
| | | | llvm-svn: 295520
* OptDiag: Decouple backend diagnostics from debug info metadataJustin Bogner2017-02-183-121/+143
| | | | | | | | | This creates and uses a DiagnosticLocation type rather than using DebugLoc for this purpose in the backend diagnostics. This is NFC for now, but will allow us to create locations for diagnostics without having to create new metadata nodes when we don't have a DILocation. llvm-svn: 295519
* MachineRegionInfo: Fix pass initializationMatthias Braun2017-02-185-10/+101
| | | | | | | | | | | | | | | | - Adapt MachineBasicBlock::getName() to have the same behavior as the IR BasicBlock (Value::getName()). - Add it to lib/CodeGen/CodeGen.cpp::initializeCodeGen so that it is linked in the CodeGen library. - MachineRegionInfoPass's name conflicts with RegionInfoPass's name ("region"). - MachineRegionInfo should depend on MachineDominatorTree, MachinePostDominatorTree and MachineDominanceFrontier instead of their respective IR versions. - Since there were no tests for this, add a X86 MIR test. Patch by Francis Visoiu Mistrih<fvisoiumistrih@apple.com> llvm-svn: 295518
* Verifier: Disallow a line number without a file in DISubprogramJustin Bogner2017-02-179-10/+26
| | | | | | | | A line number doesn't make much sense if you don't say where it's from. Add a verifier check for this and update some tests that had bogus debug info. llvm-svn: 295516
* [InstCombine] add tests for trunc(shuffle X, C, M); NFCSanjay Patel2017-02-171-2/+29
| | | | llvm-svn: 295513
* AArch64LoadStoreOptimizer: Correctly clear kill flagsMatthias Braun2017-02-172-8/+24
| | | | | | | | | | | When promoting the Load of a Store-Load pair to a COPY all kill flags between the store and the load need to be cleared. rdar://30402435 Differential Revision: https://reviews.llvm.org/D30110 llvm-svn: 295512
* [X86] Add MOVBE targets to load combine testsSimon Pilgrim2017-02-171-101/+165
| | | | | | Test folded endian swap tests with MOVBE instructions. llvm-svn: 295508
* [PPC] Give unaligned memory access lower cost on processor that supports itGuozhi Wei2017-02-173-1/+31
| | | | | | | | | | | | Newer ppc supports unaligned memory access, it reduces the cost of unaligned memory access significantly. This patch handles this case in PPCTTIImpl::getMemoryOpCost. This patch fixes pr31492. Differential Revision: https://reviews.llvm.org/D28630 This is resubmit of r292680, which was reverted by r293092. The internal application failures were actually caused by a source code bug. llvm-svn: 295506
* [CodeGen] Revert changes in LowLevelType to pre-r295499 to fix broken buildbots.Eugene Zelenko2017-02-172-35/+25
| | | | llvm-svn: 295505
* [Hexagon] Start using regmasks on callsKrzysztof Parzyszek2017-02-1720-119/+273
| | | | | | Reapply r295371 with a fix for the Windows bot failures. llvm-svn: 295504
* [NewGVN] isOnlyReachableViaThisEdge() is dead now. NFCI.Davide Italiano2017-02-171-18/+0
| | | | llvm-svn: 295503
* [X86] Simplify by pulling out valuetype. NFCI.Simon Pilgrim2017-02-171-2/+2
| | | | llvm-svn: 295502
* [CodeGen] Attempt to fix buildbots broken in r295499.Eugene Zelenko2017-02-171-1/+1
| | | | llvm-svn: 295501
* [NewGVN] createVariableOrConstant is not required anymore. NFCI.Davide Italiano2017-02-171-8/+0
| | | | llvm-svn: 295500
* [CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; ↵Eugene Zelenko2017-02-1712-127/+190
| | | | | | other minor fixes (NFC). llvm-svn: 295499
* [X86] Add subborrow stack folding testsSimon Pilgrim2017-02-171-0/+18
| | | | llvm-svn: 295496
* [x86] add tests for sext (not bool); NFCSanjay Patel2017-02-171-0/+72
| | | | llvm-svn: 295495
* [LAA] Remove unused code (NFC)Matthew Simpson2017-02-171-5/+0
| | | | llvm-svn: 295493
* [X86][SSE] Add (V)MOVD folding pattern with zextloadi64i32 load node.Simon Pilgrim2017-02-173-5/+9
| | | | | | Fixes PRPR31309 llvm-svn: 295492
* Fix windows bots by locking down the target triple on this testcase.Adrian Prantl2017-02-171-1/+1
| | | | llvm-svn: 295490
* AMDGPU: Fix crashes on invalid icmp/fcmp intrinsicsMatt Arsenault2017-02-173-5/+26
| | | | llvm-svn: 295489
* WholeProgramDevirt: For VCP use a 32-bit ConstantInt for the byte offset.Peter Collingbourne2017-02-174-10/+10
| | | | | | | | | | | | | | | A future change will cause this byte offset to be inttoptr'd and then exported via an absolute symbol. On the importing end we will expect the symbol to be in range [0,2^32) so that it will fit into a 32-bit relocation. The problem is that on 64-bit architectures if the offset is negative it will not be in the correct range once we inttoptr it. This change causes us to use a 32-bit integer so that it can be inttoptr'd (which zero extends) into the correct range. Differential Revision: https://reviews.llvm.org/D30016 llvm-svn: 295487
* Debug Info: Sort frame index expressions before emitting them.Adrian Prantl2017-02-174-36/+129
| | | | | | | | | | This fixes PR31381, which caused an assertion and/or invalid debug info. This affects debug variables that have multiple fragments in the MMI side (i.e.: in the stack frame) table. rdar://problem/30571676 llvm-svn: 295486
* [CMake] Support externalizing debug info on non-Darwin platformsPetr Hosek2017-02-171-2/+10
| | | | | | | | On other platorms, we use objcopy to export the debug info. Differential Revision: https://reviews.llvm.org/D28575 llvm-svn: 295481
* [X86][SHA] Add SHA stack folding testsSimon Pilgrim2017-02-171-0/+72
| | | | llvm-svn: 295479
* In Thumb1 mode, the custom lowering for ARMISD::CMPZ could never emit tADDi3Artyom Skrobov2017-02-172-18/+16
| | | | | | | | | | | | Reviewers: jmolloy, t.p.northover Reviewed By: t.p.northover Subscribers: t.p.northover, aemerson, rengolin, llvm-commits Differential Revision: https://reviews.llvm.org/D30097 llvm-svn: 295478
* [X86][TBM] Add TBM stack folding testsSimon Pilgrim2017-02-171-0/+201
| | | | llvm-svn: 295477
* GlobalISel: verify that generic loads & stores have a mem operand.Tim Northover2017-02-175-20/+28
| | | | | | | The mem operand is used by GlobalISel to convey atomic constraints so dropping it is invalid. llvm-svn: 295476
* [AArch64] Add Cavium ThunderX supportJoel Jones2017-02-178-2/+5622
| | | | | | | | | | | | | | This set of patches adds support for Cavium ThunderX ARM64 processors: * ThunderX * ThunderX T81 * ThunderX T83 * ThunderX T88 Patch by Stefan Teleman Differential Revision: https://reviews.llvm.org/D28891 llvm-svn: 295475
* WholeProgramDevirt: Examine the function body when deciding whether ↵Peter Collingbourne2017-02-172-18/+81
| | | | | | | | | | functions are readnone. The goal is to get an analysis result even for de-refineable functions. Differential Revision: https://reviews.llvm.org/D29803 llvm-svn: 295472
* [X86][BMI] Add BMI2 stack folding testsSimon Pilgrim2017-02-171-0/+77
| | | | llvm-svn: 295470
* opt: Rename -default-data-layout flag to -data-layout and make it always ↵Peter Collingbourne2017-02-1713-31/+27
| | | | | | | | | | override the layout. There isn't much point in a flag that only works if the data layout is empty. Differential Revision: https://reviews.llvm.org/D30014 llvm-svn: 295468
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