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* [SDAG] Fix visitAND optimization to deal with vector extract case again.Nirav Dave2017-04-062-1/+23
| | | | | | | | | | | | | | | Summary: Fix case elided by rL298920. Fixes PR32545. Reviewers: eli.friedman, RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D31759 llvm-svn: 299688
* [InstSimplify] Remove unreachable default from SimplifyBinOp.Craig Topper2017-04-061-22/+1
| | | | | | We have dedicated handlers for every opcode so nothing can get here anymore. The switch doesn't get detected as fully covered because Opcode is an unsigned. Casting to Instruction::BinaryOps still doesn't detect it because BinaryOpsEnd is in the enum and 1 past the last opcode. llvm-svn: 299687
* NewGVN: Rename some functions for consistencyDaniel Berlin2017-04-061-34/+35
| | | | llvm-svn: 299685
* NewGVN: Fixup some small issuesDaniel Berlin2017-04-061-21/+11
| | | | llvm-svn: 299684
* NewGVN: Fix a small formatting issue in performSymbolicLoadEvaluation.Daniel Berlin2017-04-061-3/+3
| | | | llvm-svn: 299683
* NewGVN: This patch makes memory congruence work for all types ofDaniel Berlin2017-04-064-207/+695
| | | | | | | | memorydefs, not just stores. Along the way, we audit and fixup issues about how we were tracking memory leaders, and improve the verifier to notice more memory congruency issues. llvm-svn: 299682
* [ARM] Add Kryo to available targetsYi Kong2017-04-064-1/+12
| | | | | | | | | | | | | | | | Summary: Host CPU detection now supports Kryo, so we need to recognize it in ARM target. Reviewers: mcrosier, t.p.northover, rengolin, echristo, srhines Reviewed By: t.p.northover, echristo Subscribers: aemerson Differential Revision: https://reviews.llvm.org/D31775 llvm-svn: 299674
* AMDGPU: Stop using CCAssignToRegWithShadowMatt Arsenault2017-04-063-30/+36
| | | | | | | This does not do what it is attempting to use it for and requires working around in LowerFormalArguments. llvm-svn: 299667
* [InstSimplify] Teach SimplifyMulInst to recognize vectors of i1 as And. Not ↵Craig Topper2017-04-062-1/+12
| | | | | | just scalar i1. llvm-svn: 299665
* [Hexagon] Change the vector scaling for vector offsetsKrzysztof Parzyszek2017-04-0610-397/+456
| | | | | | | Keep full offset value on MI-level instructions, but have it scaled down in the MC-level instructions. llvm-svn: 299664
* [ADT] Add a generic breadth-first-search graph iterator.Davide Italiano2017-04-063-0/+240
| | | | | | | | This will be used in LCSSA to speed up the canonicalization. Differential Revision: https://reviews.llvm.org/D31694 llvm-svn: 299660
* [AMDGPU] Eliminate barrier if workgroup size is not greater than wavefront sizeStanislav Mekhanoshin2017-04-063-1/+42
| | | | | | | | | | If a workgroup size is known to be not greater than wavefront size the s_barrier instruction is not needed since all threads are guarantied to come to the same point at the same time. Differential Revision: https://reviews.llvm.org/D31731 llvm-svn: 299659
* [InstCombine] Fix a case where we weren't checking that an instruction had a ↵Craig Topper2017-04-061-6/+9
| | | | | | single use resulting in extra instructions being created. llvm-svn: 299658
* [AMDGPU] Resubmit SDWA peephole: enable by defaultSam Kolton2017-04-0644-440/+613
| | | | | | | | | | Reviewers: vpykhtin, rampitec, arsenm Subscribers: qcolombet, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye Differential Revision: https://reviews.llvm.org/D31671 llvm-svn: 299654
* [SelectionDAG] NFC patch removing a redundant check.Jonas Paulsson2017-04-061-8/+4
| | | | | | | | | Since the BUILD_VECTOR has already been checked by isBuildVectorOfConstantSDNodes() in SelectionDAG::getNode() for a SIGN_EXTEND_INREG, it can be assumed that Op is always either undef or a ConstantSDNode, and Ops.size() will always equal VT.getVectorNumElements(). llvm-svn: 299647
* [X86][MMX] Test showing failure to create MMX non-temporal storeSimon Pilgrim2017-04-061-7/+26
| | | | llvm-svn: 299640
* [globalisel][tablegen] Move <Target>InstructionSelector declarations to ↵Daniel Sanders2017-04-0610-153/+120
| | | | | | | | | | | | | | | | anonymous namespaces Summary: This resolves the issue of tablegen-erated includes in the headers for non-GlobalISel builds in a simpler way than before. Reviewers: qcolombet, ab Reviewed By: ab Subscribers: igorb, ab, mgorny, dberris, rovka, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D30998 llvm-svn: 299637
* [ARM] Remove a dead ADD during the creation of TBBsDavid Green2017-04-062-1/+166
| | | | | | | | | During the optimisation of jump tables in the constant island pass, an extra ADD could be left over, now dead but not removed. Differential Revision: https://reviews.llvm.org/D31389 llvm-svn: 299634
* [InstSimplify] Add test cases for mixing add/sub i1 with xor of i1. Seems we ↵Craig Topper2017-04-061-0/+42
| | | | | | can simplify in one direction but not the other. llvm-svn: 299627
* [InstSimplify] Teach SimplifyAddInst and SimplifySubInst that vectors of i1 ↵Craig Topper2017-04-062-2/+38
| | | | | | can be treated as Xor too. llvm-svn: 299626
* [XRay][docs] Fix hyperlink to XRay docDean Michael Berris2017-04-061-3/+2
| | | | llvm-svn: 299624
* [Orc] Add missing header include for r299611.Lang Hames2017-04-061-0/+1
| | | | llvm-svn: 299623
* Revert accidental commit of r299619.Craig Topper2017-04-061-15/+31
| | | | llvm-svn: 299622
* Revert accidental commit of r299618Craig Topper2017-04-061-3/+0
| | | | llvm-svn: 299621
* [IR] Add commutable matchers for Add and Mul to go with the logic operations ↵Craig Topper2017-04-061-0/+16
| | | | | | that are already present. NFC llvm-svn: 299620
* barCraig Topper2017-04-061-31/+15
| | | | llvm-svn: 299619
* fooCraig Topper2017-04-061-0/+3
| | | | llvm-svn: 299618
* [XRay] - Fix spelling error to test commit access.Keith Wyss2017-04-061-1/+1
| | | | | | Just a spelling change in a comment intended to test svn commit access. llvm-svn: 299616
* [Orc] Break QueueChannel out into its own header and add a utility,Lang Hames2017-04-064-83/+200
| | | | | | createPairedQueueChannels, to simplify channel creation in the RPC unit tests. llvm-svn: 299611
* [Orc] Make orcError return an error_code rather than Error.Lang Hames2017-04-064-20/+25
| | | | | | | This will allow orcError to be used in convertToErrorCode implementations, which will help in transitioning Orc RPC to Error. llvm-svn: 299610
* [lit] Implement timeouts and max_time for process pool testingReid Kleckner2017-04-063-50/+83
| | | | | | | | | | | | | | | | | | | This is necessary to pass the lit test suite at llvm/utils/lit/tests. There are some pre-existing failures here, but now switching to pools doesn't regress any tests. I had to change test-data/lit.cfg to import DummyConfig from a module to fix pickling problems, but I think it'll be OK if we require test formats to be written in real .py modules outside lit.cfg files. I also discovered that in some circumstances AsyncResult.wait() will not raise KeyboardInterrupt in a timely manner, but you can pass a non-zero timeout to work around this. This makes threading.Condition.wait use a polling loop that runs through the interpreter, so it's capable of asynchronously raising KeyboardInterrupt. llvm-svn: 299605
* StringTableBuilder: Don't assert when writing an empty raw string table.Peter Collingbourne2017-04-061-1/+1
| | | | llvm-svn: 299602
* Bitcode: Remove an unused declaration. NFC.Peter Collingbourne2017-04-051-1/+0
| | | | llvm-svn: 299598
* [Bugpoint] Use `unique_ptr` correctly.Bryant Wong2017-04-051-11/+12
| | | | | | | | | | Moving Modules into `testMergedProgram` is incorrect (and causes segmentation faults) since all callers expect to retain ownership. This is evidenced by the later calls to `unique_ptr<Module>::get` in the same function. Differential Revision: https://reviews.llvm.org/D31727 llvm-svn: 299596
* [X86 TTI] Implement LSV hookKeno Fischer2017-04-053-2/+45
| | | | | | | | | | | | | | | | | | Summary: LSV wants to know the maximum size that can be loaded to a vector register. On X86, this always matches the maximum register width. Implement this accordingly and add a test to make sure that LSV can vectorize up to the maximum permissible width on X86. Reviewers: delena, arsenm Reviewed By: arsenm Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D31504 llvm-svn: 299589
* Remove accidental debug printf. Follow up to r299583.Ivan Krasin2017-04-051-1/+0
| | | | llvm-svn: 299584
* Revert r299536. [AMDGPU] SDWA peephole: enable by default.Ivan Krasin2017-04-0544-609/+436
| | | | | | | | | | | Reason: breaks multiple bots: http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/3988 http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/1173 Original Review URL: https://reviews.llvm.org/D31671 llvm-svn: 299583
* [Hexagon] Use -mattr to select HVX mode in a testcase, NFCKrzysztof Parzyszek2017-04-051-3/+2
| | | | llvm-svn: 299582
* MemorySSA: Remove MemorySSA walker caching.Daniel Berlin2017-04-051-217/+14
| | | | | | | | | | | | | | | | | | | | | | Summary: Remove all the caching the clobber walker does, and that the caching walker does. With the patch to enable storing clobbering access results for stores, i can find no improvement with the cache turned on (and a number of degradations, both time and memory, from the cost of caching. For a large program i have, we do millions of lookups and inserts with zero hits). I haven't tried to rename or simplify the walker otherwise yet. (Appreciate some perf testing on this past my own testing) Reviewers: george.burgess.iv, davide Subscribers: Prazek, llvm-commits Differential Revision: https://reviews.llvm.org/D31576 llvm-svn: 299578
* [llvm-readobj] Only print the real size of the notePetr Hosek2017-04-051-6/+5
| | | | | | | | | | | | | | | | | Note payloads are padded to a multiple of 4 bytes in size, but the size of the string that should be print can be smaller e.g. the n_descsz field in gold's version note is 9, so that's the whole size of the string that should be printed. The padding is part of the format of a SHT_NOTE section or PT_NOTE segment, but it's not part of the note itself. Printing the extra null bytes may confuse some tools, e.g. when the llvm-readobj is sent to grep, it treats the output as binary because it contains a null byte. Differential Revision: https://reviews.llvm.org/D30804 llvm-svn: 299576
* [DAGCombine] Support FMF contract in fused multiple-and-sub tooAdam Nemet2017-04-052-28/+60
| | | | | | | | | This is a follow-on to r299096 which added support for fmadd. Subtract does not have the case where with two multiply operands we commute in order to fuse with the multiply with the fewer uses. llvm-svn: 299572
* [DAGCombine] Remove commented-out code from r299096Adam Nemet2017-04-051-1/+1
| | | | llvm-svn: 299571
* [InstCombine] add fold for icmp with or mask of low bits (PR32542)Sanjay Patel2017-04-052-8/+14
| | | | | | | | | | | | | | | | | | | | We already have these 'and' folds: // X & -C == -C -> X > u ~C // X & -C != -C -> X <= u ~C // iff C is a power of 2 ...but we were missing the 'or' siblings. http://rise4fun.com/Alive/n6 This should improve: https://bugs.llvm.org/show_bug.cgi?id=32524 ...but there are 2 or more other pieces to fix still. Differential Revision: https://reviews.llvm.org/D31712 llvm-svn: 299570
* [ExecutionDepsFix] Don't recurse over the CFGKeno Fischer2017-04-052-23/+23
| | | | | | | | | | | Summary: Use an explicit work queue instead, to avoid accidentally causing stack overflows for input with very large CFGs. Reviewed By: mehdi_amini Differential Revision: https://reviews.llvm.org/D31681 llvm-svn: 299569
* [InstCombine] fix formatting and variable names; NFCISanjay Patel2017-04-051-236/+252
| | | | | | | There must be some opportunity to refactor big chunks of nearly duplicated code in FoldOrOfICmps / FoldAndOfICmps. Also, none of this works with vectors, but it should. llvm-svn: 299568
* [AMDGPU][MC] Fix for Bug 28158 + LIT testsDmitry Preobrazhensky2017-04-052-0/+35
| | | | | | | | | | | | | | | Added support of the following instructions: - s_cbranch_cdbgsys - s_cbranch_cdbgsys_and_user - s_cbranch_cdbgsys_or_user - s_cbranch_cdbguser - s_setkill Reviewers: vpykhtin Differential Revision: https://reviews.llvm.org/D31469 llvm-svn: 299567
* MemorySSA: Fix and use optimized_def_chainDaniel Berlin2017-04-052-2/+2
| | | | llvm-svn: 299566
* [lit] Revert to old execution strategy while I debug these pickling errorsReid Kleckner2017-04-051-1/+1
| | | | llvm-svn: 299565
* [lit] Use Python 3 style print to satisfy some botsReid Kleckner2017-04-051-1/+1
| | | | llvm-svn: 299564
* ARMFrameLowering: Slight cleanups; NFCMatthias Braun2017-04-051-4/+5
| | | | llvm-svn: 299562
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