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* fix minsize detection: minsize attribute implies optimizing for sizeSanjay Patel2015-08-102-3/+39
| | | | llvm-svn: 244528
* [LoopVer] Remove unused pointer partition argument, NFC.Adam Nemet2015-08-102-4/+2
| | | | llvm-svn: 244527
* Extend late diagnostics to include late test for runtime pointer checks.Tyler Nowicki2015-08-104-15/+84
| | | | | | This patch moves checking the threshold of runtime pointer checks to the vectorization requirements (late diagnostics) and emits a diagnostic that infroms the user the loop would be vectorized if not for exceeding the pointer-check threshold. Clang will also append the options that can be used to allow vectorization. llvm-svn: 244523
* WebAssembly: print immediatesJF Bastien2015-08-104-20/+216
| | | | | | | | | | | | | | | Summary: For now output using C99's hexadecimal floating-point representation. This patch also cleans up how machine operands are printed: instead of special-casing per type of machine instruction, the code now handles operands generically. Reviewers: sunfish Subscribers: llvm-commits, jfb Differential Revision: http://reviews.llvm.org/D11914 llvm-svn: 244520
* Add support for the signx instrution alias of SPARCv9.Joerg Sonnenberger2015-08-102-0/+14
| | | | llvm-svn: 244519
* NFC. Fix some format issues in lib/CodeGen/MachineBasicBlock.cpp.Cong Hou2015-08-101-11/+13
| | | | llvm-svn: 244518
* cmake: Make CMAKE_BUILD_TYPE check case-insensitiveJustin Bogner2015-08-101-5/+4
| | | | | | | Juergen pointed out that this variable is treated in a case insensitive way. llvm-svn: 244516
* MachineVerifier: Handle the optional def operand in a PATCHPOINT instruction.Alex Lorenz2015-08-102-1/+47
| | | | | | | | | | | | The PATCHPOINT instructions have a single optional defined register operand, but the machine verifier can't verify the optional defined register operands. This commit makes sure that the machine verifier won't report an error when a PATCHPOINT instruction doesn't have its optional defined register operand. This change will allow us to enable the machine verifier for the code generation tests for the patchpoint intrinsics. Reviewers: Juergen Ributzka llvm-svn: 244513
* [llvm-symbolizer] Remove underscores and other C mangling on WindowsReid Kleckner2015-08-107-47/+118
| | | | | | | | | | | | | | | Summary: This makes it so that reports symbolized after the fact with llvm-symbolizer are more similar to the ones we generate at runtime with in-process dbghelp. Reviewers: samsonov Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11785 llvm-svn: 244512
* Don't iterate over all sections in the ELFFile constructor.Rafael Espindola2015-08-105-62/+103
| | | | | | | With this we finally have an ELFFile that is O(1) to construct. This is helpful for programs like lld which have to do their own section walk. llvm-svn: 244510
* remove function names from comments; NFCSanjay Patel2015-08-101-22/+20
| | | | llvm-svn: 244509
* StackMap: FastISel: Add an appropriate number of immediate operands to theAlex Lorenz2015-08-104-3/+66
| | | | | | | | | | | | | | | | | | frame setup instruction. This commit ensures that the stack map lowering code in FastISel adds an appropriate number of immediate operands to the frame setup instruction. The previous code added just one immediate operand, which was fine for a target like AArch64, but on X86 the ADJCALLSTACKDOWN64 instruction needs two explicit operands. This caused the machine verifier to report an error when the old code added just one. Reviewers: Juergen Ributzka Differential Revision: http://reviews.llvm.org/D11853 llvm-svn: 244508
* Rename improperly named variable. NFC.Rafael Espindola2015-08-101-3/+3
| | | | llvm-svn: 244507
* Make fp vectorization test X86 specified to avoid cost-model related ↵Tyler Nowicki2015-08-101-1/+1
| | | | | | problems on arm-thumb and hexagon. llvm-svn: 244505
* Add a test showing that objdump (and so ObjectFIle) can handle shndx.Rafael Espindola2015-08-102-0/+8
| | | | | | It was already passing, we were just not testing the code. llvm-svn: 244504
* x86: Emit LAHF/SAHF instead of PUSHF/POPFJF Bastien2015-08-103-55/+148
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NaCl's sandbox doesn't allow PUSHF/POPF out of security concerns (priviledged emulators have forgotten to mask system bits in the past, and EFLAGS's DF bit is a constant source of hilarity). Commit r220529 fixed PR20376 by saving cmpxchg's flags result using EFLAGS, this commit now generated LAHF/SAHF instead, for all of x86 (not just NaCl) because it leads to an overall performance gain over PUSHF/POPF. As with the previous patch this code generation is pretty bad because it occurs very later, after register allocation, and in many cases it rematerializes flags which were already available (e.g. already in a register through SETE). Fortunately it's somewhat rare that this code needs to fire. I did [[ https://github.com/jfbastien/benchmark-x86-flags | a bit of benchmarking ]], the results on an Intel Haswell E5-2690 CPU at 2.9GHz are: | Time per call (ms) | Runtime (ms) | Benchmark | | 0.000012514 | 6257 | sete.i386 | | 0.000012810 | 6405 | sete.i386-fast | | 0.000010456 | 5228 | sete.x86-64 | | 0.000010496 | 5248 | sete.x86-64-fast | | 0.000012906 | 6453 | lahf-sahf.i386 | | 0.000013236 | 6618 | lahf-sahf.i386-fast | | 0.000010580 | 5290 | lahf-sahf.x86-64 | | 0.000010304 | 5152 | lahf-sahf.x86-64-fast | | 0.000028056 | 14028 | pushf-popf.i386 | | 0.000027160 | 13580 | pushf-popf.i386-fast | | 0.000023810 | 11905 | pushf-popf.x86-64 | | 0.000026468 | 13234 | pushf-popf.x86-64-fast | Clearly `PUSHF`/`POPF` are suboptimal. It doesn't really seems to be worth teaching LLVM about individual flags, at least not for this purpose. Reviewers: rnk, jvoung, t.p.northover Subscribers: llvm-commits Differential revision: http://reviews.llvm.org/D6629 llvm-svn: 244503
* Use higher level functions in llvm-objdump.Rafael Espindola2015-08-101-17/+12
| | | | | | | This matches the rest of llvm-objdump better and isolates it from upcoming changes to ELFFile. llvm-svn: 244500
* fix minsize detection: minsize attribute implies optimizing for sizeSanjay Patel2015-08-102-8/+4
| | | | llvm-svn: 244499
* [x86, SSE]]add missing tests for load folding with partial register updateSanjay Patel2015-08-101-0/+34
| | | | | | The minsize case is wrong; that will be fixed in the next commit. llvm-svn: 244498
* Delete getDotSymtabSec.Rafael Espindola2015-08-104-17/+33
| | | | | | Another step in avoiding iterating over all sections in the ELFFile constructor. llvm-svn: 244496
* [InstCombine] Move SSE2/AVX2 arithmetic vector shift folding to instcombinerSimon Pilgrim2015-08-105-149/+340
| | | | | | | | As discussed in D11760, this patch moves the (V)PSRA(WD) arithmetic shift-by-constant folding to InstCombine to match the logical shift implementations. Differential Revision: http://reviews.llvm.org/D11886 llvm-svn: 244495
* Removed unused and incorrectly implemented classof() on Optimization Remark ↵Tyler Nowicki2015-08-101-4/+0
| | | | | | base class. llvm-svn: 244494
* [TableGen] NFC improving comments about what the tokenized identifiers will ↵Colin LeMahieu2015-08-101-1/+2
| | | | | | contain. llvm-svn: 244493
* Fix a few more cases of 'CHECK[^:]*$'. NFCIJonathan Roelofs2015-08-102-5/+5
| | | | llvm-svn: 244491
* Late evaluation of the fast-math vectorization requirement.Tyler Nowicki2015-08-107-14/+263
| | | | | | This patch moves the verification of fast-math to just before vectorization is done. This way we can tell clang to append the command line options would that allow floating-point commutativity. Specifically those are enableing fast-math or specifying a loop hint. llvm-svn: 244489
* Fix another case of 'CHECK[^:]*$'. NFCIJonathan Roelofs2015-08-101-388/+388
| | | | llvm-svn: 244486
* Modify diagnostic messages to clearly indicate the why interleaving wasn't done.Tyler Nowicki2015-08-104-25/+186
| | | | | | Sometimes interleaving is not beneficial, as determined by the cost-model and sometimes it is disabled by a loop hint (by the user). This patch modifies the diagnostic messages to make it clear why interleaving wasn't done. llvm-svn: 244485
* [Sparc] Implement i64 load/store support for 32-bit sparc.James Y Knight2015-08-1018-56/+841
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The LDD/STD instructions can load/store a 64bit quantity from/to memory to/from a consecutive even/odd pair of (32-bit) registers. They are part of SparcV8, and also present in SparcV9. (Although deprecated there, as you can store 64bits in one register). As recommended on llvmdev in the thread "How to enable use of 64bit load/store for 32bit architecture" from Apr 2015, I've modeled the 64-bit load/store operations as working on a v2i32 type, rather than making i64 a legal type, but with few legal operations. The latter does not (currently) work, as there is much code in llvm which assumes that if i64 is legal, operations like "add" will actually work on it. The same assumption does not hold for v2i32 -- for vector types, it is workable to support only load/store, and expand everything else. This patch: - Adds a new register class, IntPair, for even/odd pairs of registers. - Modifies the list of reserved registers, the stack spilling code, and register copying code to support the IntPair register class. - Adds support in AsmParser. (note that in asm text, you write the name of the first register of the pair only. So the parser has to morph the single register into the equivalent paired register). - Adds the new instructions themselves (LDD/STD/LDDA/STDA). - Hooks up the instructions and registers as a vector type v2i32. Adds custom legalizer to transform i64 load/stores into v2i32 load/stores and bitcasts, so that the new instructions can actually be generated, and marks all operations other than load/store on v2i32 as needing to be expanded. - Copies the unfortunate SelectInlineAsm hack from ARMISelDAGToDAG. This hack undoes the transformation of i64 operands into two arbitrarily-allocated separate i32 registers in SelectionDAGBuilder. and instead passes them in a single IntPair. (Arbitrarily allocated registers are not useful, asm code expects to be receiving a pair, which can be passed to ldd/std.) Also adds a bunch of test cases covering all the bugs I've added along the way. Differential Revision: http://reviews.llvm.org/D8713 llvm-svn: 244484
* rename toELFShdrIter to getSection and move it closer to getSymbol. NFC.Rafael Espindola2015-08-101-13/+17
| | | | llvm-svn: 244483
* toELFSymIter and getSymbol are now the same thing. Merge them.Rafael Espindola2015-08-101-18/+10
| | | | llvm-svn: 244482
* Fix a bunch of trivial cases of 'CHECK[^:]*$' in the tests. NFCIJonathan Roelofs2015-08-1026-45/+45
| | | | | | | I looked into adding a warning / error for this to FileCheck, but there doesn't seem to be a good way to avoid it triggering on the instances of it in RUN lines. llvm-svn: 244481
* Use continue to reduce indentation. NFC.Rafael Espindola2015-08-101-17/+19
| | | | llvm-svn: 244480
* [AArch64] Convert a conditional check that will always be true to an assert. ↵Chad Rosier2015-08-101-6/+4
| | | | | | NFC. llvm-svn: 244479
* Recommit r244470+ r244471 together, the bot failed between them.Yaron Keren2015-08-101-7/+5
| | | | llvm-svn: 244476
* [IndVarSimplify] Make cost estimation in RewriteLoopExitValues smarterIgor Laevsky2015-08-103-51/+67
| | | | | | Differential Revision: http://reviews.llvm.org/D11687 llvm-svn: 244474
* Revert r244470 and 244471 while looking into it.Yaron Keren2015-08-101-5/+7
| | | | llvm-svn: 244472
* Second part of r244470 (source file was unsaved in editor).Yaron Keren2015-08-101-5/+5
| | | | llvm-svn: 244471
* Really implement David Blaikie suggestion in full of seperatingYaron Keren2015-08-101-3/+1
| | | | | | | variable initialization from its usage in the push_back making collapse of the two statements unlikely even without a comment. llvm-svn: 244470
* Add new llvm.loop.unroll.enable metadata.Mark Heffernan2015-08-103-20/+118
| | | | | | | | | | | | | This change adds the unroll metadata "llvm.loop.unroll.enable" which directs the optimizer to unroll a loop fully if the trip count is known at compile time, and unroll partially if the trip count is not known at compile time. This differs from "llvm.loop.unroll.full" which explicitly does not unroll a loop if the trip count is not known at compile time. The "llvm.loop.unroll.enable" is intended to be added for loops annotated with "#pragma unroll". llvm-svn: 244466
* Typo. Move comment closer to relevant code. NFC.Chad Rosier2015-08-101-3/+4
| | | | llvm-svn: 244465
* fix minsize detection: minsize attribute implies optimizing for sizeSanjay Patel2015-08-102-9/+7
| | | | llvm-svn: 244464
* fix minsize detection: minsize attribute implies optimizing for sizeSanjay Patel2015-08-102-6/+3
| | | | llvm-svn: 244463
* Fully apply David Blaikie suggestion and add comment explaining why.Yaron Keren2015-08-101-1/+3
| | | | llvm-svn: 244461
* fix minsize detection: minsize attribute implies optimizing for sizeSanjay Patel2015-08-102-3/+2
| | | | llvm-svn: 244460
* fix minsize detection: minsize attribute implies optimizing for sizeSanjay Patel2015-08-102-9/+8
| | | | llvm-svn: 244458
* Add missing include guard to FuzzerInternal.h, NFC.Yaron Keren2015-08-101-0/+6
| | | | llvm-svn: 244457
* Modify r244405 to clearer code, per David Blaikie suggestion.Yaron Keren2015-08-101-2/+2
| | | | llvm-svn: 244455
* Silence a sign mismatch warning; NFC.Aaron Ballman2015-08-101-1/+1
| | | | llvm-svn: 244452
* [TTI] Add a hook for specifying per-target defaults for Interleaved AccessesSilviu Baranga2015-08-104-2/+21
| | | | | | | | | | | | | | | Summary: This adds a hook to TTI which enables us to selectively turn on by default interleaved access vectorization for targets on which we have have performed the required benchmarking. Reviewers: rengolin Subscribers: rengolin, llvm-commits Differential Revision: http://reviews.llvm.org/D11901 llvm-svn: 244449
* Prevent the scalarizer from caching incorrect entriesFraser Cormack2015-08-102-2/+38
| | | | | | | | | | | | | | The scalarizer can cache incorrect entries when walking up a chain of insertelement instructions. This occurs when it encounters more than one instruction that it is not actively searching for, as it unconditionally caches every element it finds. The fix is to only cache the first element that it isn't searching for so we don't overwrite correct entries. Reviewers: hfinkel Differential Revision: http://reviews.llvm.org/D11559 llvm-svn: 244448
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