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* [InstCombine] clean up adjustMinMax(); NFCISanjay Patel2016-11-011-92/+87
| | | | | | | | | 1. Change param names for readability 2. Change pointer param to ref 3. Early exit to reduce indent 4. Change switch to if/else llvm-svn: 285718
* Test Commit, removed extraneous newlineErich Keane2016-11-011-1/+0
| | | | llvm-svn: 285717
* [AMDGPU] Check if type transforms to i16 (VI+) when getting AMDGPUISD::FFBH_U32Konstantin Zhuravlyov2016-11-015-104/+103
| | | | | | | | | | | This will prevent following regression when enabling i16 support (D18049): test/CodeGen/AMDGPU/ctlz.ll test/CodeGen/AMDGPU/ctlz_zero_undef.ll Differential Revision: https://reviews.llvm.org/D25802 llvm-svn: 285716
* [InstCombine] add helper function for adjustMinMax(); NFCISanjay Patel2016-11-011-6/+19
| | | | | | This is just a cut and paste; clean-up and enhancements to follow. llvm-svn: 285715
* [CMake] Fix rpath construction for out-of-tree buildsChris Bieneman2016-11-012-14/+37
| | | | | | | | This patch was produced in conjunction with Michał Górny. It should resolve the issues that were trying to be solved by D25304. This moves rpath handling into `llvm_add_library` and `add_llvm_executable` so that it is available to all projects using AddLLVM whether built in-tree or out-of-tree. llvm-svn: 285714
* [InstCombine] add vector tests for ext+adjust min/maxSanjay Patel2016-11-011-4/+116
| | | | llvm-svn: 285713
* [RISCV] Add stub backendAlex Bradbury2016-11-0111-0/+206
| | | | | | | | | | | | | | This contains just enough for lib/Target/RISCV to compile. Notably a basic RISCVTargetMachine and RISCVTargetInfo. At this point you can attempt llc -march=riscv32 myinput.ll and will find it fails due to the lack of MCAsmInfo. See http://lists.llvm.org/pipermail/llvm-dev/2016-August/103748.html for further discussion Differential Revision: https://reviews.llvm.org/D23560 llvm-svn: 285712
* AMDGPU: Fix buildbots broken by r285704Tom Stellard2016-11-011-2/+1
| | | | llvm-svn: 285711
* [RISCV] Add missing RISCV.defAlex Bradbury2016-11-011-0/+50
| | | | | | Fix rL285708 llvm-svn: 285709
* [RISCV] Add RISC-V ELF definesAlex Bradbury2016-11-016-0/+32
| | | | | | | | | | Add the necessary definitions for RISC-V ELF files, including relocs. Also make necessary trivial change to ELFYaml, llvm-objdump, and llvm-readobj in order to work with RISC-V ELFs. Differential Revision: https://reviews.llvm.org/D23557 llvm-svn: 285708
* [RISCV] Recognise riscv32 and riscv64 in triple parsing codeAlex Bradbury2016-11-013-0/+59
| | | | | | | | | | | This is the first in a series of 10 initial patches that incrementally add an MC layer for RISC-V to LLVM. See <http://lists.llvm.org/pipermail/llvm-dev/2016-August/103748.html> for more discussion. Differential Revision: https://reviews.llvm.org/D23557 llvm-svn: 285707
* [InstCombine] move/fix tests for adjusted min/maxSanjay Patel2016-11-012-104/+104
| | | | | | | I think the former 'test50' had a typo making it functionally equivalent to the former 'test49'; changed the predicate to provide more coverage. llvm-svn: 285706
* [TableGen] Move OperandMatchResultTy enum to MCTargetAsmParser.hAlex Bradbury2016-11-0110-85/+84
| | | | | | | | | | | | | | | As it stands, the OperandMatchResultTy is only included in the generated header if there is custom operand parsing. However, almost all backends make use of MatchOperand_Success and friends from OperandMatchResultTy for e.g. parseRegister. This is a pain when starting an AsmParser for a new backend that doesn't yet have custom operand parsing. Move the enum to MCTargetAsmParser.h. This patch is a prerequisite for D23563 Differential Revision: https://reviews.llvm.org/D23496 llvm-svn: 285705
* AMDGPU: Implement expansion of f16 = FP_TO_FP16 f64Tom Stellard2016-11-014-19/+129
| | | | | | | | | | | | | | | | | | | | | | I wanted to implement this as a target independent expansion, however when targets say they want to expand FP_TO_FP16 what they actually want is the unsafe math expansion when possible and expansion to a libcall in all other cases. The only way to make this work as a target independent would be to add logic to target's TargetLowering construction to mark theses nodes as Expand when LegalizeDAG can use the unsafe expansion and mark them as LibCall when it cannot. I think this would be possible, but I think it would be too fragile and complex as it would require targets to keep their expansion logic up to date with the code in LegalizeDAG. Reviewers: bogner, ab, t.p.northover, arsenm Subscribers: wdng, llvm-commits, nhaehnle Differential Revision: https://reviews.llvm.org/D25999 llvm-svn: 285704
* This is a 1 character fix for an ARM build attribute test (r284571): theSjoerd Meijer2016-11-011-1/+1
| | | | | | | purpose of the test was to have 2 different function attribute sets, but due to a typo there was only one both with number #0. llvm-svn: 285701
* [InstCombine] fix tests for adjusted min/maxSanjay Patel2016-11-012-181/+273
| | | | | | | | | | | 1. Delete identical tests 2. Rename tests to reflect actual functionality 3. Add comments 4. Add unsigned variants 5. Add vector variants with FIXME comments 6. Rename test file llvm-svn: 285699
* [InstCombine] Folding of shifts by the sum of positive valuesSimon Pilgrim2016-11-012-1/+84
| | | | | | | | | | | | | | | This patch introduces the combine: (C1 shift (A add C2)) -> ((C1 shift C2) shift A) iff A and C2 are both positive If both A and C2 are know to be positive then we can safely split into 2 shifts, permitting the folding of the Inner shift. Fix for the spec benchmark case mentioned by @nadav on PR15141 (assuming we can prove that the inputs as positive). Differential Revision: https://reviews.llvm.org/D26000 llvm-svn: 285696
* [InstCombine] auto-generate better checksSanjay Patel2016-11-011-1/+97
| | | | llvm-svn: 285693
* [Sparc][LEON] Test for FixFDIVSQRT erratum fix. Chris Dewhurst2016-11-011-0/+59
| | | | | | | | Note: Test is per differential review, but the other changed code in the review was for an optimisation that din't quite work. Nevertheless, the test is valid for the unoptimised version of the fix. Differential Review: https://reviews.llvm.org/D24658 llvm-svn: 285692
* [Thumb-1] Synthesize TBB/TBH instructions to make use of compressed jump tablesJames Molloy2016-11-019-38/+314
| | | | | | | | | | | | | | | | | | | | | | | | | | | | [Reapplying r284580 and r285917 with fix and testing to ensure emitted jump tables for Thumb-1 have 4-byte alignment] The TBB and TBH instructions in Thumb-2 allow jump tables to be compressed into sequences of bytes or shorts respectively. These instructions do not exist in Thumb-1, however it is possible to synthesize them out of a sequence of other instructions. It turns out this sequence is so short that it's almost never a lose for performance and is ALWAYS a significant win for code size. TBB example: Before: lsls r0, r0, #2 After: add r0, pc adr r1, .LJTI0_0 ldrb r0, [r0, #6] ldr r0, [r0, r1] lsls r0, r0, #1 mov pc, r0 add pc, r0 => No change in prologue code size or dynamic instruction count. Jump table shrunk by a factor of 4. The only case that can increase dynamic instruction count is the TBH case: Before: lsls r0, r4, #2 After: lsls r4, r4, #1 adr r1, .LJTI0_0 add r4, pc ldr r0, [r0, r1] ldrh r4, [r4, #6] mov pc, r0 lsls r4, r4, #1 add pc, r4 => 1 more instruction in prologue. Jump table shrunk by a factor of 2. So there is an argument that this should be disabled when optimizing for performance (and a TBH needs to be generated). I'm not so sure about that in practice, because on small cores with Thumb-1 performance is often tied to code size. But I'm willing to turn it off when optimizing for performance if people want (also note that TBHs are fairly rare in practice!) llvm-svn: 285690
* [AMDGPU] Expand vector mulhu/mulhsValery Pykhtin2016-11-013-0/+28
| | | | | | Differential revision: https://reviews.llvm.org/D26077 llvm-svn: 285684
* [PowerPC] Implement vector shift builtins - llvm portionNemanja Ivanovic2016-11-013-2/+29
| | | | | | | This patch corresponds to review https://reviews.llvm.org/D26095. Committing on behalf of Tony Jiang. llvm-svn: 285681
* Attempt to pacify buildbotSerge Pavlov2016-11-011-1/+1
| | | | llvm-svn: 285676
* Allow resolving response file names relative to including fileSerge Pavlov2016-11-013-7/+91
| | | | | | | | | | | | | | If a response file included by construct @file itself includes a response file and that file is specified by relative file name, current behavior is to resolve the name relative to the current working directory. The change adds additional flag to ExpandResponseFiles that may be used to resolve nested response file names relative to including file. With the new mode a set of related response files may be kept together and reference each other with short position independent names. Differential Revision: https://reviews.llvm.org/D24917 llvm-svn: 285675
* [docs] remove more non-ascii stuff in the hopes to fix the bot Kostya Serebryany2016-11-011-10/+10
| | | | llvm-svn: 285668
* [TBAA] Use wrapper objects instead of raw getOperand s; NFCSanjoy Das2016-11-011-33/+47
| | | | | | | | | | | | This is intended to make the semantic intent clearer. The wrapper objects are now generic to avoid `const_cast` s. Since `const` ness is part of the API of `MDNode::getMostGenericTBAA` (and therefore I can't make things `const` all the way through without some code churn outside TypeBasedAliasAnalysis.cpp), this seemed like the cleanest solution. llvm-svn: 285665
* [TBAA] Rename accessors to be more idiomatic; NFCSanjoy Das2016-11-011-10/+10
| | | | llvm-svn: 285661
* Bitcode: Simplify BitstreamWriter::EnterBlockInfoBlock() interface.Peter Collingbourne2016-11-012-3/+3
| | | | | | | | | | | No block info block should need to define local abbreviations, so we can always use a code width of 2. Also change all block info block writers to use EnterBlockInfoBlock. Differential Revision: https://reviews.llvm.org/D26168 llvm-svn: 285660
* AMDGPU: Whitespace fixesMatt Arsenault2016-11-018-40/+38
| | | | llvm-svn: 285659
* [DAG] disable nsw/nuw for add/sub/mul when simplifying based on demanded ↵Sanjay Patel2016-10-312-7/+43
| | | | | | | | | | | | | | | | bits (PR30841) This bug was exposed by using nsw/nuw for more aggressive folds in: https://reviews.llvm.org/rL284844 The changes mimic the IR demanded bits logic in InstCombiner::SimplifyDemandedUseBits(), but we can't just flip flag bits in the DAG; we have to create a new node that has the bits cleared. This should fix: https://llvm.org/bugs/show_bug.cgi?id=30841 llvm-svn: 285656
* [Hexagon] Garbage collect dead code.Davide Italiano2016-10-311-17/+0
| | | | llvm-svn: 285654
* Fix a typo.Evgeniy Stepanov2016-10-311-1/+1
| | | | | | Found with PVS-Studio here: http://www.viva64.com/en/b/0446/ llvm-svn: 285652
* CodeGen: further loosen -O0 CG for WoA divisionSaleem Abdulrasool2016-10-314-31/+42
| | | | | | | | | | | | Generate the slowest possible codepath for noopt CodeGen. Even trying to be clever with the negated jump can cause out-of-range jumps. Use a wide branch instead. Although the code is modelled simplistically, the later optimizations would recombine the branching into `cbz` if possible. This re-enables the previous optimization as well as hopefully gives us working code in all cases. Addresses PR30356! llvm-svn: 285649
* [ThinLTO] Disable importing and other cross-module optis at -O0Teresa Johnson2016-10-316-27/+115
| | | | | | | | | | | | | | | | Summary: There is no point to importing at -O0, since we won't inline. We should also disable other cross-module optimizations. (Plan to backport this fix to the 3.9 branch to fix PR30774) Reviewers: pcc Subscribers: johanengelen, mehdi_amini Differential Revision: https://reviews.llvm.org/D25918 llvm-svn: 285648
* [NVPTX] Remove NVPTXFavorNonGenericAddrSpaces pass.Justin Lebar2016-10-3110-335/+23
| | | | | | | | | | | | | | | Summary: This has been replaced by the NVPTXInferAddressSpaces pass. We've had the new one as the default with the old one accessible via a flag for some months now, and we've had no problems. Reviewers: tra Subscribers: llvm-commits, jholewinski, jingyue, mgorny Differential Revision: https://reviews.llvm.org/D26165 llvm-svn: 285642
* docs: trying to fix the docs bot by removing non-ASCII characters. The docs ↵Kostya Serebryany2016-10-311-2/+2
| | | | | | build fine on my machine, bot fail on the bot (http://lab.llvm.org:8011/builders/llvm-sphinx-docs/builds/25/steps/docs-llvm-html/logs/stdio) llvm-svn: 285639
* Remove llc -jump-table-type option, it hasn't been functional for years.Joerg Sonnenberger2016-10-312-21/+1
| | | | llvm-svn: 285633
* More additional error checks for invalid Mach-O files whenKevin Enderby2016-10-314-5/+58
| | | | | | | | | | | the offsets and sizes of an element of the file overlaps with another element in the Mach-O file. This shows the approach to this testing for three elements and contains for tests for their overlap. Checking for all the remain elements will be added next. llvm-svn: 285632
* [PPC] add absolute difference altivec instructions and matching intrinsicsNemanja Ivanovic2016-10-315-0/+78
| | | | | | | This patch corresponds to review https://reviews.llvm.org/D26072. Committing on behalf of Sean Fertile. llvm-svn: 285627
* DebugInfo: make DW_TAG_atomic_type validVictor Leschuk2016-10-3110-5/+88
| | | | | | | | | | | | | | DW_TAG_atomic_type was already included in Dwarf.defs and emitted correctly, however Verifier didn't recognize it as valid. Thus we introduce the following changes: * Make DW_TAG_atomic_type valid tag for IR and DWARF (enabled only with -gdwarf-5) * Add it to related docs * Add DebugInfo tests Differential Revision: https://reviews.llvm.org/D26144 llvm-svn: 285624
* Fix per-processor model scheduler definition completeness checkUlrich Weigand2016-10-311-1/+2
| | | | | | | | | | | | | | | The CodeGenSchedModels::checkCompleteness routine in TableGen/ CodeGenSchedule.cpp is supposed to verify for each processor model that is marked as "complete" that it actually defines a scheduling class for each instruction. However, this did not work correctly due to an incorrect check whether a scheduling class has an itinerary. Reviewer: atrick Differential revision: https://reviews.llvm.org/D26156 llvm-svn: 285622
* [asan] Move instrumented null-terminated strings to a special section, LLVM partKuba Brecka2016-10-312-0/+29
| | | | | | | | On Darwin, simple C null-terminated constant strings normally end up in the __TEXT,__cstring section of the resulting Mach-O binary. When instrumented with ASan, these strings are transformed in a way that they cannot be in __cstring (the linker unifies the content of this section and strips extra NUL bytes, which would break instrumentation), and are put into a generic __const section. This breaks some of the tools that we have: Some tools need to scan all C null-terminated strings in Mach-O binaries, and scanning all the contents of __const has a large performance penalty. This patch instead introduces a special section, __asan_cstring which will now hold the instrumented null-terminated strings. Differential Revision: https://reviews.llvm.org/D25026 llvm-svn: 285619
* [MC] Make llvm-mc fail cleanly on invalid output asm variant.Nirav Dave2016-10-312-0/+11
| | | | | | | | | | | | Fixes PR28488. Reviewers: rnk, majnemer Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D25834 llvm-svn: 285616
* GlobalISel: allow truncating pointer casts on AArch64.Tim Northover2016-10-313-4/+23
| | | | llvm-svn: 285615
* GlobalISel: translate stack protector intrinsicsTim Northover2016-10-315-16/+105
| | | | llvm-svn: 285614
* Define DbiStreamBuilder::addSectionMap.Rui Ueyama2016-10-312-2/+95
| | | | | | | | | | | | | This change enables LLD to construct a Section Map stream in a PDB file. I do not understand all these fields in the Section Map yet, but it seems like a copy of a COFF section header in another format. With this patch, DbiStreamBuilder can emit a Section Map which llvm-pdbdump can dump. Differential Revision: https://reviews.llvm.org/D26112 llvm-svn: 285606
* SingleLinkedListIterator::operator++(int) shouldn't return a referenceDavid Majnemer2016-10-311-1/+1
| | | | | | | | The returned reference is to a local object. Instead, make a copy. Found by PVS-Studio. llvm-svn: 285603
* Fix an unconditional break in checkMachOAndArchFlagsDavid Majnemer2016-10-313-52/+44
| | | | | | Found by PVS-Studio. llvm-svn: 285598
* SymbolRef::Type is not a bitfield and must be compared directlyDavid Majnemer2016-10-311-1/+1
| | | | | | Found by PVS-Studio. llvm-svn: 285597
* Modify DWARFFormValue to remember the DWARFUnit that it was decoded with.Greg Clayton2016-10-317-56/+59
| | | | | | | | Modifying DWARFFormValue to remember the DWARFUnit that it was encoded with can simplify the usage of instances of this class. Previously users would have to try and pass in the same DWARFUnit that was used to decode the form value and there was a possibility that a different DWARFUnit might be supplied to the functions that extract values (strings, CU relative references, addresses) and cause problems. This fixes this potential issue by storing the DWARFUnit inside the DWARFFormValue so that this mistake can't be made. Instances of DWARFFormValue are not stored permanently and are used as temporary values, so the increase in size of an instance of DWARFFormValue isn't a big deal. This makes decoding form values more bullet proof and is a change that will be used by future modifications. https://reviews.llvm.org/D26052 llvm-svn: 285594
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