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* Emit full ED initializers even for pseudo-instructions.Jakob Stoklund Olesen2011-10-101-14/+14
| | | | | | This should unbreak the picky buildbots. llvm-svn: 141575
* Allow stat += 0 without activating the stat.Andrew Trick2011-10-101-0/+2
| | | | | | | For me, this is a nice convenience. We generally want grep to match stats output only when the event has occurred. llvm-svn: 141574
* whitespaceAndrew Trick2011-10-101-8/+8
| | | | llvm-svn: 141572
* X86: Add a subtarget definition for core-avx-i, which is GCC's name for ivy ↵Benjamin Kramer2011-10-101-0/+5
| | | | | | bridge. llvm-svn: 141571
* Fix 10892 - When lowering SIGN_EXTEND_INREG do not lower v2i64 because theNadav Rotem2011-10-102-15/+7
| | | | | | instruction set has no 64-bit SRA support. llvm-svn: 141570
* Add dominance check for the instruction being hoisted.Devang Patel2011-10-104-3/+88
| | | | | | | For example, MachineLICM should not hoist a load that is not guaranteed to be executed. Radar 10254254. llvm-svn: 141569
* Mark the standard pseudos as isPseudo = 1.Jakob Stoklund Olesen2011-10-101-1/+1
| | | | | | | | | | | The difference between isPseudo and isCodeGenOnly is a bit murky, but isCodeGenOnly should eventually go away. It is used for instructions that are clones of real instructions with slightly different properties. The standard pseudo-instructions never mirror real instructions, so they are definitely in the isPseudo category. llvm-svn: 141567
* The Mips specific function for instruction cache invalidation cannot beBruno Cardoso Lopes2011-10-101-34/+5
| | | | | | | | | compiled on mips32r1 processors because it uses synci and rdhwr instructions which are supported only on mips32r2, so I replaced this function with the call to function cacheflush which works for both mips32r1 and mips32r2. Patch by Sasa Stankovic llvm-svn: 141564
* X86: Add patterns for the movbe instruction (mov + bswap, only available on ↵Benjamin Kramer2011-10-104-12/+49
| | | | | | atom) llvm-svn: 141563
* Insert dummy ED table entries for pseudo-instructions.Jakob Stoklund Olesen2011-10-102-3/+7
| | | | | | | | | | The table is indexed by opcode, so simply removing pseudo-instructions creates a wrong mapping from opcode to table entry. Add a test case for xorps which has a very high opcode that exposes this problem. llvm-svn: 141562
* Revert r141365. It was causing MultiSource/Benchmarks/MiBench/consumer-lame toBill Wendling2011-10-106-177/+7
| | | | | | hang, and possibly SPEC/CINT2006/464_h264ref. llvm-svn: 141560
* MCAtom extending methods need to extend the range of the atom as well.Owen Anderson2011-10-102-9/+20
| | | | llvm-svn: 141557
* Mark the llvm.eh.sjlj.functioncontext intrinsic as reading memory so that fastBill Wendling2011-10-101-4/+4
| | | | | | isel doesn't ignore it. llvm-svn: 141548
* llvm-objdump: Take ownership of MCInstrInfos.Benjamin Kramer2011-10-102-8/+2
| | | | llvm-svn: 141535
* llvm-nm: Don't leak bitcode buffers.Benjamin Kramer2011-10-101-2/+2
| | | | llvm-svn: 141534
* XFAIL tblgen tests on leak checkers.Benjamin Kramer2011-10-103-0/+3
| | | | llvm-svn: 141533
* When getting the number of bits necessary for addressing modeBill Wendling2011-10-102-3/+12
| | | | | | | | ARMII::AddrModeT1_s, we need to take into account that if the frame register is ARM::SP, then the number of bits is 8. If it's not ARM::SP, then the number of bits is 5. llvm-svn: 141529
* Put a bunch of calls to ToggleFeature behind proper if statements.Craig Topper2011-10-101-17/+42
| | | | llvm-svn: 141527
* Fix a regression from r138445. If we're loading from the frame/base pointerChad Rosier2011-10-101-0/+1
| | | | | | | | the tADDrSPi instruction can't be used. Make sure we're updating the opcode to tADDi3 in all cases. rdar://10254707 llvm-svn: 141523
* PTX: Print .ptr kernel attributes if PTX version >= 2.2Justin Holewinski2011-10-094-1/+49
| | | | llvm-svn: 141508
* Add Ivy Bridge 16-bit floating point conversion instructions for the X86 ↵Craig Topper2011-10-097-11/+98
| | | | | | disassembler. llvm-svn: 141505
* Prevent potential NOREX bug.Jakob Stoklund Olesen2011-10-081-0/+11
| | | | | | | | | | | | | | | A GR8_NOREX virtual register is created when extrating a sub_8bit_hi sub-register: %vreg2<def> = COPY %vreg1:sub_8bit_hi; GR8_NOREX:%vreg2 %GR64_ABCD:%vreg1 TEST8ri_NOREX %vreg2, 1, %EFLAGS<imp-def>; GR8_NOREX:%vreg2 If such a live range is ever split, its register class must not be inflated to GR8. The sub-register copy can only target GR8_NOREX. I dont have a test case for this theoretical bug. llvm-svn: 141500
* Add TEST8ri_NOREX pseudo to constrain sub_8bit_hi copies.Jakob Stoklund Olesen2011-10-084-3/+54
| | | | | | | | | | | | | In 64-bit mode, sub_8bit_hi sub-registers can only be used by NOREX instructions. The COPY created from the EXTRACT_SUBREG DAG node cannot target all GR8 registers, only those in GR8_NOREX. TO enforce this, we ensure that all instructions using the EXTRACT_SUBREG are GR8_NOREX constrained. This fixes PR11088. llvm-svn: 141499
* Add missing test case for r141410.Jakob Stoklund Olesen2011-10-081-0/+39
| | | | llvm-svn: 141498
* Include direct.h for _mkdir on mingw32 too.Benjamin Kramer2011-10-081-1/+1
| | | | llvm-svn: 141495
* Revert r141079: tblgen: add preprocessor as a separate modeChe-Liang Chiou2011-10-084-680/+0
| | | | llvm-svn: 141492
* Always check if a method or a type exist before trying to create it.Nicolas Geoffray2011-10-081-12/+23
| | | | llvm-svn: 141490
* lib/Object: Suppress warnings on gcc-4.3.4 cygwinNAKAMURA Takumi2011-10-082-2/+2
| | | | llvm-svn: 141485
* lib/DebugInfo/DWARFDebugLine.cpp: De-Unicode-ify.NAKAMURA Takumi2011-10-081-2/+2
| | | | llvm-svn: 141484
* WhitespaceNAKAMURA Takumi2011-10-081-1/+1
| | | | llvm-svn: 141483
* Disable ABS optimization for Thumb1 target, we don't have necessary ↵Anton Korobeynikov2011-10-081-0/+3
| | | | | | instructions there. llvm-svn: 141481
* Simplify definition of FP move instructions.Akira Hatanaka2011-10-082-5/+6
| | | | llvm-svn: 141476
* Define classes and multiclasses for FP binary instructions.Akira Hatanaka2011-10-082-15/+15
| | | | llvm-svn: 141475
* Define multiclasses for FP-to-FP instructions.Akira Hatanaka2011-10-081-11/+11
| | | | llvm-svn: 141474
* Define classes for FP unary instructions and multiclasses for FP-to-fixed pointAkira Hatanaka2011-10-082-65/+66
| | | | | | conversion instructions. llvm-svn: 141473
* Unit test for LSR phi reuse in r141442.Andrew Trick2011-10-081-0/+53
| | | | llvm-svn: 141472
* Add patterns for unaligned load and store instructions and enable theAkira Hatanaka2011-10-082-46/+76
| | | | | | instruction selector to generate them. llvm-svn: 141471
* Add an extra safety check in front of the optimization in r141442.Andrew Trick2011-10-081-0/+9
| | | | llvm-svn: 141470
* Use the code that lowers the arguments and spills any values which are aliveBill Wendling2011-10-081-2/+125
| | | | | | | | across unwind edges. This is for the back-end which expects such things. The code is from the original SjLj EH pass. llvm-svn: 141463
* Add clang-tblgen to OPTIONAL_DIRS when building native tools for thePeter Collingbourne2011-10-081-2/+3
| | | | | | | | | | | cross build, so that a native version of clang-tblgen is available. Should unbreak Clang cross build. Also disable Polly for the native tool build, since it depends on external libraries which may not be available, and it isn't required anyway. llvm-svn: 141454
* llvm-objdump: Add relocation and archive support.Michael J. Spencer2011-10-083-29/+127
| | | | llvm-svn: 141451
* PathV2: Add simplified version of exists that returns false on error.Michael J. Spencer2011-10-081-0/+7
| | | | llvm-svn: 141450
* Object: Add support for opening stdin.Michael J. Spencer2011-10-081-1/+1
| | | | llvm-svn: 141449
* Object: constize Archive.Michael J. Spencer2011-10-082-6/+6
| | | | llvm-svn: 141448
* Enable ARM mode VDUP(scalar) tests.Jim Grosbach2011-10-071-12/+12
| | | | llvm-svn: 141447
* ARM NEON assembly parsing and encoding for VDUP(scalar).Jim Grosbach2011-10-077-26/+200
| | | | llvm-svn: 141446
* LSR should only reuse phis that match its formula.Andrew Trick2011-10-073-65/+129
| | | | | | Fixes rdar://problem/5064068 llvm-svn: 141442
* Fix APInt::operator*= so that it computes the correct result for large ↵Eli Friedman2011-10-073-2/+12
| | | | | | integers where there is unsigned overflow. Fix APFloat::toString so that it doesn't depend on the incorrect behavior in common cases (and computes the correct result in some rare cases). Fixes PR11086. llvm-svn: 141441
* Don't emit the symbol table entry for the .symtab_shndx section either.Nick Lewycky2011-10-071-1/+2
| | | | llvm-svn: 141440
* Remove extraneous curlies. No functionality change.Nick Lewycky2011-10-071-2/+1
| | | | llvm-svn: 141439
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