| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Clean up to avoid compiler warnings for casting away const qualifiers. | Sjoerd Meijer | 2016-04-27 | 2 | -4/+4 |
| * | Revert "[AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for ... | Chad Rosier | 2016-04-27 | 9 | -146/+13 |
| * | [LV] Reallow positive-stride interleaved load groups with gaps | Matthew Simpson | 2016-04-27 | 2 | -15/+146 |
| * | [SLPVectorizer] Refactor where MinVecRegSize and MaxVecRegSize live. | Arch D. Robison | 2016-04-27 | 1 | -20/+28 |
| * | [DAGCombiner] Follow coding convention for function name (NFC) | Gerolf Hoflehner | 2016-04-27 | 4 | -5/+5 |
| * | [Mips] Add support for llvm.thread.pointer intrinsic. | Marcin Koscielnicki | 2016-04-27 | 2 | -0/+16 |
| * | [InstCombine] Sharpended test case in pr21210.ll | Gerolf Hoflehner | 2016-04-27 | 1 | -3/+4 |
| * | Silence a -Wdangling-else | Reid Kleckner | 2016-04-27 | 1 | -1/+2 |
| * | Add parentheses to silence buildbot warning | Matthew Simpson | 2016-04-27 | 1 | -2/+2 |
| * | [AMDGPU][llvm-mc] Add support of TTMP quads. Rework M0 exclusion for SMRD. | Artem Tamazov | 2016-04-27 | 9 | -13/+146 |
| * | [PDB] Fix function names for private symbols in PDBs | Reid Kleckner | 2016-04-27 | 5 | -28/+34 |
| * | AMDGPU/SI: Add llvm.amdgcn.s.waitcnt.all intrinsic | Nicolai Haehnle | 2016-04-27 | 4 | -14/+118 |
| * | [TTI] Add hook for vector extract with extension | Matthew Simpson | 2016-04-27 | 8 | -22/+108 |
| * | [AMDGPU][llvm-mc] s_getreg/setreg* - Support symbolic names of hardware regis... | Artem Tamazov | 2016-04-27 | 6 | -36/+102 |
| * | Revert r267649, it caused PR27539. | Nico Weber | 2016-04-27 | 3 | -1120/+7 |
| * | Remove size 1 from check as that isn't part of what the test is meant to be t... | Kristof Beyls | 2016-04-27 | 1 | -1/+1 |
| * | [ThinLTO] Refine fix to avoid renaming of uses in inline assembly. | Teresa Johnson | 2016-04-27 | 2 | -14/+30 |
| * | [ThinLTO] Use valueid instead of bitcode offsets in combined index file | Teresa Johnson | 2016-04-27 | 13 | -151/+101 |
| * | NFC. Introduce Value::getPointerDerferecnceableBytes | Artur Pilipenko | 2016-04-27 | 3 | -27/+43 |
| * | [InstCombine][SSE] Regenerated vector shift tests | Simon Pilgrim | 2016-04-27 | 1 | -356/+505 |
| * | [mips][microMIPS] Add CodeGen support for SUBU16, SUB, SUBU, DSUB and DSUBU i... | Zlatko Buljan | 2016-04-27 | 9 | -57/+163 |
| * | [mips][microMIPS] Add CodeGen support for SLL16, SRL16, SLL, SLLV, SRA, SRAV,... | Zlatko Buljan | 2016-04-27 | 15 | -16/+248 |
| * | isSafeToLoadUnconditionally support queries without a context | Artur Pilipenko | 2016-04-27 | 6 | -14/+27 |
| * | Use DL preferred alignment for alloca in Value::getPointerAlignment | Artur Pilipenko | 2016-04-27 | 2 | -3/+14 |
| * | [InstCombine][SSE] Added DemandedBits tests for MOVMSK instructions | Simon Pilgrim | 2016-04-27 | 1 | -0/+137 |
| * | Fixed sphinx warning from r267672 | Adam Nemet | 2016-04-27 | 1 | -1/+1 |
| * | [LoopDist] Add llvm.loop.distribute.enable loop metadata | Adam Nemet | 2016-04-27 | 5 | -13/+247 |
| * | [Cloning] cloneLoopWithPreheader(): add assert to ensure no sub-loops | Vaivaswatha Nagaraj | 2016-04-27 | 2 | -0/+3 |
| * | [Support][X86] Add a few more Intel model numbers to getHostCPUName for airmo... | Craig Topper | 2016-04-27 | 1 | -0/+4 |
| * | [Support][X86] Change the case values in the Intel family 6 code to hex so it... | Craig Topper | 2016-04-27 | 1 | -68/+66 |
| * | Revert "Support "preserving" the summary information when using setModule() A... | Mehdi Amini | 2016-04-27 | 3 | -46/+1 |
| * | [Support][X86] Add a couple more Broadwell CPU models numbers to getHostCPUName. | Craig Topper | 2016-04-27 | 1 | -0/+2 |
| * | Support "preserving" the summary information when using setModule() API in LT... | Mehdi Amini | 2016-04-27 | 3 | -1/+46 |
| * | Revert "Support "preserving" the summary information when using setModule() A... | Mehdi Amini | 2016-04-27 | 3 | -46/+1 |
| * | The patch fixes PR27392. | Evgeny Stupachenko | 2016-04-27 | 5 | -27/+38 |
| * | [LVI] Delete stale and misleading comment. | Philip Reames | 2016-04-27 | 1 | -5/+0 |
| * | [ppc64] fix bug in prologue that mfocrf's cr operand should be explict state ... | Chuang-Yu Cheng | 2016-04-27 | 2 | -5/+11 |
| * | [X86] Set AddPristinesAndCSRs to FixupBW LivePhysRegs. NFC. | Ahmed Bougacha | 2016-04-27 | 1 | -1/+2 |
| * | Fix the test from r267656: Support "preserving" the summary information when ... | Mehdi Amini | 2016-04-27 | 1 | -2/+0 |
| * | Add a test for r267655: Support "preserving" the summary information when usi... | Mehdi Amini | 2016-04-27 | 1 | -0/+39 |
| * | Support "preserving" the summary information when using setModule() API in LT... | Mehdi Amini | 2016-04-27 | 2 | -1/+9 |
| * | Fix typo in comment; NFC | Sanjoy Das | 2016-04-27 | 1 | -1/+1 |
| * | [X86] Don't assume that MMX extractelts are from index 0. | Ahmed Bougacha | 2016-04-27 | 2 | -1/+31 |
| * | [X86] Re-enable MMX i32 extractelt combine. | Ahmed Bougacha | 2016-04-27 | 2 | -10/+18 |
| * | Detects the SAD pattern on X86 so that much better code will be emitted once ... | Cong Hou | 2016-04-27 | 3 | -7/+1120 |
| * | [LVI] Add a comment explaining a subtle piece of code | Philip Reames | 2016-04-27 | 1 | -15/+23 |
| * | [Docs] Try to clarify the concept of domains for noalias scope | Adam Nemet | 2016-04-27 | 1 | -1/+9 |
| * | ThinLTO: do not promote GlobalVariable that have a specific section. | Mehdi Amini | 2016-04-27 | 5 | -4/+117 |
| * | SLSR: Use UnknownAddressSpace instead of 0 for pure arithmetic. | Matt Arsenault | 2016-04-27 | 1 | -1/+3 |
| * | LTOCodeGenerator: turns linkonce(_odr) into weak_(odr) when present "MustPres... | Mehdi Amini | 2016-04-27 | 2 | -22/+53 |
