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* TransformUtils: Avoid getNodePtrUnchecked() in integer division, NFCDuncan P. N. Exon Smith2016-02-211-2/+7
| | | | | | | | | | Stop relying on `getNodePtrUnchecked()` being useful on invalid iterators. This function is documented to be for internal use only, and the pointer type will eventually have to change to remove UB from ilist_iterator. Instead, check the iterator before it has been invalidated. llvm-svn: 261497
* ADT: Stop using getNodePtrUnchecked on end() iteratorsDuncan P. N. Exon Smith2016-02-212-9/+5
| | | | | | | | | | | Stop using `getNodePtrUnchecked()` when building IR. Eventually a dereference will be required to get at the downcast node, since the iterator will only store an `ilist_node_base` of some sort. This should have no functionality change for now, but is a path towards removing some more UB from ilist. llvm-svn: 261495
* [X86] Remove unused encoding types from disassembler. NFCCraig Topper2016-02-213-22/+0
| | | | llvm-svn: 261494
* CodeGen: Avoid getNodePtrUnchecked() where we need a Value, NFCDuncan P. N. Exon Smith2016-02-211-4/+6
| | | | | | | | | | | | | | | `ilist_iterator<NodeTy>::getNodePtrUnchecked()` is documented as being for internal use only, but CodeGenPrepare was using it anyway. This code relies on pulling out the `Value*` pointer even after the lifetime of the iterator is over. But having this pointer available in ilist_iterator depends on UB in the first place. Instead, safely pull out the `Value*` when the iterator is alive and stop using the internal-only API. There should be no functionality change here. llvm-svn: 261493
* ADT: clang-format ilist_iterator, NFCDuncan P. N. Exon Smith2016-02-211-21/+15
| | | | | | Also removed a couple of noisy (no-value-added) comments. llvm-svn: 261492
* ADT: Remove ilist_iterator random access API, NFCDuncan P. N. Exon Smith2016-02-211-26/+0
| | | | | | | | Remove explicitly deleted random access API from ilist_iterator. Since it no longer has implicit conversions to a pointer type, we no longer need this protection. llvm-svn: 261491
* [X86][AVX] Add shuffle masking support for EltsFromConsecutiveLoadsSimon Pilgrim2016-02-214-195/+108
| | | | | | | | Add support for the case where we have a consecutive load (which must include the first + last elements) with a mixture of undef/zero elements. We load the vector and then apply a shuffle to clear the zero'd elements. Differential Revision: http://reviews.llvm.org/D17297 llvm-svn: 261490
* ScalerEvolution: Only erase temporary values if they actually have been addedTobias Grosser2016-02-211-5/+6
| | | | | | This addresses post-review comments from Sanjoy Das for r261485. llvm-svn: 261486
* ScalarEvolution: Do not keep temporary PHI values in ValueExprMapTobias Grosser2016-02-212-0/+31
| | | | | | | | | | Before this patch simplified SCEV expressions for PHI nodes were only returned the very first time getSCEV() was called, but later calls to getSCEV always returned the non-simplified value, which had "temporarily" been stored in the ValueExprMap, but was never removed and consequently blocked the caching of the simplified PHI expression. llvm-svn: 261485
* fix inaccurate comment; NFCSanjay Patel2016-02-211-2/+1
| | | | llvm-svn: 261484
* [InstCombine] add getNegativeIsTrueBoolVec() helper function; NFCSanjay Patel2016-02-211-22/+20
| | | | | | | | | Originally part of: http://reviews.llvm.org/D17485 We need this when simplifying masked memory ops too. llvm-svn: 261483
* Fix LLVM's handling and detection of skylake and cannonlake CPUsSanjoy Das2016-02-213-12/+12
| | | | | | | | | | | | | | | | | Summary: - Rename `"skylake"` == SkylakeServerProc to `"skylake-avx512"` - Change `"skylake"` to denote SkylakeClientProc - Fix the detection of cpu family 6 and model 94 to be SkylakeClientProc instead of SkylakeServerProc - Remove the `"cnl"` for CannonLake Reviewers: craig.topper, delena Subscribers: zansari, echristo, qcolombet, RKSimon, spatel, DavidKreitzer, mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D17090 llvm-svn: 261482
* [LoopDeletion] Add an assert that verifies LCSSASanjoy Das2016-02-211-1/+3
| | | | | | | This is inspired by PR24804 -- had this assert been there before, isolating the root cause for PR24804 would have been far easier. llvm-svn: 261481
* WebAssembly: update expected torture test failuresJF Bastien2016-02-211-4/+0
| | | | | | r261457 handles CopyToReg nodes with flag results in LowerCopyToReg, which was causing the SelectionDAGNodes assert. llvm-svn: 261479
* [InstCombine] Added SSE41 roundss/roundsd demanded vector elements invec testsSimon Pilgrim2016-02-211-0/+32
| | | | llvm-svn: 261472
* [InstCombine] Added XOP frczss/vfrczsd demanded vector elements testsSimon Pilgrim2016-02-211-0/+35
| | | | llvm-svn: 261469
* [InstCombine] Added SSE41 roundss/roundsd demanded vector elements testsSimon Pilgrim2016-02-211-0/+49
| | | | llvm-svn: 261468
* [WebAssembly] Support physical registers in the rewrite-to-discard optimization.Dan Gohman2016-02-212-16/+20
| | | | llvm-svn: 261465
* IR: Add ConstantData, for operand-less ConstantsDuncan P. N. Exon Smith2016-02-214-98/+66
| | | | | | | | | | | | | Add a common parent `ConstantData` to the constants that have no operands. These are guaranteed to represent abstract data that is in no way tied to a specific Module. This is a good cleanup on its own. It also makes it simpler to disallow RAUW (and factor away use-lists) on these constants in the future. (I have some experimental patches that make RAUW illegal on ConstantData, and they seem to catch a bunch of bugs...) llvm-svn: 261464
* Unbreak non-X86 targets from fallout caused by r261462David Majnemer2016-02-215-8/+15
| | | | llvm-svn: 261463
* [X86] Use the correct alignment for COMDAT constant pool entriesDavid Majnemer2016-02-219-19/+43
| | | | | | | | | | | | | | | | | | | COFF doesn't have sections with mergeable contents. Instead, each constant pool entry ends up in a COMDAT section. The linker, when choosing between COMDAT sections, doesn't choose the max alignment of the two sections. You just get whatever alignment was on the section. If one constant needed a higher alignment in one object file from another one, then we will get into trouble if the linker chooses the lower alignment one. Instead, lets promote the alignment of the constant pool entry to make sure we don't use an under aligned constant with an instruction which assumed otherwise. This fixes PR26680. llvm-svn: 261462
* [InstCombine] SSE/SSE2 (u)comiss/(u)comisd comparison intrinsics only use ↵Simon Pilgrim2016-02-203-182/+126
| | | | | | the lowest vector element llvm-svn: 261460
* [WebAssembly] Refine a README.txt entry.Dan Gohman2016-02-201-2/+2
| | | | | | | The register coloring pass may also need to be involved in order to optimally sort registers. llvm-svn: 261458
* [WebAssembly] Handle CopyToReg nodes with flag results in LowerCopyToReg.Dan Gohman2016-02-202-3/+19
| | | | llvm-svn: 261457
* [InstCombine] Added SSE/SSE2 comparison intrinsics demanded vector elements ↵Simon Pilgrim2016-02-202-3/+511
| | | | | | tests llvm-svn: 261454
* [WebAssembly] Write stack pointer back to memory when FP is usedDerek Schuff2016-02-202-2/+5
| | | | | | | | The stack pointer is bumped when there is a frame pointer or when there are static-size objects, but was only getting written back when there were static-size objects. llvm-svn: 261453
* [WebAssembly] Stackify function prologs and epilogsDerek Schuff2016-02-204-102/+111
| | | | | | | | The instructions are the same, but fewer locals are used. Differential Revision: http://reviews.llvm.org/D17428 llvm-svn: 261452
* [InstCombine] Added some SSE/SSE2 demanded vector elements testsSimon Pilgrim2016-02-202-0/+358
| | | | llvm-svn: 261451
* Don't scan for SSA register operands to update when not in SSA form.Dan Gohman2016-02-201-22/+24
| | | | | | | | | TailDuplicate can run on either on SSA code or non-SSA code, as indicated to it by MRI->isSSA() ("PreRegAlloc" here). TailDuplicate does extra work to preserve SSA invariants when it duplicates code. This patch makes it skip some of this extra work in the case where the code is not in SSA form. llvm-svn: 261450
* Fix the build bot break caused by rL261441.Nemanja Ivanovic2016-02-201-5/+11
| | | | | | | | The patch has a necessary call to a function inside an assert. Which is fine when you have asserts turned on. Not so much when they're off. Sorry about the regression. llvm-svn: 261447
* [X86][AVX] Added test case for PR22359Simon Pilgrim2016-02-201-0/+23
| | | | llvm-svn: 261444
* Fix for PR 26500Nemanja Ivanovic2016-02-202-52/+182
| | | | | | | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D17294 It ensures that whatever block we are emitting the prologue/epilogue into, we have the necessary scratch registers. It takes away the hard-coded register numbers for use as scratch registers as registers that are guaranteed to be available in the function prologue/epilogue are not guaranteed to be available within the function body. Since we shrink-wrap, the prologue/epilogue may end up in the function body. llvm-svn: 261441
* [X86] Regenerated pr16360.llSimon Pilgrim2016-02-201-7/+8
| | | | llvm-svn: 261440
* [X86][SSE41] More fast-isel intrinsics testsSimon Pilgrim2016-02-201-14/+226
| | | | llvm-svn: 261439
* [X86][SSE41] Added fast-isel intrinsics testsSimon Pilgrim2016-02-201-0/+380
| | | | | | As discussed on PR24580, this patch adds some (more to come) initial fast-isel codegen tests to match the IR generated in clang/test/CodeGen/sse41-builtins.c llvm-svn: 261438
* [DAGCombiner] Use getBitcast helper when possible. NFCI.Simon Pilgrim2016-02-201-7/+3
| | | | llvm-svn: 261437
* [X86][SSE] Fixed issue with commutation of 'faux unary' target shuffles ↵Simon Pilgrim2016-02-202-5/+6
| | | | | | | | (PR26667) Fixed a bug introduced by D16683 when a binary shuffle is simplified to a unary shuffle (with undef/zero sentinel mask indices) - if this resulted in only the second input being used combineX86ShuffleChain failed to take this into account and still referenced the first input. llvm-svn: 261434
* [X86][SSE] Move all undef/zero cases before target shuffle combining.Simon Pilgrim2016-02-201-20/+14
| | | | | | First small step towards fixing PR26667 - we need to ensure that combineX86ShuffleChain only gets called with a valid shuffle input node (a similar issue was found in D17041). llvm-svn: 261433
* When MemoryDependenceAnalysis hits a CFG with many transparent blocks,Joerg Sonnenberger2016-02-201-6/+26
| | | | | | | | | | | | | | | | | | the algorithm easily degrades into quadratic memory and time complexity. The easiest example is a long chain of BBs that don't otherwise use a location. The caching will add an entry for every intermediate block and limiting the number of results doesn't help as no results are produced until a definition is found. Introduce a limit similar to the existing instructions-per-block limit. This limit counts the total number of blocks checked. If the limit is reached, entries are considered unknown. The initial value is 1000, which avoids regressions for normal sized functions while still limiting edge cases to reasnable memory consumption and execution time. Differential Revision: http://reviews.llvm.org/D16123 llvm-svn: 261430
* [X86] Enable the LEA optimization pass by default.Andrey Turetskiy2016-02-203-6/+7
| | | | | | Differential Revision: http://reviews.llvm.org/D16877 llvm-svn: 261429
* [X86] PR26575: Fix LEA optimization pass (Part 2).Andrey Turetskiy2016-02-202-38/+148
| | | | | | | | | | Handle address displacement operands of a type other than Immediate or Global in LEAs and load/stores. Ref: https://llvm.org/bugs/show_bug.cgi?id=26575 Differential Revision: http://reviews.llvm.org/D17374 llvm-svn: 261428
* [SimplifyCFG] Use pointer identity to simplify predicate.Benjamin Kramer2016-02-201-4/+2
| | | | | | No functional change intended. llvm-svn: 261427
* [LVI] Move ConstantRanges instead of copying.Benjamin Kramer2016-02-201-9/+8
| | | | | | | | No functional change intended. Copying small (<= 64 bits) APInts isn't expensive but bloats code by generating the slow path everywhere. Moving doesn't care about the size of the value. llvm-svn: 261426
* Move some code from doInitialization to runOnFunctionDavid Majnemer2016-02-201-3/+4
| | | | | | | This has no observable behavior change, it just makes the state insertion pass look a little more like normal passes. llvm-svn: 261420
* [X86] Remove some unused encoding checks from the disassembler table building.Craig Topper2016-02-201-4/+0
| | | | llvm-svn: 261418
* [X86] Add some missing reversed forms of XOP instructions.Craig Topper2016-02-202-0/+38
| | | | llvm-svn: 261417
* [PM/AA] Wire up TBAA to the new pass manager's registry and test it.Chandler Carruth2016-02-203-0/+3
| | | | llvm-svn: 261411
* [PM/AA] Wire up the scoped-no-alias AA to the new pass manager'sChandler Carruth2016-02-203-0/+3
| | | | | | registry and test it. llvm-svn: 261410
* [PM/AA] Wire up SCEVAA to the new pass manager's registry and test it.Chandler Carruth2016-02-203-0/+4
| | | | llvm-svn: 261409
* MachineCopyPropagation: Introduce Reg2MIMap typedef; NFCMatthias Braun2016-02-201-4/+5
| | | | llvm-svn: 261408
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