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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-02-21 14:50:27 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-02-21 14:50:27 +0000 |
| commit | b1cc4d6d6908e995a6f9c3641c2d2609f5d09030 (patch) | |
| tree | 5d7f8b4ad3a38bd56c8c369bed7ce770febfd1fe /llvm | |
| parent | 7a33dce4ef8eafd320936350f90f4482c5c6e63a (diff) | |
| download | bcm5719-llvm-b1cc4d6d6908e995a6f9c3641c2d2609f5d09030.tar.gz bcm5719-llvm-b1cc4d6d6908e995a6f9c3641c2d2609f5d09030.zip | |
[InstCombine] Added SSE41 roundss/roundsd demanded vector elements invec tests
llvm-svn: 261472
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/test/Transforms/InstCombine/x86-sse41.ll | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/llvm/test/Transforms/InstCombine/x86-sse41.ll b/llvm/test/Transforms/InstCombine/x86-sse41.ll index 99b8f852d90..20c147d7e53 100644 --- a/llvm/test/Transforms/InstCombine/x86-sse41.ll +++ b/llvm/test/Transforms/InstCombine/x86-sse41.ll @@ -1,6 +1,18 @@ ; RUN: opt < %s -instcombine -S | FileCheck %s target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" +define <2 x double> @test_round_sd(<2 x double> %a, <2 x double> %b) { +; CHECK-LABEL: @test_round_sd +; CHECK-NEXT: %1 = insertelement <2 x double> %a, double 1.000000e+00, i32 0 +; CHECK-NEXT: %2 = insertelement <2 x double> %b, double 2.000000e+00, i32 1 +; CHECK-NEXT: %3 = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %1, <2 x double> %2, i32 10) +; CHECK-NEXT: ret <2 x double> %3 + %1 = insertelement <2 x double> %a, double 1.000000e+00, i32 0 + %2 = insertelement <2 x double> %b, double 2.000000e+00, i32 1 + %3 = tail call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %1, <2 x double> %2, i32 10) + ret <2 x double> %3 +} + define double @test_round_sd_0(double %a, double %b) { ; CHECK-LABEL: @test_round_sd_0 ; CHECK-NEXT: %1 = insertelement <2 x double> undef, double %a, i32 0 @@ -19,6 +31,26 @@ define double @test_round_sd_0(double %a, double %b) { ret double %6 } +define <4 x float> @test_round_ss(<4 x float> %a, <4 x float> %b) { +; CHECK-LABEL: @test_round +; CHECK-NEXT: %1 = insertelement <4 x float> %a, float 1.000000e+00, i32 1 +; CHECK-NEXT: %2 = insertelement <4 x float> %1, float 2.000000e+00, i32 2 +; CHECK-NEXT: %3 = insertelement <4 x float> %2, float 3.000000e+00, i32 3 +; CHECK-NEXT: %4 = insertelement <4 x float> %b, float 1.000000e+00, i32 1 +; CHECK-NEXT: %5 = insertelement <4 x float> %4, float 2.000000e+00, i32 2 +; CHECK-NEXT: %6 = insertelement <4 x float> %5, float 3.000000e+00, i32 3 +; CHECK-NEXT: %7 = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %3, <4 x float> %6, i32 10) +; CHECK-NEXT: ret <4 x float> %7 + %1 = insertelement <4 x float> %a, float 1.000000e+00, i32 1 + %2 = insertelement <4 x float> %1, float 2.000000e+00, i32 2 + %3 = insertelement <4 x float> %2, float 3.000000e+00, i32 3 + %4 = insertelement <4 x float> %b, float 1.000000e+00, i32 1 + %5 = insertelement <4 x float> %4, float 2.000000e+00, i32 2 + %6 = insertelement <4 x float> %5, float 3.000000e+00, i32 3 + %7 = tail call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %3, <4 x float> %6, i32 10) + ret <4 x float> %7 +} + define float @test_round_ss_0(float %a, float %b) { ; CHECK-LABEL: @test_round_ss_0 ; CHECK-NEXT: %1 = insertelement <4 x float> undef, float %a, i32 0 |
