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* An MCDisassembler has the option to not implementShantonu Sen2011-04-051-2/+4
| | | | | | | | | | getEDInfo(), in which case this code would dereference NULL. EDInst can already handle NULL info, so avoid the dereference and pass NULL through. Reviewed by Sean Callanan llvm-svn: 128904
* Make second source operand of LDRD pre/post explicit.Jim Grosbach2011-04-052-8/+28
| | | | | | Finish what r128736 started. llvm-svn: 128903
* more notes to self.Chris Lattner2011-04-051-6/+59
| | | | llvm-svn: 128902
* Constants with multiple encodings (ARM):Johnny Chen2011-04-053-8/+9
| | | | | | | | | | An alternative syntax is available for a modified immediate constant that permits the programmer to specify the encoding directly. In this syntax, #<const> is instead written as #<byte>,#<rot>, where: <byte> is the numeric value of abcdefgh, in the range 0-255 <rot> is twice the numeric value of rotation, an even number in the range 0-30. llvm-svn: 128897
* Check for invalid register encodings for UMAAL and friends where:Johnny Chen2011-04-052-2/+60
| | | | | | | | | if dLo == 15 || dHi == 15 || n == 15 || m == 15 then UNPREDICTABLE; if dHi == dLo then UNPREDICTABLE; rdar://problem/9230202 llvm-svn: 128895
* Convert ADCS and SBCS instructions into pseudos that are expanded to the ↵Owen Anderson2011-04-052-41/+56
| | | | | | ADC/ABC with the appropriate S-bit input value. llvm-svn: 128892
* ARM doesn't support byval yet. XFAIL this test until it does.Stuart Hastings2011-04-051-0/+1
| | | | llvm-svn: 128891
* Rename LLVMConfig.cmake to LLVM-Config.cmake. The *Config.cmake namingOscar Fuentes2011-04-055-7/+7
| | | | | | scheme is used by the functionality related to find_package. llvm-svn: 128889
* Ensure all defs referring to a virtual register are marked dead by ↵Jakob Stoklund Olesen2011-04-052-8/+7
| | | | | | | | | | | | addRegisterDead(). There can be multiple defs for a single virtual register when they are defining sub-registers. The missing <dead> flag was stopping the inline spiller from eliminating dead code after rematerialization. llvm-svn: 128888
* Print visibility info for external variables.Rafael Espindola2011-04-052-12/+17
| | | | llvm-svn: 128887
* Use std::unique instead of a SmallPtrSet to ensure unique instructions in ↵Jakob Stoklund Olesen2011-04-053-54/+31
| | | | | | | | | | | UseSlots. This allows us to always keep the smaller slot for an instruction which is what we want when a register has early clobber defines. Drop the UsingInstrs set and the UsingBlocks map. They are no longer needed. llvm-svn: 128886
* InstCombine optimizes gep(bitcast(x)) even when the bitcasts casts away addressNadav Rotem2011-04-052-8/+27
| | | | | | | space info. We crash with an assert in this case. This change checks that the address space of the bitcasted pointer is the same as the gep ptr. llvm-svn: 128884
* docs/ReleaseNotes.html: Add a few notes to MCCOFF and x64. FIXME: fixme!NAKAMURA Takumi2011-04-051-8/+22
| | | | llvm-svn: 128882
* docs/GettingStarted.html: FIXME: dg, lit, and source tree layout.NAKAMURA Takumi2011-04-051-0/+10
| | | | llvm-svn: 128881
* add a bunch of notes to myself, this is not intended to be gramatic orChris Lattner2011-04-051-40/+82
| | | | | | make sense to anyone else. llvm-svn: 128879
* Stop precomputing last split points, query the SplitAnalysis cache on demand.Jakob Stoklund Olesen2011-04-053-21/+17
| | | | llvm-svn: 128875
* Cache the fairly expensive last split point computation and provide a fastJakob Stoklund Olesen2011-04-053-14/+58
| | | | | | | | | inlined path for the common case. Most basic blocks don't contain a call that may throw, so the last split point os simply the first terminator. llvm-svn: 128874
* Revamp the SjLj "dispatch setup" intrinsic.Bill Wendling2011-04-055-14/+11
| | | | | | | | | | | | It needed to be moved closer to the setjmp statement, because the code directly after the setjmp needs to know about values that are on the stack. Also, the 'bitcast' of the function context was causing a dead load. This wouldn't be too horrible, except that at -O0 it wasn't optimized out, and because it wasn't using the correct base pointer (if there is a VLA), it would try to access a value from a garbage address. <rdar://problem/9130540> llvm-svn: 128873
* Fix up testcase for previous commit.Eric Christopher2011-04-051-1/+1
| | | | llvm-svn: 128870
* Just use BL all the time. It's safer that way.Eric Christopher2011-04-051-9/+1
| | | | | | Fixes rdar://9184526 llvm-svn: 128869
* Revert 123704; it broke threaded LLVM.Stuart Hastings2011-04-051-9/+15
| | | | llvm-svn: 128868
* Fix register-dependent X86 tests.Jakob Stoklund Olesen2011-04-0530-76/+96
| | | | llvm-svn: 128867
* Fix SRS/SRSW encoding bits.Johnny Chen2011-04-053-0/+28
| | | | | | | | | rdar://problem/9230801 ARM disassembler discrepancy: erroneously accepting SRS Plus add invalid-RFEorLDMIA-arm.txt test which should have been checked in with http://llvm.org/viewvc/llvm-project?view=rev&revision=128859. llvm-svn: 128864
* A8.6.105 MULJohnny Chen2011-04-041-1/+3
| | | | | | | | Inst{15-12} should be specified as 0b0000. rdar://problem/9231168 ARM disassembler discrepancy: erroneously accepting MUL llvm-svn: 128862
* Add info on where to get 2.9 final svn sources.Bill Wendling2011-04-041-0/+1
| | | | llvm-svn: 128860
* RFE encoding should also specify the "should be" encoding bits.Johnny Chen2011-04-043-28/+49
| | | | | | | | | rdar://problem/9229922 ARM disassembler discrepancy: erroneously accepting RFE Also LDC/STC instructions are predicated while LDC2/STC2 instructions are not, fixed while doing regression testings. llvm-svn: 128859
* Add missing file from r128851.Jim Grosbach2011-04-041-0/+58
| | | | llvm-svn: 128856
* Layer the memory manager between the JIT and the runtime Dyld.Jim Grosbach2011-04-045-25/+64
| | | | | | | | | | | The JITMemory manager references LLVM IR constructs directly, while the runtime Dyld works at a lower level and can handle objects which may not originate from LLVM IR. Introduce a new layer for the memory manager to handle the interface between them. For the MCJIT, this layer will be almost entirely simply a call-through w/ translation between the IR objects and symbol names. llvm-svn: 128851
* Make OpcodeMask an unsigned long long literal to deal with overflow.Joerg Sonnenberger2011-04-041-1/+1
| | | | llvm-svn: 128847
* Allow coalescing with reserved physregs in certain cases:Jakob Stoklund Olesen2011-04-045-118/+14
| | | | | | | | | | | | | | | | | | | | | | | | | When a virtual register has a single value that is defined as a copy of a reserved register, permit that copy to be joined. These virtual register are usually copies of the stack pointer: %vreg75<def> = COPY %ESP; GR32:%vreg75 MOV32mr %vreg75, 1, %noreg, 0, %noreg, %vreg74<kill> MOV32mi %vreg75, 1, %noreg, 8, %noreg, 0 MOV32mi %vreg75<kill>, 1, %noreg, 4, %noreg, 0 CALLpcrel32 ... Coalescing these virtual registers early decreases register pressure. Previously, they were coalesced by RALinScan::attemptTrivialCoalescing after register allocation was completed. The lower register pressure causes the mcinst-lowering-cmp0.ll test case to fail because it depends on linear scan spilling a particular register. I am deleting 2008-08-05-SpillerBug.ll because it is counting the number of instructions emitted, and its revision history shows the 'correct' count being edited many times. llvm-svn: 128845
* Extract physreg joining policy to a separate method.Jakob Stoklund Olesen2011-04-042-53/+60
| | | | llvm-svn: 128844
* Fix incorrect alignment for NEON VST2b32_UPD.Johnny Chen2011-04-042-7/+135
| | | | | | rdar://problem/9225433 llvm-svn: 128841
* Update BreakpointPrinter to emit original function names only. Devang Patel2011-04-041-15/+31
| | | | llvm-svn: 128839
* Insert code in the right location when lowering PowerPC atomics.Jakob Stoklund Olesen2011-04-041-2/+4
| | | | | | | This causes defs to dominate uses, no instructions after terminators, and other goodness. llvm-svn: 128836
* Disable the PowerPC/Atomics-64 test.Jakob Stoklund Olesen2011-04-041-2/+8
| | | | | | | | The code inserted by PPCTargetLowering::EmitInstrWithCustomInserter for ppc64 is wrong, and I don't know how to fix it. It seems to be using the correct register classes for pointers, but it inserts all 32-bit instructions. llvm-svn: 128835
* Remove unused function.Eric Christopher2011-04-041-21/+0
| | | | llvm-svn: 128834
* - Implement asm parsing support for LDRSBT, LDRHT, LDRSHT and STRHTBruno Cardoso Lopes2011-04-048-32/+258
| | | | | | | | | | also fix the encoding of the later. - Add a new encoding bit to describe the index mode used in AM3. - Teach printAddrMode3Operand to check by the addressing mode which index mode to print. - Testcases. llvm-svn: 128832
* silence an unused function warning.Chris Lattner2011-04-041-0/+2
| | | | llvm-svn: 128831
* Move transformation of JmpLink and related nodes done during instruction ↵Akira Hatanaka2011-04-042-59/+27
| | | | | | selection to Legalize phase. llvm-svn: 128830
* PowerPC atomic pseudos clobber CR0, they don't read it.Jakob Stoklund Olesen2011-04-042-2/+2
| | | | llvm-svn: 128829
* Use X0 instead of R0 for the zero register on ppc64.Jakob Stoklund Olesen2011-04-041-10/+13
| | | | | | The 32-bit R0 cannot be used where a 64-bit register is expected. llvm-svn: 128828
* Fix PowerPC tests to be register allocator independent.Jakob Stoklund Olesen2011-04-042-8/+8
| | | | llvm-svn: 128827
* Add support for the VIA PadLock instructions.Joerg Sonnenberger2011-04-0412-14/+165
| | | | llvm-svn: 128826
* Use array_lengthofJoerg Sonnenberger2011-04-041-2/+3
| | | | llvm-svn: 128823
* Expand Op0Mask by one bit in preparation for the PadLock prefixes.Joerg Sonnenberger2011-04-043-50/+51
| | | | | | | | Define most shift masks incrementally to reduce the redundant hard-coding. Introduce new shift for the VEX flags to replace the magic constant 32 in various places. llvm-svn: 128822
* Stop caching basic block index ranges now that SlotIndexes can keep up.Jakob Stoklund Olesen2011-04-044-30/+43
| | | | llvm-svn: 128821
* Delete leftover data members.Jakob Stoklund Olesen2011-04-041-4/+0
| | | | llvm-svn: 128820
* Change loops to derive the number of tables automaticallyJoerg Sonnenberger2011-04-041-2/+2
| | | | llvm-svn: 128818
* Dragonegg release notes.Duncan Sands2011-04-041-17/+17
| | | | llvm-svn: 128812
* Remove some support for ReturnInsts with multiple operands, and forJay Foad2011-04-044-49/+5
| | | | | | | returning a scalar value in a function whose return type is a single- element structure or array. llvm-svn: 128810
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